Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2 | # |
Wolfgang Denk | eca3aeb | 2013-06-21 10:22:36 +0200 | [diff] [blame] | 3 | # (C) Copyright 2000 - 2013 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 4 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 5 | |
| 6 | Summary: |
| 7 | ======== |
| 8 | |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 9 | This directory contains the source code for U-Boot, a boot loader for |
wdenk | e86e5a0 | 2004-10-17 21:12:06 +0000 | [diff] [blame] | 10 | Embedded boards based on PowerPC, ARM, MIPS and several other |
| 11 | processors, which can be installed in a boot ROM and used to |
| 12 | initialize and test the hardware or to download and run application |
| 13 | code. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 14 | |
| 15 | The development of U-Boot is closely related to Linux: some parts of |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 16 | the source code originate in the Linux source tree, we have some |
| 17 | header files in common, and special provision has been made to |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 18 | support booting of Linux images. |
| 19 | |
| 20 | Some attention has been paid to make this software easily |
| 21 | configurable and extendable. For instance, all monitor commands are |
| 22 | implemented with the same call interface, so that it's very easy to |
| 23 | add new commands. Also, instead of permanently adding rarely used |
| 24 | code (for instance hardware test utilities) to the monitor, you can |
| 25 | load and run it dynamically. |
| 26 | |
| 27 | |
| 28 | Status: |
| 29 | ======= |
| 30 | |
| 31 | In general, all boards for which a configuration option exists in the |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 32 | Makefile have been tested to some extent and can be considered |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 33 | "working". In fact, many of them are used in production systems. |
| 34 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 35 | In case of problems see the CHANGELOG file to find out who contributed |
| 36 | the specific port. In addition, there are various MAINTAINERS files |
| 37 | scattered throughout the U-Boot source identifying the people or |
| 38 | companies responsible for various boards and subsystems. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 39 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 40 | Note: As of August, 2010, there is no longer a CHANGELOG file in the |
| 41 | actual U-Boot source tree; however, it can be created dynamically |
| 42 | from the Git log using: |
Robert P. J. Day | adb9d85 | 2012-11-14 02:03:20 +0000 | [diff] [blame] | 43 | |
| 44 | make CHANGELOG |
| 45 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 46 | |
| 47 | Where to get help: |
| 48 | ================== |
| 49 | |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 50 | In case you have questions about, problems with or contributions for |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 51 | U-Boot, you should send a message to the U-Boot mailing list at |
Peter Tyser | 0c32565 | 2008-09-10 09:18:34 -0500 | [diff] [blame] | 52 | <u-boot@lists.denx.de>. There is also an archive of previous traffic |
| 53 | on the mailing list - please search the archive before asking FAQ's. |
Naoki Hayama | 6681bbb | 2020-10-08 13:16:18 +0900 | [diff] [blame] | 54 | Please see https://lists.denx.de/pipermail/u-boot and |
| 55 | https://marc.info/?l=u-boot |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 56 | |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 57 | Where to get source code: |
| 58 | ========================= |
| 59 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 60 | The U-Boot source code is maintained in the Git repository at |
Heinrich Schuchardt | a3bbd0b | 2021-02-24 13:19:04 +0100 | [diff] [blame] | 61 | https://source.denx.de/u-boot/u-boot.git ; you can browse it online at |
| 62 | https://source.denx.de/u-boot/u-boot |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 63 | |
Naoki Hayama | c4bd51e | 2020-10-08 13:16:25 +0900 | [diff] [blame] | 64 | The "Tags" links on this page allow you to download tarballs of |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 65 | any version you might be interested in. Official releases are also |
Naoki Hayama | c4bd51e | 2020-10-08 13:16:25 +0900 | [diff] [blame] | 66 | available from the DENX file server through HTTPS or FTP. |
| 67 | https://ftp.denx.de/pub/u-boot/ |
| 68 | ftp://ftp.denx.de/pub/u-boot/ |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 69 | |
| 70 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 71 | Where we come from: |
| 72 | =================== |
| 73 | |
| 74 | - start from 8xxrom sources |
Naoki Hayama | 047f6ec | 2020-10-08 13:17:16 +0900 | [diff] [blame] | 75 | - create PPCBoot project (https://sourceforge.net/projects/ppcboot) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 76 | - clean up code |
| 77 | - make it easier to add custom boards |
| 78 | - make it possible to add other [PowerPC] CPUs |
| 79 | - extend functions, especially: |
| 80 | * Provide extended interface to Linux boot loader |
| 81 | * S-Record download |
| 82 | * network boot |
Simon Glass | 9e5616d | 2019-08-01 09:47:14 -0600 | [diff] [blame] | 83 | * ATA disk / SCSI ... boot |
Naoki Hayama | 047f6ec | 2020-10-08 13:17:16 +0900 | [diff] [blame] | 84 | - create ARMBoot project (https://sourceforge.net/projects/armboot) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 85 | - add other CPU families (starting with ARM) |
Naoki Hayama | 047f6ec | 2020-10-08 13:17:16 +0900 | [diff] [blame] | 86 | - create U-Boot project (https://sourceforge.net/projects/u-boot) |
| 87 | - current project page: see https://www.denx.de/wiki/U-Boot |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 88 | |
| 89 | |
| 90 | Names and Spelling: |
| 91 | =================== |
| 92 | |
| 93 | The "official" name of this project is "Das U-Boot". The spelling |
| 94 | "U-Boot" shall be used in all written text (documentation, comments |
| 95 | in source files etc.). Example: |
| 96 | |
| 97 | This is the README file for the U-Boot project. |
| 98 | |
| 99 | File names etc. shall be based on the string "u-boot". Examples: |
| 100 | |
| 101 | include/asm-ppc/u-boot.h |
| 102 | |
| 103 | #include <asm/u-boot.h> |
| 104 | |
| 105 | Variable names, preprocessor constants etc. shall be either based on |
| 106 | the string "u_boot" or on "U_BOOT". Example: |
| 107 | |
| 108 | U_BOOT_VERSION u_boot_logo |
| 109 | IH_OS_U_BOOT u_boot_hush_start |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 110 | |
| 111 | |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 112 | Versioning: |
| 113 | =========== |
| 114 | |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 115 | Starting with the release in October 2008, the names of the releases |
| 116 | were changed from numerical release numbers without deeper meaning |
| 117 | into a time stamp based numbering. Regular releases are identified by |
| 118 | names consisting of the calendar year and month of the release date. |
| 119 | Additional fields (if present) indicate release candidates or bug fix |
| 120 | releases in "stable" maintenance trees. |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 121 | |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 122 | Examples: |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 123 | U-Boot v2009.11 - Release November 2009 |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 124 | U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree |
Jelle van der Waa | 0de21ec | 2016-10-30 17:30:30 +0100 | [diff] [blame] | 125 | U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 126 | |
| 127 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 128 | Directory Hierarchy: |
| 129 | ==================== |
| 130 | |
Simon Glass | 6e73ed0 | 2021-07-10 21:14:21 -0600 | [diff] [blame] | 131 | /arch Architecture-specific files |
Masahiro Yamada | 6eae68e | 2014-03-07 18:02:02 +0900 | [diff] [blame] | 132 | /arc Files generic to ARC architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 133 | /arm Files generic to ARM architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 134 | /m68k Files generic to m68k architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 135 | /microblaze Files generic to microblaze architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 136 | /mips Files generic to MIPS architecture |
Macpaul Lin | afc1ce8 | 2011-10-19 20:41:11 +0000 | [diff] [blame] | 137 | /nds32 Files generic to NDS32 architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 138 | /nios2 Files generic to Altera NIOS2 architecture |
Stefan Roese | a47a12b | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 139 | /powerpc Files generic to PowerPC architecture |
Rick Chen | 3fafced | 2017-12-26 13:55:59 +0800 | [diff] [blame] | 140 | /riscv Files generic to RISC-V architecture |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 141 | /sandbox Files generic to HW-independent "sandbox" |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 142 | /sh Files generic to SH architecture |
Robert P. J. Day | 33c7731 | 2013-09-15 18:34:15 -0400 | [diff] [blame] | 143 | /x86 Files generic to x86 architecture |
Naoki Hayama | e4eb313 | 2020-10-08 13:16:38 +0900 | [diff] [blame] | 144 | /xtensa Files generic to Xtensa architecture |
Simon Glass | 6e73ed0 | 2021-07-10 21:14:21 -0600 | [diff] [blame] | 145 | /api Machine/arch-independent API for external apps |
| 146 | /board Board-dependent files |
Simon Glass | 19a91f2 | 2021-10-14 12:47:54 -0600 | [diff] [blame] | 147 | /boot Support for images and booting |
Xu Ziyuan | 740f7e5 | 2016-08-26 19:54:49 +0800 | [diff] [blame] | 148 | /cmd U-Boot commands functions |
Simon Glass | 6e73ed0 | 2021-07-10 21:14:21 -0600 | [diff] [blame] | 149 | /common Misc architecture-independent functions |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 150 | /configs Board default configuration files |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 151 | /disk Code for disk drive partition handling |
Simon Glass | 6e73ed0 | 2021-07-10 21:14:21 -0600 | [diff] [blame] | 152 | /doc Documentation (a mix of ReST and READMEs) |
| 153 | /drivers Device drivers |
| 154 | /dts Makefile for building internal U-Boot fdt. |
| 155 | /env Environment support |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 156 | /examples Example code for standalone applications, etc. |
| 157 | /fs Filesystem code (cramfs, ext2, jffs2, etc.) |
| 158 | /include Header Files |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 159 | /lib Library routines generic to all architectures |
| 160 | /Licenses Various license files |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 161 | /net Networking code |
| 162 | /post Power On Self Test |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 163 | /scripts Various build scripts and Makefiles |
| 164 | /test Various unit test files |
Simon Glass | 6e73ed0 | 2021-07-10 21:14:21 -0600 | [diff] [blame] | 165 | /tools Tools to build and sign FIT images, etc. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 166 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 167 | Software Configuration: |
| 168 | ======================= |
| 169 | |
| 170 | Configuration is usually done using C preprocessor defines; the |
| 171 | rationale behind that is to avoid dead code whenever possible. |
| 172 | |
| 173 | There are two classes of configuration variables: |
| 174 | |
| 175 | * Configuration _OPTIONS_: |
| 176 | These are selectable by the user and have names beginning with |
| 177 | "CONFIG_". |
| 178 | |
| 179 | * Configuration _SETTINGS_: |
| 180 | These depend on the hardware etc. and should not be meddled with if |
| 181 | you don't know what you're doing; they have names beginning with |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | "CONFIG_SYS_". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 183 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 184 | Previously, all configuration was done by hand, which involved creating |
| 185 | symbolic links and editing configuration files manually. More recently, |
| 186 | U-Boot has added the Kbuild infrastructure used by the Linux kernel, |
| 187 | allowing you to use the "make menuconfig" command to configure your |
| 188 | build. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 189 | |
| 190 | |
| 191 | Selection of Processor Architecture and Board Type: |
| 192 | --------------------------------------------------- |
| 193 | |
| 194 | For all supported boards there are ready-to-use default |
Holger Freyther | ab584d6 | 2014-08-04 09:26:05 +0200 | [diff] [blame] | 195 | configurations available; just type "make <board_name>_defconfig". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 196 | |
| 197 | Example: For a TQM823L module type: |
| 198 | |
| 199 | cd u-boot |
Holger Freyther | ab584d6 | 2014-08-04 09:26:05 +0200 | [diff] [blame] | 200 | make TQM823L_defconfig |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 201 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 202 | Note: If you're looking for the default configuration file for a board |
| 203 | you're sure used to be there but is now missing, check the file |
| 204 | doc/README.scrapyard for a list of no longer supported boards. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 205 | |
Simon Glass | 75b3c3a | 2014-03-22 17:12:59 -0600 | [diff] [blame] | 206 | Sandbox Environment: |
| 207 | -------------------- |
| 208 | |
| 209 | U-Boot can be built natively to run on a Linux host using the 'sandbox' |
| 210 | board. This allows feature development which is not board- or architecture- |
| 211 | specific to be undertaken on a native platform. The sandbox is also used to |
| 212 | run some of U-Boot's tests. |
| 213 | |
Naoki Hayama | bbb140e | 2020-10-08 13:16:58 +0900 | [diff] [blame] | 214 | See doc/arch/sandbox.rst for more details. |
Simon Glass | 75b3c3a | 2014-03-22 17:12:59 -0600 | [diff] [blame] | 215 | |
| 216 | |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 217 | Board Initialisation Flow: |
| 218 | -------------------------- |
| 219 | |
| 220 | This is the intended start-up flow for boards. This should apply for both |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 221 | SPL and U-Boot proper (i.e. they both follow the same rules). |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 222 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 223 | Note: "SPL" stands for "Secondary Program Loader," which is explained in |
| 224 | more detail later in this file. |
| 225 | |
| 226 | At present, SPL mostly uses a separate code path, but the function names |
| 227 | and roles of each function are the same. Some boards or architectures |
| 228 | may not conform to this. At least most ARM boards which use |
| 229 | CONFIG_SPL_FRAMEWORK conform to this. |
| 230 | |
| 231 | Execution typically starts with an architecture-specific (and possibly |
| 232 | CPU-specific) start.S file, such as: |
| 233 | |
| 234 | - arch/arm/cpu/armv7/start.S |
| 235 | - arch/powerpc/cpu/mpc83xx/start.S |
| 236 | - arch/mips/cpu/start.S |
| 237 | |
| 238 | and so on. From there, three functions are called; the purpose and |
| 239 | limitations of each of these functions are described below. |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 240 | |
| 241 | lowlevel_init(): |
| 242 | - purpose: essential init to permit execution to reach board_init_f() |
| 243 | - no global_data or BSS |
| 244 | - there is no stack (ARMv7 may have one but it will soon be removed) |
| 245 | - must not set up SDRAM or use console |
| 246 | - must only do the bare minimum to allow execution to continue to |
| 247 | board_init_f() |
| 248 | - this is almost never needed |
| 249 | - return normally from this function |
| 250 | |
| 251 | board_init_f(): |
| 252 | - purpose: set up the machine ready for running board_init_r(): |
| 253 | i.e. SDRAM and serial UART |
| 254 | - global_data is available |
| 255 | - stack is in SRAM |
| 256 | - BSS is not available, so you cannot use global/static variables, |
| 257 | only stack variables and global_data |
| 258 | |
| 259 | Non-SPL-specific notes: |
| 260 | - dram_init() is called to set up DRAM. If already done in SPL this |
| 261 | can do nothing |
| 262 | |
| 263 | SPL-specific notes: |
| 264 | - you can override the entire board_init_f() function with your own |
| 265 | version as needed. |
| 266 | - preloader_console_init() can be called here in extremis |
| 267 | - should set up SDRAM, and anything needed to make the UART work |
Naoki Hayama | 499696e | 2020-09-24 15:57:19 +0900 | [diff] [blame] | 268 | - there is no need to clear BSS, it will be done by crt0.S |
Andreas Dannenberg | 1425465 | 2019-08-08 12:54:49 -0500 | [diff] [blame] | 269 | - for specific scenarios on certain architectures an early BSS *can* |
| 270 | be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing |
| 271 | of BSS prior to entering board_init_f()) but doing so is discouraged. |
| 272 | Instead it is strongly recommended to architect any code changes |
| 273 | or additions such to not depend on the availability of BSS during |
| 274 | board_init_f() as indicated in other sections of this README to |
| 275 | maintain compatibility and consistency across the entire code base. |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 276 | - must return normally from this function (don't call board_init_r() |
| 277 | directly) |
| 278 | |
| 279 | Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at |
| 280 | this point the stack and global_data are relocated to below |
| 281 | CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of |
| 282 | memory. |
| 283 | |
| 284 | board_init_r(): |
| 285 | - purpose: main execution, common code |
| 286 | - global_data is available |
| 287 | - SDRAM is available |
| 288 | - BSS is available, all static/global variables can be used |
| 289 | - execution eventually continues to main_loop() |
| 290 | |
| 291 | Non-SPL-specific notes: |
| 292 | - U-Boot is relocated to the top of memory and is now running from |
| 293 | there. |
| 294 | |
| 295 | SPL-specific notes: |
| 296 | - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and |
| 297 | CONFIG_SPL_STACK_R_ADDR points into SDRAM |
| 298 | - preloader_console_init() can be called here - typically this is |
Ley Foon Tan | 0680f1b | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 299 | done by selecting CONFIG_SPL_BOARD_INIT and then supplying a |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 300 | spl_board_init() function containing this call |
| 301 | - loads U-Boot or (in falcon mode) Linux |
| 302 | |
| 303 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 304 | Configuration Options: |
| 305 | ---------------------- |
| 306 | |
| 307 | Configuration depends on the combination of board and CPU type; all |
| 308 | such information is kept in a configuration file |
| 309 | "include/configs/<board_name>.h". |
| 310 | |
| 311 | Example: For a TQM823L module, all configuration settings are in |
| 312 | "include/configs/TQM823L.h". |
| 313 | |
| 314 | |
wdenk | 7f6c2cb | 2002-11-10 22:06:23 +0000 | [diff] [blame] | 315 | Many of the options are named exactly as the corresponding Linux |
| 316 | kernel configuration options. The intention is to make it easier to |
| 317 | build a config tool - later. |
| 318 | |
Ashish Kumar | 63b2316 | 2017-08-11 11:09:14 +0530 | [diff] [blame] | 319 | - ARM Platform Bus Type(CCI): |
| 320 | CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which |
| 321 | provides full cache coherency between two clusters of multi-core |
| 322 | CPUs and I/O coherency for devices and I/O masters |
| 323 | |
| 324 | CONFIG_SYS_FSL_HAS_CCI400 |
| 325 | |
| 326 | Defined For SoC that has cache coherent interconnect |
| 327 | CCN-400 |
wdenk | 7f6c2cb | 2002-11-10 22:06:23 +0000 | [diff] [blame] | 328 | |
Ashish Kumar | c055cee | 2017-08-18 10:54:36 +0530 | [diff] [blame] | 329 | CONFIG_SYS_FSL_HAS_CCN504 |
| 330 | |
| 331 | Defined for SoC that has cache coherent interconnect CCN-504 |
| 332 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 333 | The following options need to be configured: |
| 334 | |
Kim Phillips | 2628114 | 2007-08-10 13:28:25 -0500 | [diff] [blame] | 335 | - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 336 | |
Kim Phillips | 2628114 | 2007-08-10 13:28:25 -0500 | [diff] [blame] | 337 | - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. |
Wolfgang Denk | 6ccec44 | 2006-10-24 14:42:37 +0200 | [diff] [blame] | 338 | |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 339 | - 85xx CPU Options: |
York Sun | ffd06e0 | 2012-10-08 07:44:30 +0000 | [diff] [blame] | 340 | CONFIG_SYS_PPC64 |
| 341 | |
| 342 | Specifies that the core is a 64-bit PowerPC implementation (implements |
| 343 | the "64" category of the Power ISA). This is necessary for ePAPR |
| 344 | compliance, among other possible reasons. |
| 345 | |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 346 | CONFIG_SYS_FSL_TBCLK_DIV |
| 347 | |
| 348 | Defines the core time base clock divider ratio compared to the |
| 349 | system clock. On most PQ3 devices this is 8, on newer QorIQ |
| 350 | devices it can be 16 or 32. The ratio varies from SoC to Soc. |
| 351 | |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 352 | CONFIG_SYS_FSL_PCIE_COMPAT |
| 353 | |
| 354 | Defines the string to utilize when trying to match PCIe device |
| 355 | tree nodes for the given platform. |
| 356 | |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 357 | CONFIG_SYS_FSL_ERRATUM_A004510 |
| 358 | |
| 359 | Enables a workaround for erratum A004510. If set, |
| 360 | then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and |
| 361 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set. |
| 362 | |
| 363 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV |
| 364 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional) |
| 365 | |
| 366 | Defines one or two SoC revisions (low 8 bits of SVR) |
| 367 | for which the A004510 workaround should be applied. |
| 368 | |
| 369 | The rest of SVR is either not relevant to the decision |
| 370 | of whether the erratum is present (e.g. p2040 versus |
| 371 | p2041) or is implied by the build target, which controls |
| 372 | whether CONFIG_SYS_FSL_ERRATUM_A004510 is set. |
| 373 | |
| 374 | See Freescale App Note 4493 for more information about |
| 375 | this erratum. |
| 376 | |
| 377 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY |
| 378 | |
| 379 | This is the value to write into CCSR offset 0x18600 |
| 380 | according to the A004510 workaround. |
| 381 | |
Priyanka Jain | 64501c6 | 2013-07-02 09:21:04 +0530 | [diff] [blame] | 382 | CONFIG_SYS_FSL_DSP_DDR_ADDR |
| 383 | This value denotes start offset of DDR memory which is |
| 384 | connected exclusively to the DSP cores. |
| 385 | |
Priyanka Jain | 765b0bd | 2013-04-04 09:31:54 +0530 | [diff] [blame] | 386 | CONFIG_SYS_FSL_DSP_M2_RAM_ADDR |
| 387 | This value denotes start offset of M2 memory |
| 388 | which is directly connected to the DSP core. |
| 389 | |
Priyanka Jain | 64501c6 | 2013-07-02 09:21:04 +0530 | [diff] [blame] | 390 | CONFIG_SYS_FSL_DSP_M3_RAM_ADDR |
| 391 | This value denotes start offset of M3 memory which is directly |
| 392 | connected to the DSP core. |
| 393 | |
Priyanka Jain | 765b0bd | 2013-04-04 09:31:54 +0530 | [diff] [blame] | 394 | CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT |
| 395 | This value denotes start offset of DSP CCSR space. |
| 396 | |
Priyanka Jain | b135991 | 2013-12-17 14:25:52 +0530 | [diff] [blame] | 397 | CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
| 398 | Single Source Clock is clocking mode present in some of FSL SoC's. |
| 399 | In this mode, a single differential clock is used to supply |
| 400 | clocks to the sysclock, ddrclock and usbclock. |
| 401 | |
Aneesh Bansal | fb4a240 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 402 | CONFIG_SYS_CPC_REINIT_F |
| 403 | This CONFIG is defined when the CPC is configured as SRAM at the |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 404 | time of U-Boot entry and is required to be re-initialized. |
Aneesh Bansal | fb4a240 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 405 | |
Daniel Schwierzeck | 6cb461b | 2012-04-02 02:57:56 +0000 | [diff] [blame] | 406 | - Generic CPU options: |
| 407 | CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN |
| 408 | |
| 409 | Defines the endianess of the CPU. Implementation of those |
| 410 | values is arch specific. |
| 411 | |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 412 | CONFIG_SYS_FSL_DDR |
| 413 | Freescale DDR driver in use. This type of DDR controller is |
Tom Rini | 1c58857 | 2021-05-14 21:34:26 -0400 | [diff] [blame] | 414 | found in mpc83xx, mpc85xx as well as some ARM core SoCs. |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 415 | |
| 416 | CONFIG_SYS_FSL_DDR_ADDR |
| 417 | Freescale DDR memory-mapped register base. |
| 418 | |
| 419 | CONFIG_SYS_FSL_DDR_EMU |
| 420 | Specify emulator support for DDR. Some DDR features such as |
| 421 | deskew training are not available. |
| 422 | |
| 423 | CONFIG_SYS_FSL_DDRC_GEN1 |
| 424 | Freescale DDR1 controller. |
| 425 | |
| 426 | CONFIG_SYS_FSL_DDRC_GEN2 |
| 427 | Freescale DDR2 controller. |
| 428 | |
| 429 | CONFIG_SYS_FSL_DDRC_GEN3 |
| 430 | Freescale DDR3 controller. |
| 431 | |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 432 | CONFIG_SYS_FSL_DDRC_GEN4 |
| 433 | Freescale DDR4 controller. |
| 434 | |
York Sun | 9ac4ffb | 2013-09-30 14:20:51 -0700 | [diff] [blame] | 435 | CONFIG_SYS_FSL_DDRC_ARM_GEN3 |
| 436 | Freescale DDR3 controller for ARM-based SoCs. |
| 437 | |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 438 | CONFIG_SYS_FSL_DDR1 |
| 439 | Board config to use DDR1. It can be enabled for SoCs with |
| 440 | Freescale DDR1 or DDR2 controllers, depending on the board |
| 441 | implemetation. |
| 442 | |
| 443 | CONFIG_SYS_FSL_DDR2 |
Robert P. J. Day | 62a3b7d | 2016-07-15 13:44:45 -0400 | [diff] [blame] | 444 | Board config to use DDR2. It can be enabled for SoCs with |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 445 | Freescale DDR2 or DDR3 controllers, depending on the board |
| 446 | implementation. |
| 447 | |
| 448 | CONFIG_SYS_FSL_DDR3 |
| 449 | Board config to use DDR3. It can be enabled for SoCs with |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 450 | Freescale DDR3 or DDR3L controllers. |
| 451 | |
| 452 | CONFIG_SYS_FSL_DDR3L |
| 453 | Board config to use DDR3L. It can be enabled for SoCs with |
| 454 | DDR3L controllers. |
| 455 | |
Prabhakar Kushwaha | 1b4175d | 2014-01-18 12:28:30 +0530 | [diff] [blame] | 456 | CONFIG_SYS_FSL_IFC_BE |
| 457 | Defines the IFC controller register space as Big Endian |
| 458 | |
| 459 | CONFIG_SYS_FSL_IFC_LE |
| 460 | Defines the IFC controller register space as Little Endian |
| 461 | |
Prabhakar Kushwaha | 1c40707 | 2017-02-02 15:01:26 +0530 | [diff] [blame] | 462 | CONFIG_SYS_FSL_IFC_CLK_DIV |
| 463 | Defines divider of platform clock(clock input to IFC controller). |
| 464 | |
Prabhakar Kushwaha | add63f9 | 2017-02-02 15:02:00 +0530 | [diff] [blame] | 465 | CONFIG_SYS_FSL_LBC_CLK_DIV |
| 466 | Defines divider of platform clock(clock input to eLBC controller). |
| 467 | |
York Sun | 4e5b1bd | 2014-02-10 13:59:42 -0800 | [diff] [blame] | 468 | CONFIG_SYS_FSL_DDR_BE |
| 469 | Defines the DDR controller register space as Big Endian |
| 470 | |
| 471 | CONFIG_SYS_FSL_DDR_LE |
| 472 | Defines the DDR controller register space as Little Endian |
| 473 | |
York Sun | 6b9e309 | 2014-02-10 13:59:43 -0800 | [diff] [blame] | 474 | CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY |
| 475 | Physical address from the view of DDR controllers. It is the |
| 476 | same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But |
| 477 | it could be different for ARM SoCs. |
| 478 | |
York Sun | 6b1e125 | 2014-02-10 13:59:44 -0800 | [diff] [blame] | 479 | CONFIG_SYS_FSL_DDR_INTLV_256B |
| 480 | DDR controller interleaving on 256-byte. This is a special |
| 481 | interleaving mode, handled by Dickens for Freescale layerscape |
| 482 | SoCs with ARM core. |
| 483 | |
York Sun | 1d71efb | 2014-08-01 15:51:00 -0700 | [diff] [blame] | 484 | CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS |
| 485 | Number of controllers used as main memory. |
| 486 | |
| 487 | CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS |
| 488 | Number of controllers used for other than main memory. |
| 489 | |
Prabhakar Kushwaha | 4493721 | 2015-11-09 16:42:07 +0530 | [diff] [blame] | 490 | CONFIG_SYS_FSL_HAS_DP_DDR |
| 491 | Defines the SoC has DP-DDR used for DPAA. |
| 492 | |
Ruchika Gupta | 028dbb8 | 2014-09-09 11:50:31 +0530 | [diff] [blame] | 493 | CONFIG_SYS_FSL_SEC_BE |
| 494 | Defines the SEC controller register space as Big Endian |
| 495 | |
| 496 | CONFIG_SYS_FSL_SEC_LE |
| 497 | Defines the SEC controller register space as Little Endian |
| 498 | |
Daniel Schwierzeck | 92bbd64 | 2011-07-27 13:22:39 +0200 | [diff] [blame] | 499 | - MIPS CPU options: |
| 500 | CONFIG_SYS_INIT_SP_OFFSET |
| 501 | |
| 502 | Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack |
| 503 | pointer. This is needed for the temporary stack before |
| 504 | relocation. |
| 505 | |
Daniel Schwierzeck | 92bbd64 | 2011-07-27 13:22:39 +0200 | [diff] [blame] | 506 | CONFIG_XWAY_SWAP_BYTES |
| 507 | |
| 508 | Enable compilation of tools/xway-swap-bytes needed for Lantiq |
| 509 | XWAY SoCs for booting from NOR flash. The U-Boot image needs to |
| 510 | be swapped if a flash programmer is used. |
| 511 | |
Christian Riesch | b67d881 | 2012-02-02 00:44:39 +0000 | [diff] [blame] | 512 | - ARM options: |
| 513 | CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
| 514 | |
| 515 | Select high exception vectors of the ARM core, e.g., do not |
| 516 | clear the V bit of the c1 register of CP15. |
| 517 | |
York Sun | 207774b | 2015-03-20 19:28:08 -0700 | [diff] [blame] | 518 | COUNTER_FREQUENCY |
| 519 | Generic timer clock source frequency. |
| 520 | |
| 521 | COUNTER_FREQUENCY_REAL |
| 522 | Generic timer clock source frequency if the real clock is |
| 523 | different from COUNTER_FREQUENCY, and can only be determined |
| 524 | at run time. |
| 525 | |
Stephen Warren | 73c3893 | 2015-01-19 16:25:52 -0700 | [diff] [blame] | 526 | - Tegra SoC options: |
| 527 | CONFIG_TEGRA_SUPPORT_NON_SECURE |
| 528 | |
| 529 | Support executing U-Boot in non-secure (NS) mode. Certain |
| 530 | impossible actions will be skipped if the CPU is in NS mode, |
| 531 | such as ARM architectural timer initialization. |
| 532 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 533 | - Linux Kernel Interface: |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 534 | CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] |
| 535 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 536 | When transferring memsize parameter to Linux, some versions |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 537 | expect it to be in bytes, others in MB. |
| 538 | Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. |
| 539 | |
Gerald Van Baren | fec6d9e | 2008-06-03 20:34:45 -0400 | [diff] [blame] | 540 | CONFIG_OF_LIBFDT |
Wolfgang Denk | f57f70a | 2005-10-13 01:45:54 +0200 | [diff] [blame] | 541 | |
| 542 | New kernel versions are expecting firmware settings to be |
Gerald Van Baren | 213bf8c | 2007-03-31 12:23:51 -0400 | [diff] [blame] | 543 | passed using flattened device trees (based on open firmware |
| 544 | concepts). |
| 545 | |
| 546 | CONFIG_OF_LIBFDT |
| 547 | * New libfdt-based support |
| 548 | * Adds the "fdt" command |
Kim Phillips | 3bb342f | 2007-08-10 14:34:14 -0500 | [diff] [blame] | 549 | * The bootm command automatically updates the fdt |
Gerald Van Baren | 213bf8c | 2007-03-31 12:23:51 -0400 | [diff] [blame] | 550 | |
Wolfgang Denk | f57f70a | 2005-10-13 01:45:54 +0200 | [diff] [blame] | 551 | OF_TBCLK - The timebase frequency. |
| 552 | |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 553 | boards with QUICC Engines require OF_QE to set UCC MAC |
| 554 | addresses |
Kim Phillips | 3bb342f | 2007-08-10 14:34:14 -0500 | [diff] [blame] | 555 | |
Heiko Schocher | 3887c3f | 2009-09-23 07:56:08 +0200 | [diff] [blame] | 556 | CONFIG_OF_IDE_FIXUP |
| 557 | |
| 558 | U-Boot can detect if an IDE device is present or not. |
| 559 | If not, and this new config option is activated, U-Boot |
| 560 | removes the ATA node from the DTS before booting Linux, |
| 561 | so the Linux IDE driver does not probe the device and |
| 562 | crash. This is needed for buggy hardware (uc101) where |
| 563 | no pull down resistor is connected to the signal IDE5V_DD7. |
| 564 | |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 565 | - vxWorks boot parameters: |
| 566 | |
| 567 | bootvx constructs a valid bootline using the following |
Bin Meng | 9e98b7e | 2015-10-07 20:19:17 -0700 | [diff] [blame] | 568 | environments variables: bootdev, bootfile, ipaddr, netmask, |
| 569 | serverip, gatewayip, hostname, othbootargs. |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 570 | It loads the vxWorks image pointed bootfile. |
| 571 | |
Naoki Hayama | 81a05d9 | 2020-10-08 13:17:08 +0900 | [diff] [blame] | 572 | Note: If a "bootargs" environment is defined, it will override |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 573 | the defaults discussed just above. |
| 574 | |
Aneesh V | 93bc219 | 2011-06-16 23:30:51 +0000 | [diff] [blame] | 575 | - Cache Configuration for ARM: |
| 576 | CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache |
| 577 | controller |
| 578 | CONFIG_SYS_PL310_BASE - Physical base address of PL310 |
| 579 | controller register space |
| 580 | |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 581 | - Serial Ports: |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 582 | CONFIG_PL011_CLOCK |
| 583 | |
| 584 | If you have Amba PrimeCell PL011 UARTs, set this variable to |
| 585 | the clock speed of the UARTs. |
| 586 | |
| 587 | CONFIG_PL01x_PORTS |
| 588 | |
| 589 | If you have Amba PrimeCell PL010 or PL011 UARTs on your board, |
| 590 | define this to a list of base addresses for each (supported) |
| 591 | port. See e.g. include/configs/versatile.h |
| 592 | |
Karicheri, Muralidharan | d57dee5 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 593 | CONFIG_SERIAL_HW_FLOW_CONTROL |
| 594 | |
| 595 | Define this variable to enable hw flow control in serial driver. |
| 596 | Current user of this option is drivers/serial/nsl16550.c driver |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 597 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 598 | - Serial Download Echo Mode: |
| 599 | CONFIG_LOADS_ECHO |
| 600 | If defined to 1, all characters received during a |
| 601 | serial download (using the "loads" command) are |
| 602 | echoed back. This might be needed by some terminal |
| 603 | emulations (like "cu"), but may as well just take |
| 604 | time on others. This setting #define's the initial |
| 605 | value of the "loads_echo" environment variable. |
| 606 | |
Simon Glass | 302a648 | 2016-03-13 19:07:28 -0600 | [diff] [blame] | 607 | - Removal of commands |
| 608 | If no commands are needed to boot, you can disable |
| 609 | CONFIG_CMDLINE to remove them. In this case, the command line |
| 610 | will not be available, and when U-Boot wants to execute the |
| 611 | boot command (on start-up) it will call board_run_command() |
| 612 | instead. This can reduce image size significantly for very |
| 613 | simple boot procedures. |
| 614 | |
Wolfgang Denk | a5ecbe6 | 2013-03-23 23:50:31 +0000 | [diff] [blame] | 615 | - Regular expression support: |
| 616 | CONFIG_REGEX |
Wolfgang Denk | 93e1459 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 617 | If this variable is defined, U-Boot is linked against |
| 618 | the SLRE (Super Light Regular Expression) library, |
| 619 | which adds regex support to some commands, as for |
| 620 | example "env grep" and "setexpr". |
Wolfgang Denk | a5ecbe6 | 2013-03-23 23:50:31 +0000 | [diff] [blame] | 621 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 622 | - Watchdog: |
Rasmus Villemoes | 933ada5 | 2021-04-14 09:18:22 +0200 | [diff] [blame] | 623 | CONFIG_SYS_WATCHDOG_FREQ |
| 624 | Some platforms automatically call WATCHDOG_RESET() |
| 625 | from the timer interrupt handler every |
| 626 | CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the |
| 627 | board configuration file, a default of CONFIG_SYS_HZ/2 |
| 628 | (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ |
| 629 | to 0 disables calling WATCHDOG_RESET() from the timer |
| 630 | interrupt. |
| 631 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 632 | - Real-Time Clock: |
| 633 | |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 634 | When CONFIG_CMD_DATE is selected, the type of the RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 635 | has to be selected, too. Define exactly one of the |
| 636 | following options: |
| 637 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 638 | CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC |
Fabio Estevam | 4e8b754 | 2011-10-24 06:44:15 +0000 | [diff] [blame] | 639 | CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 640 | CONFIG_RTC_MC146818 - use MC146818 RTC |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 641 | CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 642 | CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC |
wdenk | 7f70e85 | 2003-05-20 14:25:27 +0000 | [diff] [blame] | 643 | CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC |
Markus Niebel | 412921d | 2014-07-21 11:06:16 +0200 | [diff] [blame] | 644 | CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC |
wdenk | 3bac351 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 645 | CONFIG_RTC_DS164x - use Dallas DS164x RTC |
Tor Krill | 9536dfc | 2008-03-15 15:40:26 +0100 | [diff] [blame] | 646 | CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC |
wdenk | 4c0d4c3 | 2004-06-09 17:34:58 +0000 | [diff] [blame] | 647 | CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC |
Chris Packham | 2bd3cab | 2017-05-30 12:03:33 +1200 | [diff] [blame] | 648 | CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 |
Heiko Schocher | 71d19f3 | 2011-03-28 09:24:22 +0200 | [diff] [blame] | 649 | CONFIG_SYS_RV3029_TCR - enable trickle charger on |
| 650 | RV3029 RTC. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 651 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 652 | Note that if the RTC uses I2C, then the I2C interface |
| 653 | must also be configured. See I2C Support, below. |
| 654 | |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 655 | - GPIO Support: |
| 656 | CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 657 | |
Chris Packham | 5dec49c | 2010-12-19 10:12:13 +0000 | [diff] [blame] | 658 | The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of |
| 659 | chip-ngpio pairs that tell the PCA953X driver the number of |
| 660 | pins supported by a particular chip. |
| 661 | |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 662 | Note that if the GPIO device uses I2C, then the I2C interface |
| 663 | must also be configured. See I2C Support, below. |
| 664 | |
Simon Glass | aa53233 | 2014-06-11 23:29:41 -0600 | [diff] [blame] | 665 | - I/O tracing: |
| 666 | When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O |
| 667 | accesses and can checksum them or write a list of them out |
| 668 | to memory. See the 'iotrace' command for details. This is |
| 669 | useful for testing device drivers since it can confirm that |
| 670 | the driver behaves the same way before and after a code |
| 671 | change. Currently this is supported on sandbox and arm. To |
| 672 | add support for your architecture, add '#include <iotrace.h>' |
| 673 | to the bottom of arch/<arch>/include/asm/io.h and test. |
| 674 | |
| 675 | Example output from the 'iotrace stats' command is below. |
| 676 | Note that if the trace buffer is exhausted, the checksum will |
| 677 | still continue to operate. |
| 678 | |
| 679 | iotrace is enabled |
| 680 | Start: 10000000 (buffer start address) |
| 681 | Size: 00010000 (buffer size) |
| 682 | Offset: 00000120 (current buffer offset) |
| 683 | Output: 10000120 (start + offset) |
| 684 | Count: 00000018 (number of trace records) |
| 685 | CRC32: 9526fb66 (CRC32 of all trace records) |
| 686 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 687 | - Timestamp Support: |
| 688 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 689 | When CONFIG_TIMESTAMP is selected, the timestamp |
| 690 | (date and time) of an image is printed by image |
| 691 | commands like bootm or iminfo. This option is |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 692 | automatically enabled when you select CONFIG_CMD_DATE . |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 693 | |
Karl O. Pinc | 923c46f | 2012-08-16 06:20:15 +0000 | [diff] [blame] | 694 | - Partition Labels (disklabels) Supported: |
| 695 | Zero or more of the following: |
| 696 | CONFIG_MAC_PARTITION Apple's MacOS partition table. |
Karl O. Pinc | 923c46f | 2012-08-16 06:20:15 +0000 | [diff] [blame] | 697 | CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. |
| 698 | CONFIG_EFI_PARTITION GPT partition table, common when EFI is the |
| 699 | bootloader. Note 2TB partition limit; see |
| 700 | disk/part_efi.c |
Simon Glass | c649e3c | 2016-05-01 11:36:02 -0600 | [diff] [blame] | 701 | CONFIG_SCSI) you must configure support for at |
Karl O. Pinc | 923c46f | 2012-08-16 06:20:15 +0000 | [diff] [blame] | 702 | least one non-MTD partition type as well. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 703 | |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 704 | - LBA48 Support |
| 705 | CONFIG_LBA48 |
| 706 | |
| 707 | Set this to enable support for disks larger than 137GB |
Heiko Schocher | 4b142fe | 2009-12-03 11:21:21 +0100 | [diff] [blame] | 708 | Also look at CONFIG_SYS_64BIT_LBA. |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 709 | Whithout these , LBA48 support uses 32bit variables and will 'only' |
| 710 | support disks up to 2.1TB. |
| 711 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 712 | CONFIG_SYS_64BIT_LBA: |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 713 | When enabled, makes the IDE subsystem use 64bit sector addresses. |
| 714 | Default is 32bit. |
| 715 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 716 | - NETWORK Support (PCI): |
Kyle Moffett | ce5207e | 2011-10-18 11:05:29 +0000 | [diff] [blame] | 717 | CONFIG_E1000_SPI |
| 718 | Utility code for direct access to the SPI bus on Intel 8257x. |
| 719 | This does not do anything useful unless you set at least one |
| 720 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. |
| 721 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 722 | CONFIG_NATSEMI |
| 723 | Support for National dp83815 chips. |
| 724 | |
| 725 | CONFIG_NS8382X |
| 726 | Support for National dp8382[01] gigabit chips. |
| 727 | |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 728 | - NETWORK Support (other): |
Rob Herring | efdd731 | 2011-12-15 11:15:49 +0000 | [diff] [blame] | 729 | CONFIG_CALXEDA_XGMAC |
| 730 | Support for the Calxeda XGMAC device |
| 731 | |
Ashok | 3bb46d2 | 2012-10-15 06:20:47 +0000 | [diff] [blame] | 732 | CONFIG_LAN91C96 |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 733 | Support for SMSC's LAN91C96 chips. |
| 734 | |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 735 | CONFIG_LAN91C96_USE_32_BIT |
| 736 | Define this to enable 32 bit addressing |
| 737 | |
Ashok | 3bb46d2 | 2012-10-15 06:20:47 +0000 | [diff] [blame] | 738 | CONFIG_SMC91111 |
wdenk | f39748a | 2004-06-09 13:37:52 +0000 | [diff] [blame] | 739 | Support for SMSC's LAN91C111 chip |
| 740 | |
| 741 | CONFIG_SMC91111_BASE |
| 742 | Define this to hold the physical address |
| 743 | of the device (I/O space) |
| 744 | |
| 745 | CONFIG_SMC_USE_32_BIT |
| 746 | Define this if data bus is 32 bits |
| 747 | |
| 748 | CONFIG_SMC_USE_IOFUNCS |
| 749 | Define this to use i/o functions instead of macros |
| 750 | (some hardware wont work with macros) |
| 751 | |
Heiko Schocher | dc02bad | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 752 | CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT |
| 753 | Define this if you have more then 3 PHYs. |
| 754 | |
Macpaul Lin | b3dbf4a5 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 755 | CONFIG_FTGMAC100 |
| 756 | Support for Faraday's FTGMAC100 Gigabit SoC Ethernet |
| 757 | |
| 758 | CONFIG_FTGMAC100_EGIGA |
| 759 | Define this to use GE link update with gigabit PHY. |
| 760 | Define this if FTGMAC100 is connected to gigabit PHY. |
| 761 | If your system has 10/100 PHY only, it might not occur |
| 762 | wrong behavior. Because PHY usually return timeout or |
| 763 | useless data when polling gigabit status and gigabit |
| 764 | control registers. This behavior won't affect the |
| 765 | correctnessof 10/100 link speed update. |
| 766 | |
Yoshihiro Shimoda | 3d0075f | 2011-01-27 10:06:03 +0900 | [diff] [blame] | 767 | CONFIG_SH_ETHER |
| 768 | Support for Renesas on-chip Ethernet controller |
| 769 | |
| 770 | CONFIG_SH_ETHER_USE_PORT |
| 771 | Define the number of ports to be used |
| 772 | |
| 773 | CONFIG_SH_ETHER_PHY_ADDR |
| 774 | Define the ETH PHY's address |
| 775 | |
Yoshihiro Shimoda | 68260aa | 2011-01-27 10:06:08 +0900 | [diff] [blame] | 776 | CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 777 | If this option is set, the driver enables cache flush. |
| 778 | |
Vadim Bendebury | 5e12472 | 2011-10-17 08:36:14 +0000 | [diff] [blame] | 779 | - TPM Support: |
Che-liang Chiou | 90899cc | 2013-04-12 11:04:34 +0000 | [diff] [blame] | 780 | CONFIG_TPM |
| 781 | Support TPM devices. |
| 782 | |
Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 783 | CONFIG_TPM_TIS_INFINEON |
| 784 | Support for Infineon i2c bus TPM devices. Only one device |
Tom Wai-Hong Tam | 1b393db | 2013-04-12 11:04:37 +0000 | [diff] [blame] | 785 | per system is supported at this time. |
| 786 | |
Tom Wai-Hong Tam | 1b393db | 2013-04-12 11:04:37 +0000 | [diff] [blame] | 787 | CONFIG_TPM_TIS_I2C_BURST_LIMITATION |
| 788 | Define the burst count bytes upper limit |
| 789 | |
Christophe Ricard | 3aa7408 | 2016-01-21 23:27:13 +0100 | [diff] [blame] | 790 | CONFIG_TPM_ST33ZP24 |
| 791 | Support for STMicroelectronics TPM devices. Requires DM_TPM support. |
| 792 | |
| 793 | CONFIG_TPM_ST33ZP24_I2C |
| 794 | Support for STMicroelectronics ST33ZP24 I2C devices. |
| 795 | Requires TPM_ST33ZP24 and I2C. |
| 796 | |
Christophe Ricard | b75fdc1 | 2016-01-21 23:27:14 +0100 | [diff] [blame] | 797 | CONFIG_TPM_ST33ZP24_SPI |
| 798 | Support for STMicroelectronics ST33ZP24 SPI devices. |
| 799 | Requires TPM_ST33ZP24 and SPI. |
| 800 | |
Dirk Eibach | c01939c | 2013-06-26 15:55:15 +0200 | [diff] [blame] | 801 | CONFIG_TPM_ATMEL_TWI |
| 802 | Support for Atmel TWI TPM device. Requires I2C support. |
| 803 | |
Che-liang Chiou | 90899cc | 2013-04-12 11:04:34 +0000 | [diff] [blame] | 804 | CONFIG_TPM_TIS_LPC |
Vadim Bendebury | 5e12472 | 2011-10-17 08:36:14 +0000 | [diff] [blame] | 805 | Support for generic parallel port TPM devices. Only one device |
| 806 | per system is supported at this time. |
| 807 | |
| 808 | CONFIG_TPM_TIS_BASE_ADDRESS |
| 809 | Base address where the generic TPM device is mapped |
| 810 | to. Contemporary x86 systems usually map it at |
| 811 | 0xfed40000. |
| 812 | |
Reinhard Pfau | be6c152 | 2013-06-26 15:55:13 +0200 | [diff] [blame] | 813 | CONFIG_TPM |
| 814 | Define this to enable the TPM support library which provides |
| 815 | functional interfaces to some TPM commands. |
| 816 | Requires support for a TPM device. |
| 817 | |
| 818 | CONFIG_TPM_AUTH_SESSIONS |
| 819 | Define this to enable authorized functions in the TPM library. |
| 820 | Requires CONFIG_TPM and CONFIG_SHA1. |
| 821 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 822 | - USB Support: |
| 823 | At the moment only the UHCI host controller is |
Heiko Schocher | 064b55c | 2017-06-14 05:49:40 +0200 | [diff] [blame] | 824 | supported (PIP405, MIP405); define |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 825 | CONFIG_USB_UHCI to enable it. |
| 826 | define CONFIG_USB_KEYBOARD to enable the USB Keyboard |
wdenk | 30d56fa | 2004-10-09 22:44:59 +0000 | [diff] [blame] | 827 | and define CONFIG_USB_STORAGE to enable the USB |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 828 | storage devices. |
| 829 | Note: |
| 830 | Supported are USB Keyboards and USB Floppy drives |
| 831 | (TEAC FD-05PUB). |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 832 | |
Simon Glass | 9ab4ce2 | 2012-02-27 10:52:47 +0000 | [diff] [blame] | 833 | CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the |
| 834 | txfilltuning field in the EHCI controller on reset. |
| 835 | |
Oleksandr Tymoshenko | 6e9e062 | 2014-02-01 21:51:25 -0700 | [diff] [blame] | 836 | CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 |
| 837 | HW module registers. |
| 838 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 839 | - USB Device: |
| 840 | Define the below if you wish to use the USB console. |
| 841 | Once firmware is rebuilt from a serial console issue the |
| 842 | command "setenv stdin usbtty; setenv stdout usbtty" and |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 843 | attach your USB cable. The Unix command "dmesg" should print |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 844 | it has found a new device. The environment variable usbtty |
| 845 | can be set to gserial or cdc_acm to enable your device to |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 846 | appear to a USB host as a Linux gserial device or a |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 847 | Common Device Class Abstract Control Model serial device. |
| 848 | If you select usbtty = gserial you should be able to enumerate |
| 849 | a Linux host by |
| 850 | # modprobe usbserial vendor=0xVendorID product=0xProductID |
| 851 | else if using cdc_acm, simply setting the environment |
| 852 | variable usbtty to be cdc_acm should suffice. The following |
| 853 | might be defined in YourBoardName.h |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 854 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 855 | CONFIG_USB_DEVICE |
| 856 | Define this to build a UDC device |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 857 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 858 | CONFIG_USB_TTY |
| 859 | Define this to have a tty type of device available to |
| 860 | talk to the UDC device |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 861 | |
Vipin KUMAR | f9da0f8 | 2012-03-26 15:38:06 +0530 | [diff] [blame] | 862 | CONFIG_USBD_HS |
| 863 | Define this to enable the high speed support for usb |
| 864 | device and usbtty. If this feature is enabled, a routine |
| 865 | int is_usbd_high_speed(void) |
| 866 | also needs to be defined by the driver to dynamically poll |
| 867 | whether the enumeration has succeded at high speed or full |
| 868 | speed. |
| 869 | |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 870 | If you have a USB-IF assigned VendorID then you may wish to |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 871 | define your own vendor specific values either in BoardName.h |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 872 | or directly in usbd_vendor_info.h. If you don't define |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 873 | CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME, |
| 874 | CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot |
| 875 | should pretend to be a Linux device to it's target host. |
| 876 | |
| 877 | CONFIG_USBD_MANUFACTURER |
| 878 | Define this string as the name of your company for |
| 879 | - CONFIG_USBD_MANUFACTURER "my company" |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 880 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 881 | CONFIG_USBD_PRODUCT_NAME |
| 882 | Define this string as the name of your product |
| 883 | - CONFIG_USBD_PRODUCT_NAME "acme usb device" |
| 884 | |
| 885 | CONFIG_USBD_VENDORID |
| 886 | Define this as your assigned Vendor ID from the USB |
| 887 | Implementors Forum. This *must* be a genuine Vendor ID |
| 888 | to avoid polluting the USB namespace. |
| 889 | - CONFIG_USBD_VENDORID 0xFFFF |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 890 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 891 | CONFIG_USBD_PRODUCTID |
| 892 | Define this as the unique Product ID |
| 893 | for your device |
| 894 | - CONFIG_USBD_PRODUCTID 0xFFFF |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 895 | |
Igor Grinberg | d70a560 | 2011-12-12 12:08:35 +0200 | [diff] [blame] | 896 | - ULPI Layer Support: |
| 897 | The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via |
| 898 | the generic ULPI layer. The generic layer accesses the ULPI PHY |
| 899 | via the platform viewport, so you need both the genric layer and |
| 900 | the viewport enabled. Currently only Chipidea/ARC based |
| 901 | viewport is supported. |
| 902 | To enable the ULPI layer support, define CONFIG_USB_ULPI and |
| 903 | CONFIG_USB_ULPI_VIEWPORT in your board configuration file. |
Lucas Stach | 6d365ea | 2012-10-01 00:44:35 +0200 | [diff] [blame] | 904 | If your ULPI phy needs a different reference clock than the |
| 905 | standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to |
| 906 | the appropriate value in Hz. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 907 | |
| 908 | - MMC Support: |
| 909 | The MMC controller on the Intel PXA is supported. To |
| 910 | enable this define CONFIG_MMC. The MMC can be |
| 911 | accessed from the boot prompt by mapping the device |
| 912 | to physical memory similar to flash. Command line is |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 913 | enabled with CONFIG_CMD_MMC. The MMC driver also works with |
| 914 | the FAT fs. This is enabled with CONFIG_CMD_FAT. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 915 | |
Yoshihiro Shimoda | afb3566 | 2011-07-04 22:21:22 +0000 | [diff] [blame] | 916 | CONFIG_SH_MMCIF |
| 917 | Support for Renesas on-chip MMCIF controller |
| 918 | |
| 919 | CONFIG_SH_MMCIF_ADDR |
| 920 | Define the base address of MMCIF registers |
| 921 | |
| 922 | CONFIG_SH_MMCIF_CLK |
| 923 | Define the clock frequency for MMCIF |
| 924 | |
Tom Rini | b3ba6e9 | 2013-03-14 05:32:47 +0000 | [diff] [blame] | 925 | - USB Device Firmware Update (DFU) class support: |
Marek Vasut | bb4059a | 2018-02-16 16:41:18 +0100 | [diff] [blame] | 926 | CONFIG_DFU_OVER_USB |
Tom Rini | b3ba6e9 | 2013-03-14 05:32:47 +0000 | [diff] [blame] | 927 | This enables the USB portion of the DFU USB class |
| 928 | |
Pantelis Antoniou | c663176 | 2013-03-14 05:32:52 +0000 | [diff] [blame] | 929 | CONFIG_DFU_NAND |
| 930 | This enables support for exposing NAND devices via DFU. |
| 931 | |
Afzal Mohammed | a9479f0 | 2013-09-18 01:15:24 +0530 | [diff] [blame] | 932 | CONFIG_DFU_RAM |
| 933 | This enables support for exposing RAM via DFU. |
| 934 | Note: DFU spec refer to non-volatile memory usage, but |
| 935 | allow usages beyond the scope of spec - here RAM usage, |
| 936 | one that would help mostly the developer. |
| 937 | |
Heiko Schocher | e7e75c7 | 2013-06-12 06:05:51 +0200 | [diff] [blame] | 938 | CONFIG_SYS_DFU_DATA_BUF_SIZE |
| 939 | Dfu transfer uses a buffer before writing data to the |
| 940 | raw storage device. Make the size (in bytes) of this buffer |
| 941 | configurable. The size of this buffer is also configurable |
| 942 | through the "dfu_bufsiz" environment variable. |
| 943 | |
Pantelis Antoniou | ea2453d | 2013-03-14 05:32:48 +0000 | [diff] [blame] | 944 | CONFIG_SYS_DFU_MAX_FILE_SIZE |
| 945 | When updating files rather than the raw storage device, |
| 946 | we use a static buffer to copy the file into and then write |
| 947 | the buffer once we've been given the whole file. Define |
| 948 | this to the maximum filesize (in bytes) for the buffer. |
| 949 | Default is 4 MiB if undefined. |
| 950 | |
Heiko Schocher | 001a831 | 2014-03-18 08:09:56 +0100 | [diff] [blame] | 951 | DFU_DEFAULT_POLL_TIMEOUT |
| 952 | Poll timeout [ms], is the timeout a device can send to the |
| 953 | host. The host must wait for this timeout before sending |
| 954 | a subsequent DFU_GET_STATUS request to the device. |
| 955 | |
| 956 | DFU_MANIFEST_POLL_TIMEOUT |
| 957 | Poll timeout [ms], which the device sends to the host when |
| 958 | entering dfuMANIFEST state. Host waits this timeout, before |
| 959 | sending again an USB request to the device. |
| 960 | |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 961 | - Journaling Flash filesystem support: |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 962 | CONFIG_SYS_JFFS2_FIRST_SECTOR, |
| 963 | CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 964 | Define these for a default partition on a NOR device |
| 965 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 966 | - Keyboard Support: |
Simon Glass | 39f615e | 2015-11-11 10:05:47 -0700 | [diff] [blame] | 967 | See Kconfig help for available keyboard drivers. |
| 968 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 969 | - LCD Support: CONFIG_LCD |
| 970 | |
| 971 | Define this to enable LCD support (for output to LCD |
| 972 | display); also select one of the supported displays |
| 973 | by defining one of these: |
| 974 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 975 | CONFIG_NEC_NL6448AC33: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 976 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 977 | NEC NL6448AC33-18. Active, color, single scan. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 978 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 979 | CONFIG_NEC_NL6448BC20 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 980 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 981 | NEC NL6448BC20-08. 6.5", 640x480. |
| 982 | Active, color, single scan. |
| 983 | |
| 984 | CONFIG_NEC_NL6448BC33_54 |
| 985 | |
| 986 | NEC NL6448BC33-54. 10.4", 640x480. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 987 | Active, color, single scan. |
| 988 | |
| 989 | CONFIG_SHARP_16x9 |
| 990 | |
| 991 | Sharp 320x240. Active, color, single scan. |
| 992 | It isn't 16x9, and I am not sure what it is. |
| 993 | |
| 994 | CONFIG_SHARP_LQ64D341 |
| 995 | |
| 996 | Sharp LQ64D341 display, 640x480. |
| 997 | Active, color, single scan. |
| 998 | |
| 999 | CONFIG_HLD1045 |
| 1000 | |
| 1001 | HLD1045 display, 640x480. |
| 1002 | Active, color, single scan. |
| 1003 | |
| 1004 | CONFIG_OPTREX_BW |
| 1005 | |
| 1006 | Optrex CBL50840-2 NF-FW 99 22 M5 |
| 1007 | or |
| 1008 | Hitachi LMG6912RPFC-00T |
| 1009 | or |
| 1010 | Hitachi SP14Q002 |
| 1011 | |
| 1012 | 320x240. Black & white. |
| 1013 | |
Simon Glass | 676d319 | 2012-10-17 13:24:54 +0000 | [diff] [blame] | 1014 | CONFIG_LCD_ALIGNMENT |
| 1015 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1016 | Normally the LCD is page-aligned (typically 4KB). If this is |
Simon Glass | 676d319 | 2012-10-17 13:24:54 +0000 | [diff] [blame] | 1017 | defined then the LCD will be aligned to this value instead. |
| 1018 | For ARM it is sometimes useful to use MMU_SECTION_SIZE |
| 1019 | here, since it is cheaper to change data cache settings on |
| 1020 | a per-section basis. |
| 1021 | |
| 1022 | |
Hannes Petermaier | 604c7d4 | 2015-03-27 08:01:38 +0100 | [diff] [blame] | 1023 | CONFIG_LCD_ROTATION |
| 1024 | |
| 1025 | Sometimes, for example if the display is mounted in portrait |
| 1026 | mode or even if it's mounted landscape but rotated by 180degree, |
| 1027 | we need to rotate our content of the display relative to the |
| 1028 | framebuffer, so that user can read the messages which are |
| 1029 | printed out. |
| 1030 | Once CONFIG_LCD_ROTATION is defined, the lcd_console will be |
| 1031 | initialized with a given rotation from "vl_rot" out of |
| 1032 | "vidinfo_t" which is provided by the board specific code. |
| 1033 | The value for vl_rot is coded as following (matching to |
| 1034 | fbcon=rotate:<n> linux-kernel commandline): |
| 1035 | 0 = no rotation respectively 0 degree |
| 1036 | 1 = 90 degree rotation |
| 1037 | 2 = 180 degree rotation |
| 1038 | 3 = 270 degree rotation |
| 1039 | |
| 1040 | If CONFIG_LCD_ROTATION is not defined, the console will be |
| 1041 | initialized with 0degree rotation. |
| 1042 | |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 1043 | - MII/PHY support: |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 1044 | CONFIG_PHY_CLOCK_FREQ (ppc4xx) |
| 1045 | |
| 1046 | The clock frequency of the MII bus |
| 1047 | |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 1048 | CONFIG_PHY_CMD_DELAY (ppc4xx) |
| 1049 | |
| 1050 | Some PHY like Intel LXT971A need extra delay after |
| 1051 | command issued before MII status register can be read |
| 1052 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1053 | - IP address: |
| 1054 | CONFIG_IPADDR |
| 1055 | |
| 1056 | Define a default value for the IP address to use for |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1057 | the default Ethernet interface, in case this is not |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1058 | determined through e.g. bootp. |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1059 | (Environment variable "ipaddr") |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1060 | |
| 1061 | - Server IP address: |
| 1062 | CONFIG_SERVERIP |
| 1063 | |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1064 | Defines a default value for the IP address of a TFTP |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1065 | server to contact when using the "tftboot" command. |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1066 | (Environment variable "serverip") |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1067 | |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1068 | - Gateway IP address: |
| 1069 | CONFIG_GATEWAYIP |
| 1070 | |
| 1071 | Defines a default value for the IP address of the |
| 1072 | default router where packets to other networks are |
| 1073 | sent to. |
| 1074 | (Environment variable "gatewayip") |
| 1075 | |
| 1076 | - Subnet mask: |
| 1077 | CONFIG_NETMASK |
| 1078 | |
| 1079 | Defines a default value for the subnet mask (or |
| 1080 | routing prefix) which is used to determine if an IP |
| 1081 | address belongs to the local subnet or needs to be |
| 1082 | forwarded through a router. |
| 1083 | (Environment variable "netmask") |
| 1084 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1085 | - BOOTP Recovery Mode: |
| 1086 | CONFIG_BOOTP_RANDOM_DELAY |
| 1087 | |
| 1088 | If you have many targets in a network that try to |
| 1089 | boot using BOOTP, you may want to avoid that all |
| 1090 | systems send out BOOTP requests at precisely the same |
| 1091 | moment (which would happen for instance at recovery |
| 1092 | from a power failure, when all systems will try to |
| 1093 | boot, thus flooding the BOOTP server. Defining |
| 1094 | CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be |
| 1095 | inserted before sending out BOOTP requests. The |
Wolfgang Denk | 6c33c78 | 2007-08-06 23:21:05 +0200 | [diff] [blame] | 1096 | following delays are inserted then: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1097 | |
| 1098 | 1st BOOTP request: delay 0 ... 1 sec |
| 1099 | 2nd BOOTP request: delay 0 ... 2 sec |
| 1100 | 3rd BOOTP request: delay 0 ... 4 sec |
| 1101 | 4th and following |
| 1102 | BOOTP requests: delay 0 ... 8 sec |
| 1103 | |
Thierry Reding | 92ac8ac | 2014-08-19 10:21:24 +0200 | [diff] [blame] | 1104 | CONFIG_BOOTP_ID_CACHE_SIZE |
| 1105 | |
| 1106 | BOOTP packets are uniquely identified using a 32-bit ID. The |
| 1107 | server will copy the ID from client requests to responses and |
| 1108 | U-Boot will use this to determine if it is the destination of |
| 1109 | an incoming response. Some servers will check that addresses |
| 1110 | aren't in use before handing them out (usually using an ARP |
| 1111 | ping) and therefore take up to a few hundred milliseconds to |
| 1112 | respond. Network congestion may also influence the time it |
| 1113 | takes for a response to make it back to the client. If that |
| 1114 | time is too long, U-Boot will retransmit requests. In order |
| 1115 | to allow earlier responses to still be accepted after these |
| 1116 | retransmissions, U-Boot's BOOTP client keeps a small cache of |
| 1117 | IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this |
| 1118 | cache. The default is to keep IDs for up to four outstanding |
| 1119 | requests. Increasing this will allow U-Boot to accept offers |
| 1120 | from a BOOTP client in networks with unusually high latency. |
| 1121 | |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1122 | - DHCP Advanced Options: |
Joe Hershberger | 2c00e09 | 2012-05-23 07:59:19 +0000 | [diff] [blame] | 1123 | |
Joe Hershberger | d22c338 | 2012-05-23 08:00:12 +0000 | [diff] [blame] | 1124 | - Link-local IP address negotiation: |
| 1125 | Negotiate with other link-local clients on the local network |
| 1126 | for an address that doesn't require explicit configuration. |
| 1127 | This is especially useful if a DHCP server cannot be guaranteed |
| 1128 | to exist in all environments that the device must operate. |
| 1129 | |
| 1130 | See doc/README.link-local for more information. |
| 1131 | |
Prabhakar Kushwaha | 24acb83 | 2017-11-23 16:51:32 +0530 | [diff] [blame] | 1132 | - MAC address from environment variables |
| 1133 | |
| 1134 | FDT_SEQ_MACADDR_FROM_ENV |
| 1135 | |
| 1136 | Fix-up device tree with MAC addresses fetched sequentially from |
| 1137 | environment variables. This config work on assumption that |
| 1138 | non-usable ethernet node of device-tree are either not present |
| 1139 | or their status has been marked as "disabled". |
| 1140 | |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 1141 | - CDP Options: |
wdenk | 6e59238 | 2004-04-18 17:39:38 +0000 | [diff] [blame] | 1142 | CONFIG_CDP_DEVICE_ID |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 1143 | |
| 1144 | The device id used in CDP trigger frames. |
| 1145 | |
| 1146 | CONFIG_CDP_DEVICE_ID_PREFIX |
| 1147 | |
| 1148 | A two character string which is prefixed to the MAC address |
| 1149 | of the device. |
| 1150 | |
| 1151 | CONFIG_CDP_PORT_ID |
| 1152 | |
| 1153 | A printf format string which contains the ascii name of |
| 1154 | the port. Normally is set to "eth%d" which sets |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1155 | eth0 for the first Ethernet, eth1 for the second etc. |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 1156 | |
| 1157 | CONFIG_CDP_CAPABILITIES |
| 1158 | |
| 1159 | A 32bit integer which indicates the device capabilities; |
| 1160 | 0x00000010 for a normal host which does not forwards. |
| 1161 | |
| 1162 | CONFIG_CDP_VERSION |
| 1163 | |
| 1164 | An ascii string containing the version of the software. |
| 1165 | |
| 1166 | CONFIG_CDP_PLATFORM |
| 1167 | |
| 1168 | An ascii string containing the name of the platform. |
| 1169 | |
| 1170 | CONFIG_CDP_TRIGGER |
| 1171 | |
| 1172 | A 32bit integer sent on the trigger. |
| 1173 | |
| 1174 | CONFIG_CDP_POWER_CONSUMPTION |
| 1175 | |
| 1176 | A 16bit integer containing the power consumption of the |
| 1177 | device in .1 of milliwatts. |
| 1178 | |
| 1179 | CONFIG_CDP_APPLIANCE_VLAN_TYPE |
| 1180 | |
| 1181 | A byte containing the id of the VLAN. |
| 1182 | |
Uri Mashiach | 79267ed | 2017-01-19 10:51:05 +0200 | [diff] [blame] | 1183 | - Status LED: CONFIG_LED_STATUS |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1184 | |
| 1185 | Several configurations allow to display the current |
| 1186 | status using a LED. For instance, the LED will blink |
| 1187 | fast while running U-Boot code, stop blinking as |
| 1188 | soon as a reply to a BOOTP request was received, and |
| 1189 | start blinking slow once the Linux kernel is running |
| 1190 | (supported by a status LED driver in the Linux |
Uri Mashiach | 79267ed | 2017-01-19 10:51:05 +0200 | [diff] [blame] | 1191 | kernel). Defining CONFIG_LED_STATUS enables this |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1192 | feature in U-Boot. |
| 1193 | |
Igor Grinberg | 1df7bbb | 2013-11-08 01:03:50 +0200 | [diff] [blame] | 1194 | Additional options: |
| 1195 | |
Uri Mashiach | 79267ed | 2017-01-19 10:51:05 +0200 | [diff] [blame] | 1196 | CONFIG_LED_STATUS_GPIO |
Igor Grinberg | 1df7bbb | 2013-11-08 01:03:50 +0200 | [diff] [blame] | 1197 | The status LED can be connected to a GPIO pin. |
| 1198 | In such cases, the gpio_led driver can be used as a |
Uri Mashiach | 79267ed | 2017-01-19 10:51:05 +0200 | [diff] [blame] | 1199 | status LED backend implementation. Define CONFIG_LED_STATUS_GPIO |
Igor Grinberg | 1df7bbb | 2013-11-08 01:03:50 +0200 | [diff] [blame] | 1200 | to include the gpio_led driver in the U-Boot binary. |
| 1201 | |
Igor Grinberg | 9dfdcdf | 2013-11-08 01:03:52 +0200 | [diff] [blame] | 1202 | CONFIG_GPIO_LED_INVERTED_TABLE |
| 1203 | Some GPIO connected LEDs may have inverted polarity in which |
| 1204 | case the GPIO high value corresponds to LED off state and |
| 1205 | GPIO low value corresponds to LED on state. |
| 1206 | In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined |
| 1207 | with a list of GPIO LEDs that have inverted polarity. |
| 1208 | |
Tom Rini | 55dabcc | 2021-08-18 23:12:24 -0400 | [diff] [blame] | 1209 | - I2C Support: |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 1210 | CONFIG_SYS_NUM_I2C_BUSES |
Simon Glass | 945a18e | 2016-10-02 18:01:05 -0600 | [diff] [blame] | 1211 | Hold the number of i2c buses you want to use. |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 1212 | |
| 1213 | CONFIG_SYS_I2C_DIRECT_BUS |
| 1214 | define this, if you don't use i2c muxes on your hardware. |
| 1215 | if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can |
| 1216 | omit this define. |
| 1217 | |
| 1218 | CONFIG_SYS_I2C_MAX_HOPS |
| 1219 | define how many muxes are maximal consecutively connected |
| 1220 | on one i2c bus. If you not use i2c muxes, omit this |
| 1221 | define. |
| 1222 | |
| 1223 | CONFIG_SYS_I2C_BUSES |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1224 | hold a list of buses you want to use, only used if |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 1225 | CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example |
| 1226 | a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and |
| 1227 | CONFIG_SYS_NUM_I2C_BUSES = 9: |
| 1228 | |
| 1229 | CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ |
| 1230 | {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ |
| 1231 | {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \ |
| 1232 | {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \ |
| 1233 | {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \ |
| 1234 | {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \ |
| 1235 | {1, {I2C_NULL_HOP}}, \ |
| 1236 | {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \ |
| 1237 | {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \ |
| 1238 | } |
| 1239 | |
| 1240 | which defines |
| 1241 | bus 0 on adapter 0 without a mux |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 1242 | bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1 |
| 1243 | bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2 |
| 1244 | bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3 |
| 1245 | bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4 |
| 1246 | bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5 |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 1247 | bus 6 on adapter 1 without a mux |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 1248 | bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1 |
| 1249 | bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2 |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 1250 | |
| 1251 | If you do not have i2c muxes on your board, omit this define. |
| 1252 | |
Simon Glass | ce3b5d6 | 2017-05-12 21:10:00 -0600 | [diff] [blame] | 1253 | - Legacy I2C Support: |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 1254 | If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1255 | then the following macros need to be defined (examples are |
| 1256 | from include/configs/lwmon.h): |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1257 | |
| 1258 | I2C_INIT |
| 1259 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1260 | (Optional). Any commands necessary to enable the I2C |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1261 | controller or configure ports. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1262 | |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 1263 | eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1264 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1265 | I2C_ACTIVE |
| 1266 | |
| 1267 | The code necessary to make the I2C data line active |
| 1268 | (driven). If the data line is open collector, this |
| 1269 | define can be null. |
| 1270 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1271 | eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) |
| 1272 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1273 | I2C_TRISTATE |
| 1274 | |
| 1275 | The code necessary to make the I2C data line tri-stated |
| 1276 | (inactive). If the data line is open collector, this |
| 1277 | define can be null. |
| 1278 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1279 | eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) |
| 1280 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1281 | I2C_READ |
| 1282 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 1283 | Code that returns true if the I2C data line is high, |
| 1284 | false if it is low. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1285 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1286 | eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) |
| 1287 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1288 | I2C_SDA(bit) |
| 1289 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 1290 | If <bit> is true, sets the I2C data line high. If it |
| 1291 | is false, it clears it (low). |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1292 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1293 | eg: #define I2C_SDA(bit) \ |
wdenk | 2535d60 | 2003-07-17 23:16:40 +0000 | [diff] [blame] | 1294 | if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 1295 | else immr->im_cpm.cp_pbdat &= ~PB_SDA |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1296 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1297 | I2C_SCL(bit) |
| 1298 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 1299 | If <bit> is true, sets the I2C clock line high. If it |
| 1300 | is false, it clears it (low). |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1301 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1302 | eg: #define I2C_SCL(bit) \ |
wdenk | 2535d60 | 2003-07-17 23:16:40 +0000 | [diff] [blame] | 1303 | if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 1304 | else immr->im_cpm.cp_pbdat &= ~PB_SCL |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1305 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1306 | I2C_DELAY |
| 1307 | |
| 1308 | This delay is invoked four times per clock cycle so this |
| 1309 | controls the rate of data transfer. The data rate thus |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1310 | is 1 / (I2C_DELAY * 4). Often defined to be something |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 1311 | like: |
| 1312 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1313 | #define I2C_DELAY udelay(2) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1314 | |
Mike Frysinger | 793b572 | 2010-07-21 13:38:02 -0400 | [diff] [blame] | 1315 | CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA |
| 1316 | |
| 1317 | If your arch supports the generic GPIO framework (asm/gpio.h), |
| 1318 | then you may alternatively define the two GPIOs that are to be |
| 1319 | used as SCL / SDA. Any of the previous I2C_xxx macros will |
| 1320 | have GPIO-based defaults assigned to them as appropriate. |
| 1321 | |
| 1322 | You should define these to the GPIO value as given directly to |
| 1323 | the generic GPIO functions. |
| 1324 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1325 | CONFIG_SYS_I2C_INIT_BOARD |
wdenk | 47cd00f | 2003-03-06 13:39:27 +0000 | [diff] [blame] | 1326 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1327 | When a board is reset during an i2c bus transfer |
| 1328 | chips might think that the current transfer is still |
| 1329 | in progress. On some boards it is possible to access |
| 1330 | the i2c SCLK line directly, either by using the |
| 1331 | processor pin as a GPIO or by having a second pin |
| 1332 | connected to the bus. If this option is defined a |
| 1333 | custom i2c_init_board() routine in boards/xxx/board.c |
| 1334 | is run early in the boot sequence. |
wdenk | 47cd00f | 2003-03-06 13:39:27 +0000 | [diff] [blame] | 1335 | |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1336 | CONFIG_I2C_MULTI_BUS |
| 1337 | |
| 1338 | This option allows the use of multiple I2C buses, each of which |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 1339 | must have a controller. At any point in time, only one bus is |
| 1340 | active. To switch to a different bus, use the 'i2c dev' command. |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1341 | Note that bus numbering is zero-based. |
| 1342 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1343 | CONFIG_SYS_I2C_NOPROBES |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1344 | |
| 1345 | This option specifies a list of I2C devices that will be skipped |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 1346 | when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS |
Peter Tyser | 0f89c54 | 2009-04-18 22:34:03 -0500 | [diff] [blame] | 1347 | is set, specify a list of bus-device pairs. Otherwise, specify |
| 1348 | a 1D array of device addresses |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1349 | |
| 1350 | e.g. |
| 1351 | #undef CONFIG_I2C_MULTI_BUS |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 1352 | #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1353 | |
| 1354 | will skip addresses 0x50 and 0x68 on a board with one I2C bus |
| 1355 | |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 1356 | #define CONFIG_I2C_MULTI_BUS |
Simon Glass | 945a18e | 2016-10-02 18:01:05 -0600 | [diff] [blame] | 1357 | #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 1358 | |
| 1359 | will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 |
| 1360 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1361 | CONFIG_SYS_SPD_BUS_NUM |
Timur Tabi | be5e618 | 2006-11-03 19:15:00 -0600 | [diff] [blame] | 1362 | |
| 1363 | If defined, then this indicates the I2C bus number for DDR SPD. |
| 1364 | If not defined, then U-Boot assumes that SPD is on I2C bus 0. |
| 1365 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1366 | CONFIG_SYS_RTC_BUS_NUM |
Stefan Roese | 0dc018e | 2007-02-20 10:51:26 +0100 | [diff] [blame] | 1367 | |
| 1368 | If defined, then this indicates the I2C bus number for the RTC. |
| 1369 | If not defined, then U-Boot assumes that RTC is on I2C bus 0. |
| 1370 | |
Andrew Dyer | 2ac6985 | 2008-12-29 17:36:01 -0600 | [diff] [blame] | 1371 | CONFIG_SOFT_I2C_READ_REPEATED_START |
| 1372 | |
| 1373 | defining this will force the i2c_read() function in |
| 1374 | the soft_i2c driver to perform an I2C repeated start |
| 1375 | between writing the address pointer and reading the |
| 1376 | data. If this define is omitted the default behaviour |
| 1377 | of doing a stop-start sequence will be used. Most I2C |
| 1378 | devices can use either method, but some require one or |
| 1379 | the other. |
Timur Tabi | be5e618 | 2006-11-03 19:15:00 -0600 | [diff] [blame] | 1380 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1381 | - SPI Support: CONFIG_SPI |
| 1382 | |
| 1383 | Enables SPI driver (so far only tested with |
| 1384 | SPI EEPROM, also an instance works with Crystal A/D and |
| 1385 | D/As on the SACSng board) |
| 1386 | |
Heiko Schocher | f659b57 | 2014-07-14 10:22:11 +0200 | [diff] [blame] | 1387 | CONFIG_SYS_SPI_MXC_WAIT |
| 1388 | Timeout for waiting until spi transfer completed. |
| 1389 | default: (CONFIG_SYS_HZ/100) /* 10 ms */ |
| 1390 | |
Matthias Fuchs | 0133502 | 2007-12-27 17:12:34 +0100 | [diff] [blame] | 1391 | - FPGA Support: CONFIG_FPGA |
| 1392 | |
| 1393 | Enables FPGA subsystem. |
| 1394 | |
| 1395 | CONFIG_FPGA_<vendor> |
| 1396 | |
| 1397 | Enables support for specific chip vendors. |
| 1398 | (ALTERA, XILINX) |
| 1399 | |
| 1400 | CONFIG_FPGA_<family> |
| 1401 | |
| 1402 | Enables support for FPGA family. |
| 1403 | (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) |
| 1404 | |
| 1405 | CONFIG_FPGA_COUNT |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1406 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1407 | Specify the number of FPGA devices to support. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1408 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1409 | CONFIG_SYS_FPGA_PROG_FEEDBACK |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1410 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1411 | Enable printing of hash marks during FPGA configuration. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1412 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1413 | CONFIG_SYS_FPGA_CHECK_BUSY |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1414 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1415 | Enable checks on FPGA configuration interface busy |
| 1416 | status by the configuration function. This option |
| 1417 | will require a board or device specific function to |
| 1418 | be written. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1419 | |
| 1420 | CONFIG_FPGA_DELAY |
| 1421 | |
| 1422 | If defined, a function that provides delays in the FPGA |
| 1423 | configuration driver. |
| 1424 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1425 | CONFIG_SYS_FPGA_CHECK_CTRLC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1426 | Allow Control-C to interrupt FPGA configuration |
| 1427 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1428 | CONFIG_SYS_FPGA_CHECK_ERROR |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1429 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1430 | Check for configuration errors during FPGA bitfile |
| 1431 | loading. For example, abort during Virtex II |
| 1432 | configuration if the INIT_B line goes low (which |
| 1433 | indicated a CRC error). |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1434 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1435 | CONFIG_SYS_FPGA_WAIT_INIT |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1436 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1437 | Maximum time to wait for the INIT_B line to de-assert |
| 1438 | after PROB_B has been de-asserted during a Virtex II |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1439 | FPGA configuration sequence. The default time is 500 |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1440 | ms. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1441 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1442 | CONFIG_SYS_FPGA_WAIT_BUSY |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1443 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1444 | Maximum time to wait for BUSY to de-assert during |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1445 | Virtex II FPGA configuration. The default is 5 ms. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1446 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1447 | CONFIG_SYS_FPGA_WAIT_CONFIG |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1448 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1449 | Time to wait after FPGA configuration. The default is |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1450 | 200 ms. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1451 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1452 | - Vendor Parameter Protection: |
| 1453 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1454 | U-Boot considers the values of the environment |
| 1455 | variables "serial#" (Board Serial Number) and |
wdenk | 7152b1d | 2003-09-05 23:19:14 +0000 | [diff] [blame] | 1456 | "ethaddr" (Ethernet Address) to be parameters that |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1457 | are set once by the board vendor / manufacturer, and |
| 1458 | protects these variables from casual modification by |
| 1459 | the user. Once set, these variables are read-only, |
| 1460 | and write or delete attempts are rejected. You can |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1461 | change this behaviour: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1462 | |
| 1463 | If CONFIG_ENV_OVERWRITE is #defined in your config |
| 1464 | file, the write protection for vendor parameters is |
wdenk | 47cd00f | 2003-03-06 13:39:27 +0000 | [diff] [blame] | 1465 | completely disabled. Anybody can change or delete |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1466 | these parameters. |
| 1467 | |
Joe Hershberger | 92ac520 | 2015-05-04 14:55:14 -0500 | [diff] [blame] | 1468 | Alternatively, if you define _both_ an ethaddr in the |
| 1469 | default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1470 | Ethernet address is installed in the environment, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1471 | which can be changed exactly ONCE by the user. [The |
| 1472 | serial# is unaffected by this, i. e. it remains |
| 1473 | read-only.] |
| 1474 | |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 1475 | The same can be accomplished in a more flexible way |
| 1476 | for any variable by configuring the type of access |
| 1477 | to allow for those variables in the ".flags" variable |
| 1478 | or define CONFIG_ENV_FLAGS_LIST_STATIC. |
| 1479 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1480 | - Protected RAM: |
| 1481 | CONFIG_PRAM |
| 1482 | |
| 1483 | Define this variable to enable the reservation of |
| 1484 | "protected RAM", i. e. RAM which is not overwritten |
| 1485 | by U-Boot. Define CONFIG_PRAM to hold the number of |
| 1486 | kB you want to reserve for pRAM. You can overwrite |
| 1487 | this default value by defining an environment |
| 1488 | variable "pram" to the number of kB you want to |
| 1489 | reserve. Note that the board info structure will |
| 1490 | still show the full amount of RAM. If pRAM is |
| 1491 | reserved, a new environment variable "mem" will |
| 1492 | automatically be defined to hold the amount of |
| 1493 | remaining RAM in a form that can be passed as boot |
| 1494 | argument to Linux, for instance like that: |
| 1495 | |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 1496 | setenv bootargs ... mem=\${mem} |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1497 | saveenv |
| 1498 | |
| 1499 | This way you can tell Linux not to use this memory, |
| 1500 | either, which results in a memory region that will |
| 1501 | not be affected by reboots. |
| 1502 | |
| 1503 | *WARNING* If your board configuration uses automatic |
| 1504 | detection of the RAM size, you must make sure that |
| 1505 | this memory test is non-destructive. So far, the |
| 1506 | following board configurations are known to be |
| 1507 | "pRAM-clean": |
| 1508 | |
Heiko Schocher | 5b8e76c | 2017-06-07 17:33:09 +0200 | [diff] [blame] | 1509 | IVMS8, IVML24, SPD8xx, |
Wolfgang Denk | 1b0757e | 2012-10-24 02:36:15 +0000 | [diff] [blame] | 1510 | HERMES, IP860, RPXlite, LWMON, |
Heiko Schocher | 2eb48ff | 2017-06-07 17:33:10 +0200 | [diff] [blame] | 1511 | FLAGADM |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1512 | |
| 1513 | - Error Recovery: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1514 | Note: |
| 1515 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1516 | In the current implementation, the local variables |
| 1517 | space and global environment variables space are |
| 1518 | separated. Local variables are those you define by |
| 1519 | simply typing `name=value'. To access a local |
| 1520 | variable later on, you have write `$name' or |
| 1521 | `${name}'; to execute the contents of a variable |
| 1522 | directly type `$name' at the command prompt. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1523 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1524 | Global environment variables are those you use |
| 1525 | setenv/printenv to work with. To run a command stored |
| 1526 | in such a variable, you need to use the run command, |
| 1527 | and you must not use the '$' sign to access them. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1528 | |
| 1529 | To store commands and special characters in a |
| 1530 | variable, please use double quotation marks |
| 1531 | surrounding the whole text of the variable, instead |
| 1532 | of the backslashes before semicolons and special |
| 1533 | symbols. |
| 1534 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1535 | - Command Line Editing and History: |
Marek Vasut | f3b267b | 2016-01-27 04:47:55 +0100 | [diff] [blame] | 1536 | CONFIG_CMDLINE_PS_SUPPORT |
| 1537 | |
| 1538 | Enable support for changing the command prompt string |
| 1539 | at run-time. Only static string is supported so far. |
| 1540 | The string is obtained from environment variables PS1 |
| 1541 | and PS2. |
| 1542 | |
wdenk | a8c7c70 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 1543 | - Default Environment: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1544 | CONFIG_EXTRA_ENV_SETTINGS |
| 1545 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1546 | Define this to contain any number of null terminated |
| 1547 | strings (variable = value pairs) that will be part of |
wdenk | 7152b1d | 2003-09-05 23:19:14 +0000 | [diff] [blame] | 1548 | the default environment compiled into the boot image. |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1549 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1550 | For example, place something like this in your |
| 1551 | board's config file: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1552 | |
| 1553 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 1554 | "myvar1=value1\0" \ |
| 1555 | "myvar2=value2\0" |
| 1556 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1557 | Warning: This method is based on knowledge about the |
| 1558 | internal format how the environment is stored by the |
| 1559 | U-Boot code. This is NOT an official, exported |
| 1560 | interface! Although it is unlikely that this format |
wdenk | 7152b1d | 2003-09-05 23:19:14 +0000 | [diff] [blame] | 1561 | will change soon, there is no guarantee either. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1562 | You better know what you are doing here. |
| 1563 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1564 | Note: overly (ab)use of the default environment is |
| 1565 | discouraged. Make sure to check other ways to preset |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 1566 | the environment like the "source" command or the |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1567 | boot command first. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1568 | |
Simon Glass | 06fd853 | 2012-11-30 13:01:17 +0000 | [diff] [blame] | 1569 | CONFIG_DELAY_ENVIRONMENT |
| 1570 | |
| 1571 | Normally the environment is loaded when the board is |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1572 | initialised so that it is available to U-Boot. This inhibits |
Simon Glass | 06fd853 | 2012-11-30 13:01:17 +0000 | [diff] [blame] | 1573 | that so that the environment is not available until |
| 1574 | explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL |
| 1575 | this is instead controlled by the value of |
| 1576 | /config/load-environment. |
| 1577 | |
Wolfgang Denk | 4cf2609 | 2011-10-07 09:58:21 +0200 | [diff] [blame] | 1578 | CONFIG_STANDALONE_LOAD_ADDR |
| 1579 | |
Wolfgang Denk | 6feff89 | 2011-10-09 21:06:34 +0200 | [diff] [blame] | 1580 | This option defines a board specific value for the |
| 1581 | address where standalone program gets loaded, thus |
| 1582 | overwriting the architecture dependent default |
Wolfgang Denk | 4cf2609 | 2011-10-07 09:58:21 +0200 | [diff] [blame] | 1583 | settings. |
| 1584 | |
| 1585 | - Frame Buffer Address: |
| 1586 | CONFIG_FB_ADDR |
| 1587 | |
| 1588 | Define CONFIG_FB_ADDR if you want to use specific |
Wolfgang Denk | 44a53b5 | 2013-01-03 00:43:59 +0000 | [diff] [blame] | 1589 | address for frame buffer. This is typically the case |
| 1590 | when using a graphics controller has separate video |
| 1591 | memory. U-Boot will then place the frame buffer at |
| 1592 | the given address instead of dynamically reserving it |
| 1593 | in system RAM by calling lcd_setmem(), which grabs |
| 1594 | the memory for the frame buffer depending on the |
| 1595 | configured panel size. |
Wolfgang Denk | 4cf2609 | 2011-10-07 09:58:21 +0200 | [diff] [blame] | 1596 | |
| 1597 | Please see board_init_f function. |
| 1598 | |
Detlev Zundel | cccfc2a | 2009-12-01 17:16:19 +0100 | [diff] [blame] | 1599 | - Automatic software updates via TFTP server |
| 1600 | CONFIG_UPDATE_TFTP |
| 1601 | CONFIG_UPDATE_TFTP_CNT_MAX |
| 1602 | CONFIG_UPDATE_TFTP_MSEC_MAX |
| 1603 | |
| 1604 | These options enable and control the auto-update feature; |
| 1605 | for a more detailed description refer to doc/README.update. |
| 1606 | |
| 1607 | - MTD Support (mtdparts command, UBI support) |
Heiko Schocher | ff94bc4 | 2014-06-24 10:10:04 +0200 | [diff] [blame] | 1608 | CONFIG_MTD_UBI_WL_THRESHOLD |
| 1609 | This parameter defines the maximum difference between the highest |
| 1610 | erase counter value and the lowest erase counter value of eraseblocks |
| 1611 | of UBI devices. When this threshold is exceeded, UBI starts performing |
| 1612 | wear leveling by means of moving data from eraseblock with low erase |
| 1613 | counter to eraseblocks with high erase counter. |
| 1614 | |
| 1615 | The default value should be OK for SLC NAND flashes, NOR flashes and |
| 1616 | other flashes which have eraseblock life-cycle 100000 or more. |
| 1617 | However, in case of MLC NAND flashes which typically have eraseblock |
| 1618 | life-cycle less than 10000, the threshold should be lessened (e.g., |
| 1619 | to 128 or 256, although it does not have to be power of 2). |
| 1620 | |
| 1621 | default: 4096 |
Simon Glass | c654b51 | 2014-10-23 18:58:54 -0600 | [diff] [blame] | 1622 | |
Heiko Schocher | ff94bc4 | 2014-06-24 10:10:04 +0200 | [diff] [blame] | 1623 | CONFIG_MTD_UBI_BEB_LIMIT |
| 1624 | This option specifies the maximum bad physical eraseblocks UBI |
| 1625 | expects on the MTD device (per 1024 eraseblocks). If the |
| 1626 | underlying flash does not admit of bad eraseblocks (e.g. NOR |
| 1627 | flash), this value is ignored. |
| 1628 | |
| 1629 | NAND datasheets often specify the minimum and maximum NVM |
| 1630 | (Number of Valid Blocks) for the flashes' endurance lifetime. |
| 1631 | The maximum expected bad eraseblocks per 1024 eraseblocks |
| 1632 | then can be calculated as "1024 * (1 - MinNVB / MaxNVB)", |
| 1633 | which gives 20 for most NANDs (MaxNVB is basically the total |
| 1634 | count of eraseblocks on the chip). |
| 1635 | |
| 1636 | To put it differently, if this value is 20, UBI will try to |
| 1637 | reserve about 1.9% of physical eraseblocks for bad blocks |
| 1638 | handling. And that will be 1.9% of eraseblocks on the entire |
| 1639 | NAND chip, not just the MTD partition UBI attaches. This means |
| 1640 | that if you have, say, a NAND flash chip admits maximum 40 bad |
| 1641 | eraseblocks, and it is split on two MTD partitions of the same |
| 1642 | size, UBI will reserve 40 eraseblocks when attaching a |
| 1643 | partition. |
| 1644 | |
| 1645 | default: 20 |
| 1646 | |
| 1647 | CONFIG_MTD_UBI_FASTMAP |
| 1648 | Fastmap is a mechanism which allows attaching an UBI device |
| 1649 | in nearly constant time. Instead of scanning the whole MTD device it |
| 1650 | only has to locate a checkpoint (called fastmap) on the device. |
| 1651 | The on-flash fastmap contains all information needed to attach |
| 1652 | the device. Using fastmap makes only sense on large devices where |
| 1653 | attaching by scanning takes long. UBI will not automatically install |
| 1654 | a fastmap on old images, but you can set the UBI parameter |
| 1655 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note |
| 1656 | that fastmap-enabled images are still usable with UBI implementations |
| 1657 | without fastmap support. On typical flash devices the whole fastmap |
| 1658 | fits into one PEB. UBI will reserve PEBs to hold two fastmaps. |
| 1659 | |
| 1660 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT |
| 1661 | Set this parameter to enable fastmap automatically on images |
| 1662 | without a fastmap. |
| 1663 | default: 0 |
| 1664 | |
Heiko Schocher | 0195a7b | 2015-10-22 06:19:21 +0200 | [diff] [blame] | 1665 | CONFIG_MTD_UBI_FM_DEBUG |
| 1666 | Enable UBI fastmap debug |
| 1667 | default: 0 |
| 1668 | |
Daniel Schwierzeck | 6a11cf4 | 2011-07-18 07:48:07 +0000 | [diff] [blame] | 1669 | - SPL framework |
Wolfgang Denk | 04e5ae7 | 2011-09-11 21:24:09 +0200 | [diff] [blame] | 1670 | CONFIG_SPL |
| 1671 | Enable building of SPL globally. |
Daniel Schwierzeck | 6a11cf4 | 2011-07-18 07:48:07 +0000 | [diff] [blame] | 1672 | |
Albert ARIBAUD | 6ebc346 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 1673 | CONFIG_SPL_MAX_FOOTPRINT |
| 1674 | Maximum size in memory allocated to the SPL, BSS included. |
| 1675 | When defined, the linker checks that the actual memory |
| 1676 | used by SPL from _start to __bss_end does not exceed it. |
Albert ARIBAUD | 8960af8 | 2013-04-14 04:48:38 +0000 | [diff] [blame] | 1677 | CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE |
Albert ARIBAUD | 6ebc346 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 1678 | must not be both defined at the same time. |
| 1679 | |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1680 | CONFIG_SPL_MAX_SIZE |
Albert ARIBAUD | 6ebc346 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 1681 | Maximum size of the SPL image (text, data, rodata, and |
| 1682 | linker lists sections), BSS excluded. |
| 1683 | When defined, the linker checks that the actual size does |
| 1684 | not exceed it. |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1685 | |
Scott Wood | 94a45bb | 2012-09-20 19:05:12 -0500 | [diff] [blame] | 1686 | CONFIG_SPL_RELOC_TEXT_BASE |
| 1687 | Address to relocate to. If unspecified, this is equal to |
| 1688 | CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). |
| 1689 | |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1690 | CONFIG_SPL_BSS_START_ADDR |
| 1691 | Link address for the BSS within the SPL binary. |
| 1692 | |
| 1693 | CONFIG_SPL_BSS_MAX_SIZE |
Albert ARIBAUD | 6ebc346 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 1694 | Maximum size in memory allocated to the SPL BSS. |
| 1695 | When defined, the linker checks that the actual memory used |
| 1696 | by SPL from __bss_start to __bss_end does not exceed it. |
Albert ARIBAUD | 8960af8 | 2013-04-14 04:48:38 +0000 | [diff] [blame] | 1697 | CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE |
Albert ARIBAUD | 6ebc346 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 1698 | must not be both defined at the same time. |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1699 | |
| 1700 | CONFIG_SPL_STACK |
| 1701 | Adress of the start of the stack SPL will use |
| 1702 | |
Albert ARIBAUD \(3ADEV\) | 8c80eb3 | 2015-03-31 11:40:50 +0200 | [diff] [blame] | 1703 | CONFIG_SPL_PANIC_ON_RAW_IMAGE |
| 1704 | When defined, SPL will panic() if the image it has |
| 1705 | loaded does not have a signature. |
| 1706 | Defining this is useful when code which loads images |
| 1707 | in SPL cannot guarantee that absolutely all read errors |
| 1708 | will be caught. |
| 1709 | An example is the LPC32XX MLC NAND driver, which will |
| 1710 | consider that a completely unreadable NAND block is bad, |
| 1711 | and thus should be skipped silently. |
| 1712 | |
Scott Wood | 94a45bb | 2012-09-20 19:05:12 -0500 | [diff] [blame] | 1713 | CONFIG_SPL_RELOC_STACK |
| 1714 | Adress of the start of the stack SPL will use after |
| 1715 | relocation. If unspecified, this is equal to |
| 1716 | CONFIG_SPL_STACK. |
| 1717 | |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1718 | CONFIG_SYS_SPL_MALLOC_START |
| 1719 | Starting address of the malloc pool used in SPL. |
Fabio Estevam | 9ac4fc8 | 2015-11-12 12:30:19 -0200 | [diff] [blame] | 1720 | When this option is set the full malloc is used in SPL and |
| 1721 | it is set up by spl_init() and before that, the simple malloc() |
| 1722 | can be used if CONFIG_SYS_MALLOC_F is defined. |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1723 | |
| 1724 | CONFIG_SYS_SPL_MALLOC_SIZE |
| 1725 | The size of the malloc pool used in SPL. |
Daniel Schwierzeck | 6a11cf4 | 2011-07-18 07:48:07 +0000 | [diff] [blame] | 1726 | |
Tom Rini | 861a86f | 2012-08-13 11:37:56 -0700 | [diff] [blame] | 1727 | CONFIG_SPL_DISPLAY_PRINT |
| 1728 | For ARM, enable an optional function to print more information |
| 1729 | about the running system. |
| 1730 | |
Scott Wood | 4b91972 | 2012-09-20 16:35:21 -0500 | [diff] [blame] | 1731 | CONFIG_SPL_INIT_MINIMAL |
| 1732 | Arch init code should be built for a very small image |
| 1733 | |
Peter Korsgaard | 2b75b0a | 2013-05-13 08:36:29 +0000 | [diff] [blame] | 1734 | CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, |
| 1735 | CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS |
| 1736 | Sector and number of sectors to load kernel argument |
| 1737 | parameters from when MMC is being used in raw mode |
| 1738 | (for falcon mode) |
| 1739 | |
Guillaume GARDET | fae81c7 | 2014-10-15 17:53:13 +0200 | [diff] [blame] | 1740 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME |
| 1741 | Filename to read to load U-Boot when reading from filesystem |
| 1742 | |
| 1743 | CONFIG_SPL_FS_LOAD_KERNEL_NAME |
Peter Korsgaard | 7ad2cc7 | 2013-05-13 08:36:27 +0000 | [diff] [blame] | 1744 | Filename to read to load kernel uImage when reading |
Guillaume GARDET | fae81c7 | 2014-10-15 17:53:13 +0200 | [diff] [blame] | 1745 | from filesystem (for Falcon mode) |
Peter Korsgaard | 7ad2cc7 | 2013-05-13 08:36:27 +0000 | [diff] [blame] | 1746 | |
Guillaume GARDET | fae81c7 | 2014-10-15 17:53:13 +0200 | [diff] [blame] | 1747 | CONFIG_SPL_FS_LOAD_ARGS_NAME |
Peter Korsgaard | 7ad2cc7 | 2013-05-13 08:36:27 +0000 | [diff] [blame] | 1748 | Filename to read to load kernel argument parameters |
Guillaume GARDET | fae81c7 | 2014-10-15 17:53:13 +0200 | [diff] [blame] | 1749 | when reading from filesystem (for Falcon mode) |
Peter Korsgaard | 7ad2cc7 | 2013-05-13 08:36:27 +0000 | [diff] [blame] | 1750 | |
Scott Wood | 06f60ae | 2012-12-06 13:33:17 +0000 | [diff] [blame] | 1751 | CONFIG_SPL_MPC83XX_WAIT_FOR_NAND |
| 1752 | Set this for NAND SPL on PPC mpc83xx targets, so that |
| 1753 | start.S waits for the rest of the SPL to load before |
| 1754 | continuing (the hardware starts execution after just |
| 1755 | loading the first page rather than the full 4K). |
| 1756 | |
Prabhakar Kushwaha | 651fcf6 | 2014-04-08 19:12:31 +0530 | [diff] [blame] | 1757 | CONFIG_SPL_SKIP_RELOCATE |
| 1758 | Avoid SPL relocation |
| 1759 | |
Thomas Gleixner | 6f4e7d3 | 2016-07-12 20:28:12 +0200 | [diff] [blame] | 1760 | CONFIG_SPL_UBI |
| 1761 | Support for a lightweight UBI (fastmap) scanner and |
| 1762 | loader |
| 1763 | |
Heiko Schocher | 0c3117b | 2014-10-31 08:31:00 +0100 | [diff] [blame] | 1764 | CONFIG_SPL_NAND_RAW_ONLY |
| 1765 | Support to boot only raw u-boot.bin images. Use this only |
| 1766 | if you need to save space. |
| 1767 | |
Ying Zhang | 7c8eea5 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 1768 | CONFIG_SPL_COMMON_INIT_DDR |
| 1769 | Set for common ddr init with serial presence detect in |
| 1770 | SPL binary. |
| 1771 | |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1772 | CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, |
| 1773 | CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, |
| 1774 | CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, |
| 1775 | CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE, |
| 1776 | CONFIG_SYS_NAND_ECCBYTES |
| 1777 | Defines the size and behavior of the NAND that SPL uses |
Scott Wood | 7d4b795 | 2012-09-21 18:35:27 -0500 | [diff] [blame] | 1778 | to read U-Boot |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1779 | |
Scott Wood | 7d4b795 | 2012-09-21 18:35:27 -0500 | [diff] [blame] | 1780 | CONFIG_SYS_NAND_U_BOOT_DST |
| 1781 | Location in memory to load U-Boot to |
| 1782 | |
| 1783 | CONFIG_SYS_NAND_U_BOOT_SIZE |
| 1784 | Size of image to load |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1785 | |
| 1786 | CONFIG_SYS_NAND_U_BOOT_START |
Scott Wood | 7d4b795 | 2012-09-21 18:35:27 -0500 | [diff] [blame] | 1787 | Entry point in loaded image to jump to |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1788 | |
| 1789 | CONFIG_SYS_NAND_HW_ECC_OOBFIRST |
| 1790 | Define this if you need to first read the OOB and then the |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1791 | data. This is used, for example, on davinci platforms. |
Tom Rini | 9557979 | 2012-02-14 07:29:40 +0000 | [diff] [blame] | 1792 | |
Pavel Machek | c57b953 | 2012-08-30 22:42:11 +0200 | [diff] [blame] | 1793 | CONFIG_SPL_RAM_DEVICE |
| 1794 | Support for running image already present in ram, in SPL binary |
| 1795 | |
Scott Wood | 74752ba | 2012-12-06 13:33:16 +0000 | [diff] [blame] | 1796 | CONFIG_SPL_PAD_TO |
Benoît Thébaudeau | 6113d3f | 2013-04-11 09:35:49 +0000 | [diff] [blame] | 1797 | Image offset to which the SPL should be padded before appending |
| 1798 | the SPL payload. By default, this is defined as |
| 1799 | CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. |
| 1800 | CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL |
| 1801 | payload without any padding, or >= CONFIG_SPL_MAX_SIZE. |
Scott Wood | 74752ba | 2012-12-06 13:33:16 +0000 | [diff] [blame] | 1802 | |
Scott Wood | ca2fca2 | 2012-09-21 16:27:32 -0500 | [diff] [blame] | 1803 | CONFIG_SPL_TARGET |
| 1804 | Final target image containing SPL and payload. Some SPLs |
| 1805 | use an arch-specific makefile fragment instead, for |
| 1806 | example if more than one image needs to be produced. |
| 1807 | |
Marek Vasut | b527b9c | 2018-05-13 00:22:52 +0200 | [diff] [blame] | 1808 | CONFIG_SPL_FIT_PRINT |
Simon Glass | 87ebee3 | 2013-05-08 08:05:59 +0000 | [diff] [blame] | 1809 | Printing information about a FIT image adds quite a bit of |
| 1810 | code to SPL. So this is normally disabled in SPL. Use this |
| 1811 | option to re-enable it. This will affect the output of the |
| 1812 | bootm command when booting a FIT image. |
| 1813 | |
Ying Zhang | 3aa29de | 2013-08-16 15:16:15 +0800 | [diff] [blame] | 1814 | - TPL framework |
| 1815 | CONFIG_TPL |
| 1816 | Enable building of TPL globally. |
| 1817 | |
| 1818 | CONFIG_TPL_PAD_TO |
| 1819 | Image offset to which the TPL should be padded before appending |
| 1820 | the TPL payload. By default, this is defined as |
Wolfgang Denk | 93e1459 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 1821 | CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. |
| 1822 | CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL |
| 1823 | payload without any padding, or >= CONFIG_SPL_MAX_SIZE. |
Ying Zhang | 3aa29de | 2013-08-16 15:16:15 +0800 | [diff] [blame] | 1824 | |
wdenk | a8c7c70 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 1825 | - Interrupt support (PPC): |
| 1826 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 1827 | There are common interrupt_init() and timer_interrupt() |
| 1828 | for all PPC archs. interrupt_init() calls interrupt_init_cpu() |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1829 | for CPU specific initialization. interrupt_init_cpu() |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 1830 | should set decrementer_count to appropriate value. If |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1831 | CPU resets decrementer automatically after interrupt |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 1832 | (ppc4xx) it should set decrementer_count to zero. |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1833 | timer_interrupt() calls timer_interrupt_cpu() for CPU |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 1834 | specific handling. If board has watchdog / status_led |
| 1835 | / other_activity_monitor it works automatically from |
| 1836 | general timer_interrupt(). |
wdenk | a8c7c70 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 1837 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1838 | |
Helmut Raiger | 9660e44 | 2011-10-20 04:19:47 +0000 | [diff] [blame] | 1839 | Board initialization settings: |
| 1840 | ------------------------------ |
| 1841 | |
| 1842 | During Initialization u-boot calls a number of board specific functions |
| 1843 | to allow the preparation of board specific prerequisites, e.g. pin setup |
| 1844 | before drivers are initialized. To enable these callbacks the |
| 1845 | following configuration macros have to be defined. Currently this is |
| 1846 | architecture specific, so please check arch/your_architecture/lib/board.c |
| 1847 | typically in board_init_f() and board_init_r(). |
| 1848 | |
| 1849 | - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f() |
| 1850 | - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r() |
| 1851 | - CONFIG_BOARD_LATE_INIT: Call board_late_init() |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1852 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1853 | Configuration Settings: |
| 1854 | ----------------------- |
| 1855 | |
Simon Glass | 4d979bf | 2019-12-28 10:45:10 -0700 | [diff] [blame] | 1856 | - MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit. |
York Sun | 4d1fd7f | 2014-02-26 17:03:19 -0800 | [diff] [blame] | 1857 | Optionally it can be defined to support 64-bit memory commands. |
| 1858 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1859 | - CONFIG_SYS_LONGHELP: Defined when you want long help messages included; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1860 | undefine this when you're short of memory. |
| 1861 | |
Peter Tyser | 2fb2604 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 1862 | - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default |
| 1863 | width of the commands listed in the 'help' command output. |
| 1864 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1865 | - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1866 | prompt for user input. |
| 1867 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1868 | - CONFIG_SYS_CBSIZE: Buffer size for input from the Console |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1869 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1870 | - CONFIG_SYS_PBSIZE: Buffer size for Console output |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1871 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1872 | - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1873 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1874 | - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1875 | the application (usually a Linux kernel) when it is |
| 1876 | booted |
| 1877 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1878 | - CONFIG_SYS_BAUDRATE_TABLE: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1879 | List of legal baudrate settings for this board. |
| 1880 | |
York Sun | e814952 | 2015-12-04 11:57:07 -0800 | [diff] [blame] | 1881 | - CONFIG_SYS_MEM_RESERVE_SECURE |
York Sun | e61a753 | 2016-06-24 16:46:18 -0700 | [diff] [blame] | 1882 | Only implemented for ARMv8 for now. |
York Sun | e814952 | 2015-12-04 11:57:07 -0800 | [diff] [blame] | 1883 | If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory |
| 1884 | is substracted from total RAM and won't be reported to OS. |
| 1885 | This memory can be used as secure memory. A variable |
York Sun | e61a753 | 2016-06-24 16:46:18 -0700 | [diff] [blame] | 1886 | gd->arch.secure_ram is used to track the location. In systems |
York Sun | e814952 | 2015-12-04 11:57:07 -0800 | [diff] [blame] | 1887 | the RAM base is not zero, or RAM is divided into banks, |
| 1888 | this variable needs to be recalcuated to get the address. |
| 1889 | |
York Sun | aabd7dd | 2015-12-07 11:05:29 -0800 | [diff] [blame] | 1890 | - CONFIG_SYS_MEM_TOP_HIDE: |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1891 | If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, |
Stefan Roese | 14f73ca | 2008-03-26 10:14:11 +0100 | [diff] [blame] | 1892 | this specified memory area will get subtracted from the top |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1893 | (end) of RAM and won't get "touched" at all by U-Boot. By |
Stefan Roese | 14f73ca | 2008-03-26 10:14:11 +0100 | [diff] [blame] | 1894 | fixing up gd->ram_size the Linux kernel should gets passed |
| 1895 | the now "corrected" memory size and won't touch it either. |
| 1896 | This should work for arch/ppc and arch/powerpc. Only Linux |
Stefan Roese | 5e12e75 | 2008-03-28 11:02:53 +0100 | [diff] [blame] | 1897 | board ports in arch/powerpc with bootwrapper support that |
Stefan Roese | 14f73ca | 2008-03-26 10:14:11 +0100 | [diff] [blame] | 1898 | recalculate the memory size from the SDRAM controller setup |
Stefan Roese | 5e12e75 | 2008-03-28 11:02:53 +0100 | [diff] [blame] | 1899 | will have to get fixed in Linux additionally. |
Stefan Roese | 14f73ca | 2008-03-26 10:14:11 +0100 | [diff] [blame] | 1900 | |
| 1901 | This option can be used as a workaround for the 440EPx/GRx |
| 1902 | CHIP 11 errata where the last 256 bytes in SDRAM shouldn't |
| 1903 | be touched. |
| 1904 | |
| 1905 | WARNING: Please make sure that this value is a multiple of |
| 1906 | the Linux page size (normally 4k). If this is not the case, |
| 1907 | then the end address of the Linux memory will be located at a |
| 1908 | non page size aligned address and this could cause major |
| 1909 | problems. |
| 1910 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1911 | - CONFIG_SYS_LOADS_BAUD_CHANGE: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1912 | Enable temporary baudrate change while serial download |
| 1913 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1914 | - CONFIG_SYS_SDRAM_BASE: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1915 | Physical start address of SDRAM. _Must_ be 0 here. |
| 1916 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1917 | - CONFIG_SYS_FLASH_BASE: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1918 | Physical start address of Flash memory. |
| 1919 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1920 | - CONFIG_SYS_MONITOR_LEN: |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1921 | Size of memory reserved for monitor code, used to |
| 1922 | determine _at_compile_time_ (!) if the environment is |
| 1923 | embedded within the U-Boot image, or in a separate |
| 1924 | flash sector. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1925 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1926 | - CONFIG_SYS_MALLOC_LEN: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1927 | Size of DRAM reserved for malloc() use. |
| 1928 | |
Simon Glass | d59476b | 2014-07-10 22:23:28 -0600 | [diff] [blame] | 1929 | - CONFIG_SYS_MALLOC_F_LEN |
| 1930 | Size of the malloc() pool for use before relocation. If |
| 1931 | this is defined, then a very simple malloc() implementation |
| 1932 | will become available before relocation. The address is just |
| 1933 | below the global data, and the stack is moved down to make |
| 1934 | space. |
| 1935 | |
| 1936 | This feature allocates regions with increasing addresses |
| 1937 | within the region. calloc() is supported, but realloc() |
| 1938 | is not available. free() is supported but does nothing. |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1939 | The memory will be freed (or in fact just forgotten) when |
Simon Glass | d59476b | 2014-07-10 22:23:28 -0600 | [diff] [blame] | 1940 | U-Boot relocates itself. |
| 1941 | |
Simon Glass | 38687ae | 2014-11-10 17:16:54 -0700 | [diff] [blame] | 1942 | - CONFIG_SYS_MALLOC_SIMPLE |
| 1943 | Provides a simple and small malloc() and calloc() for those |
| 1944 | boards which do not use the full malloc in SPL (which is |
| 1945 | enabled with CONFIG_SYS_SPL_MALLOC_START). |
| 1946 | |
Thierry Reding | 1dfdd9b | 2014-12-09 22:25:22 -0700 | [diff] [blame] | 1947 | - CONFIG_SYS_NONCACHED_MEMORY: |
| 1948 | Size of non-cached memory area. This area of memory will be |
| 1949 | typically located right below the malloc() area and mapped |
| 1950 | uncached in the MMU. This is useful for drivers that would |
| 1951 | otherwise require a lot of explicit cache maintenance. For |
| 1952 | some drivers it's also impossible to properly maintain the |
| 1953 | cache. For example if the regions that need to be flushed |
| 1954 | are not a multiple of the cache-line size, *and* padding |
| 1955 | cannot be allocated between the regions to align them (i.e. |
| 1956 | if the HW requires a contiguous array of regions, and the |
| 1957 | size of each region is not cache-aligned), then a flush of |
| 1958 | one region may result in overwriting data that hardware has |
| 1959 | written to another region in the same cache-line. This can |
| 1960 | happen for example in network drivers where descriptors for |
| 1961 | buffers are typically smaller than the CPU cache-line (e.g. |
| 1962 | 16 bytes vs. 32 or 64 bytes). |
| 1963 | |
| 1964 | Non-cached memory is only supported on 32-bit ARM at present. |
| 1965 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1966 | - CONFIG_SYS_BOOTM_LEN: |
Stefan Roese | 15940c9 | 2006-03-13 11:16:36 +0100 | [diff] [blame] | 1967 | Normally compressed uImages are limited to an |
| 1968 | uncompressed size of 8 MBytes. If this is not enough, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1969 | you can define CONFIG_SYS_BOOTM_LEN in your board config file |
Stefan Roese | 15940c9 | 2006-03-13 11:16:36 +0100 | [diff] [blame] | 1970 | to adjust this setting to your needs. |
| 1971 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1972 | - CONFIG_SYS_BOOTMAPSZ: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1973 | Maximum size of memory mapped by the startup code of |
| 1974 | the Linux kernel; all data that must be processed by |
Bartlomiej Sieka | 7d721e3 | 2008-04-14 15:44:16 +0200 | [diff] [blame] | 1975 | the Linux kernel (bd_info, boot arguments, FDT blob if |
| 1976 | used) must be put below this limit, unless "bootm_low" |
Robert P. J. Day | 1bce2ae | 2013-09-16 07:15:45 -0400 | [diff] [blame] | 1977 | environment variable is defined and non-zero. In such case |
Bartlomiej Sieka | 7d721e3 | 2008-04-14 15:44:16 +0200 | [diff] [blame] | 1978 | all data for the Linux kernel must be between "bootm_low" |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 1979 | and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment |
Grant Likely | c3624e6 | 2011-03-28 09:58:43 +0000 | [diff] [blame] | 1980 | variable "bootm_mapsize" will override the value of |
| 1981 | CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, |
| 1982 | then the value in "bootm_size" will be used instead. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1983 | |
John Rigby | fca43cc | 2010-10-13 13:57:35 -0600 | [diff] [blame] | 1984 | - CONFIG_SYS_BOOT_RAMDISK_HIGH: |
| 1985 | Enable initrd_high functionality. If defined then the |
| 1986 | initrd_high feature is enabled and the bootm ramdisk subcommand |
| 1987 | is enabled. |
| 1988 | |
| 1989 | - CONFIG_SYS_BOOT_GET_CMDLINE: |
| 1990 | Enables allocating and saving kernel cmdline in space between |
| 1991 | "bootm_low" and "bootm_low" + BOOTMAPSZ. |
| 1992 | |
| 1993 | - CONFIG_SYS_BOOT_GET_KBD: |
| 1994 | Enables allocating and saving a kernel copy of the bd_info in |
| 1995 | space between "bootm_low" and "bootm_low" + BOOTMAPSZ. |
| 1996 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1997 | - CONFIG_SYS_MAX_FLASH_SECT: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1998 | Max number of sectors on a Flash chip |
| 1999 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2000 | - CONFIG_SYS_FLASH_ERASE_TOUT: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2001 | Timeout for Flash erase operations (in ms) |
| 2002 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2003 | - CONFIG_SYS_FLASH_WRITE_TOUT: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2004 | Timeout for Flash write operations (in ms) |
| 2005 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2006 | - CONFIG_SYS_FLASH_LOCK_TOUT |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 2007 | Timeout for Flash set sector lock bit operation (in ms) |
| 2008 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2009 | - CONFIG_SYS_FLASH_UNLOCK_TOUT |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 2010 | Timeout for Flash clear lock bits operation (in ms) |
| 2011 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2012 | - CONFIG_SYS_FLASH_PROTECTION |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 2013 | If defined, hardware flash sectors protection is used |
| 2014 | instead of U-Boot software protection. |
| 2015 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2016 | - CONFIG_SYS_DIRECT_FLASH_TFTP: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2017 | |
| 2018 | Enable TFTP transfers directly to flash memory; |
| 2019 | without this option such a download has to be |
| 2020 | performed in two steps: (1) download to RAM, and (2) |
| 2021 | copy from RAM to flash. |
| 2022 | |
| 2023 | The two-step approach is usually more reliable, since |
| 2024 | you can check if the download worked before you erase |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 2025 | the flash, but in some situations (when system RAM is |
| 2026 | too limited to allow for a temporary copy of the |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2027 | downloaded image) this option may be very useful. |
| 2028 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2029 | - CONFIG_SYS_FLASH_CFI: |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 2030 | Define if the flash driver uses extra elements in the |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 2031 | common flash structure for storing flash geometry. |
| 2032 | |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 2033 | - CONFIG_FLASH_CFI_DRIVER |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 2034 | This option also enables the building of the cfi_flash driver |
| 2035 | in the drivers directory |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2036 | |
Piotr Ziecik | 91809ed | 2008-11-17 15:57:58 +0100 | [diff] [blame] | 2037 | - CONFIG_FLASH_CFI_MTD |
| 2038 | This option enables the building of the cfi_mtd driver |
| 2039 | in the drivers directory. The driver exports CFI flash |
| 2040 | to the MTD layer. |
| 2041 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2042 | - CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Guennadi Liakhovetski | 96ef831 | 2008-04-03 13:36:02 +0200 | [diff] [blame] | 2043 | Use buffered writes to flash. |
| 2044 | |
| 2045 | - CONFIG_FLASH_SPANSION_S29WS_N |
| 2046 | s29ws-n MirrorBit flash has non-standard addresses for buffered |
| 2047 | write commands. |
| 2048 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2049 | - CONFIG_SYS_FLASH_QUIET_TEST |
Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 2050 | If this option is defined, the common CFI flash doesn't |
| 2051 | print it's warning upon not recognized FLASH banks. This |
| 2052 | is useful, if some of the configured banks are only |
| 2053 | optionally available. |
| 2054 | |
Jerry Van Baren | 9a042e9 | 2008-03-08 13:48:01 -0500 | [diff] [blame] | 2055 | - CONFIG_FLASH_SHOW_PROGRESS |
| 2056 | If defined (must be an integer), print out countdown |
| 2057 | digits and dots. Recommended value: 45 (9..1) for 80 |
| 2058 | column displays, 15 (3..1) for 40 column displays. |
| 2059 | |
Stefan Roese | 352ef3f | 2013-04-04 15:53:14 +0200 | [diff] [blame] | 2060 | - CONFIG_FLASH_VERIFY |
| 2061 | If defined, the content of the flash (destination) is compared |
| 2062 | against the source after the write operation. An error message |
| 2063 | will be printed when the contents are not identical. |
| 2064 | Please note that this option is useless in nearly all cases, |
| 2065 | since such flash programming errors usually are detected earlier |
| 2066 | while unprotecting/erasing/programming. Please only enable |
| 2067 | this option if you really know what you are doing. |
| 2068 | |
Wolfgang Denk | ea882ba | 2010-06-20 23:33:59 +0200 | [diff] [blame] | 2069 | - CONFIG_ENV_MAX_ENTRIES |
| 2070 | |
Wolfgang Denk | 071bc92 | 2010-10-27 22:48:30 +0200 | [diff] [blame] | 2071 | Maximum number of entries in the hash table that is used |
| 2072 | internally to store the environment settings. The default |
| 2073 | setting is supposed to be generous and should work in most |
| 2074 | cases. This setting can be used to tune behaviour; see |
| 2075 | lib/hashtable.c for details. |
Wolfgang Denk | ea882ba | 2010-06-20 23:33:59 +0200 | [diff] [blame] | 2076 | |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 2077 | - CONFIG_ENV_FLAGS_LIST_DEFAULT |
| 2078 | - CONFIG_ENV_FLAGS_LIST_STATIC |
Robert P. J. Day | 1bce2ae | 2013-09-16 07:15:45 -0400 | [diff] [blame] | 2079 | Enable validation of the values given to environment variables when |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 2080 | calling env set. Variables can be restricted to only decimal, |
| 2081 | hexadecimal, or boolean. If CONFIG_CMD_NET is also defined, |
| 2082 | the variables can also be restricted to IP address or MAC address. |
| 2083 | |
| 2084 | The format of the list is: |
| 2085 | type_attribute = [s|d|x|b|i|m] |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2086 | access_attribute = [a|r|o|c] |
| 2087 | attributes = type_attribute[access_attribute] |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 2088 | entry = variable_name[:attributes] |
| 2089 | list = entry[,list] |
| 2090 | |
| 2091 | The type attributes are: |
| 2092 | s - String (default) |
| 2093 | d - Decimal |
| 2094 | x - Hexadecimal |
| 2095 | b - Boolean ([1yYtT|0nNfF]) |
| 2096 | i - IP address |
| 2097 | m - MAC address |
| 2098 | |
Joe Hershberger | 267541f | 2012-12-11 22:16:34 -0600 | [diff] [blame] | 2099 | The access attributes are: |
| 2100 | a - Any (default) |
| 2101 | r - Read-only |
| 2102 | o - Write-once |
| 2103 | c - Change-default |
| 2104 | |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 2105 | - CONFIG_ENV_FLAGS_LIST_DEFAULT |
| 2106 | Define this to a list (string) to define the ".flags" |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2107 | environment variable in the default or embedded environment. |
Joe Hershberger | 2598090 | 2012-12-11 22:16:31 -0600 | [diff] [blame] | 2108 | |
| 2109 | - CONFIG_ENV_FLAGS_LIST_STATIC |
| 2110 | Define this to a list (string) to define validation that |
| 2111 | should be done if an entry is not found in the ".flags" |
| 2112 | environment variable. To override a setting in the static |
| 2113 | list, simply add an entry for the same variable name to the |
| 2114 | ".flags" variable. |
| 2115 | |
Joe Hershberger | bdf1fe4 | 2015-05-20 14:27:20 -0500 | [diff] [blame] | 2116 | If CONFIG_REGEX is defined, the variable_name above is evaluated as a |
| 2117 | regular expression. This allows multiple variables to define the same |
| 2118 | flags without explicitly listing them for each variable. |
| 2119 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2120 | The following definitions that deal with the placement and management |
| 2121 | of environment data (variable area); in general, we support the |
| 2122 | following configurations: |
| 2123 | |
Mike Frysinger | c3eb3fe | 2011-07-08 10:44:25 +0000 | [diff] [blame] | 2124 | - CONFIG_BUILD_ENVCRC: |
| 2125 | |
| 2126 | Builds up envcrc with the target environment so that external utils |
| 2127 | may easily extract it and embed it in final U-Boot images. |
| 2128 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2129 | BE CAREFUL! The first access to the environment happens quite early |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2130 | in U-Boot initialization (when we try to get the setting of for the |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 2131 | console baudrate). You *MUST* have mapped your NVRAM area then, or |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2132 | U-Boot will hang. |
| 2133 | |
| 2134 | Please note that even with NVRAM we still use a copy of the |
| 2135 | environment in RAM: we could work on NVRAM directly, but we want to |
| 2136 | keep settings there always unmodified except somebody uses "saveenv" |
| 2137 | to save the current settings. |
| 2138 | |
Liu Gang | 0a85a9e | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 2139 | BE CAREFUL! For some special cases, the local device can not use |
| 2140 | "saveenv" command. For example, the local device will get the |
Liu Gang | fc54c7f | 2012-08-09 05:10:01 +0000 | [diff] [blame] | 2141 | environment stored in a remote NOR flash by SRIO or PCIE link, |
| 2142 | but it can not erase, write this NOR flash by SRIO or PCIE interface. |
Liu Gang | 0a85a9e | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 2143 | |
Guennadi Liakhovetski | b74ab73 | 2009-05-18 16:07:22 +0200 | [diff] [blame] | 2144 | - CONFIG_NAND_ENV_DST |
| 2145 | |
| 2146 | Defines address in RAM to which the nand_spl code should copy the |
| 2147 | environment. If redundant environment is used, it will be copied to |
| 2148 | CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. |
| 2149 | |
Bruce Adler | e881cb5 | 2007-11-02 13:15:42 -0700 | [diff] [blame] | 2150 | Please note that the environment is read-only until the monitor |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2151 | has been relocated to RAM and a RAM copy of the environment has been |
Simon Glass | 00caae6 | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 2152 | created; also, when using EEPROM you will have to use env_get_f() |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2153 | until then to read environment variables. |
| 2154 | |
wdenk | 85ec0bc | 2003-03-31 16:34:49 +0000 | [diff] [blame] | 2155 | The environment is protected by a CRC32 checksum. Before the monitor |
| 2156 | is relocated into RAM, as a result of a bad CRC you will be working |
| 2157 | with the compiled-in default environment - *silently*!!! [This is |
| 2158 | necessary, because the first environment variable we need is the |
| 2159 | "baudrate" setting for the console - if we have a bad CRC, we don't |
| 2160 | have any device yet where we could complain.] |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2161 | |
| 2162 | Note: once the monitor has been relocated, then it will complain if |
| 2163 | the default environment is used; a new CRC is computed as soon as you |
wdenk | 85ec0bc | 2003-03-31 16:34:49 +0000 | [diff] [blame] | 2164 | use the "saveenv" command to store a valid environment. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2165 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2166 | - CONFIG_SYS_FAULT_MII_ADDR: |
wdenk | 42d1f03 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 2167 | MII address of the PHY to check for the Ethernet link state. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2168 | |
Ron Madrid | f5675aa | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 2169 | - CONFIG_NS16550_MIN_FUNCTIONS: |
| 2170 | Define this if you desire to only have use of the NS16550_init |
| 2171 | and NS16550_putc functions for the serial driver located at |
| 2172 | drivers/serial/ns16550.c. This option is useful for saving |
| 2173 | space for already greatly restricted images, including but not |
| 2174 | limited to NAND_SPL configurations. |
| 2175 | |
Simon Glass | b2b92f5 | 2012-11-30 13:01:18 +0000 | [diff] [blame] | 2176 | - CONFIG_DISPLAY_BOARDINFO |
| 2177 | Display information about the board that U-Boot is running on |
| 2178 | when U-Boot starts up. The board function checkboard() is called |
| 2179 | to do this. |
| 2180 | |
Simon Glass | e2e3e2b | 2012-11-30 13:01:19 +0000 | [diff] [blame] | 2181 | - CONFIG_DISPLAY_BOARDINFO_LATE |
| 2182 | Similar to the previous option, but display this information |
| 2183 | later, once stdio is running and output goes to the LCD, if |
| 2184 | present. |
| 2185 | |
Sascha Silbe | feb8580 | 2013-08-11 16:40:43 +0200 | [diff] [blame] | 2186 | - CONFIG_BOARD_SIZE_LIMIT: |
| 2187 | Maximum size of the U-Boot image. When defined, the |
| 2188 | build system checks that the actual size does not |
| 2189 | exceed it. |
| 2190 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2191 | Low Level (hardware related) configuration options: |
wdenk | dc7c9a1 | 2003-03-26 06:55:25 +0000 | [diff] [blame] | 2192 | --------------------------------------------------- |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2193 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2194 | - CONFIG_SYS_CACHELINE_SIZE: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2195 | Cache Line Size of the CPU. |
| 2196 | |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 2197 | - CONFIG_SYS_CCSRBAR_DEFAULT: |
| 2198 | Default (power-on reset) physical address of CCSR on Freescale |
| 2199 | PowerPC SOCs. |
| 2200 | |
| 2201 | - CONFIG_SYS_CCSRBAR: |
| 2202 | Virtual address of CCSR. On a 32-bit build, this is typically |
| 2203 | the same value as CONFIG_SYS_CCSRBAR_DEFAULT. |
| 2204 | |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 2205 | - CONFIG_SYS_CCSRBAR_PHYS: |
| 2206 | Physical address of CCSR. CCSR can be relocated to a new |
| 2207 | physical address, if desired. In this case, this macro should |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 2208 | be set to that address. Otherwise, it should be set to the |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 2209 | same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR |
| 2210 | is typically relocated on 36-bit builds. It is recommended |
| 2211 | that this macro be defined via the _HIGH and _LOW macros: |
| 2212 | |
| 2213 | #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH |
| 2214 | * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) |
| 2215 | |
| 2216 | - CONFIG_SYS_CCSRBAR_PHYS_HIGH: |
Wolfgang Denk | 4cf2609 | 2011-10-07 09:58:21 +0200 | [diff] [blame] | 2217 | Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically |
| 2218 | either 0 (32-bit build) or 0xF (36-bit build). This macro is |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 2219 | used in assembly code, so it must not contain typecasts or |
| 2220 | integer size suffixes (e.g. "ULL"). |
| 2221 | |
| 2222 | - CONFIG_SYS_CCSRBAR_PHYS_LOW: |
| 2223 | Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is |
| 2224 | used in assembly code, so it must not contain typecasts or |
| 2225 | integer size suffixes (e.g. "ULL"). |
| 2226 | |
| 2227 | - CONFIG_SYS_CCSR_DO_NOT_RELOCATE: |
| 2228 | If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be |
| 2229 | forced to a value that ensures that CCSR is not relocated. |
| 2230 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2231 | - CONFIG_SYS_IMMR: Physical address of the Internal Memory. |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 2232 | DO NOT CHANGE unless you know exactly what you're |
Christophe Leroy | 907208c | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 2233 | doing! (11-4) [MPC8xx systems only] |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2234 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2235 | - CONFIG_SYS_INIT_RAM_ADDR: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2236 | |
wdenk | 7152b1d | 2003-09-05 23:19:14 +0000 | [diff] [blame] | 2237 | Start address of memory area that can be used for |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2238 | initial data and stack; please note that this must be |
| 2239 | writable memory that is working WITHOUT special |
| 2240 | initialization, i. e. you CANNOT use normal RAM which |
| 2241 | will become available only after programming the |
| 2242 | memory controller and running certain initialization |
| 2243 | sequences. |
| 2244 | |
| 2245 | U-Boot uses the following memory types: |
Christophe Leroy | 907208c | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 2246 | - MPC8xx: IMMR (internal memory of the CPU) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2247 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2248 | - CONFIG_SYS_GBL_DATA_OFFSET: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2249 | |
| 2250 | Offset of the initial data structure in the memory |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2251 | area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually |
| 2252 | CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2253 | data is located at the end of the available space |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 2254 | (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - |
Simon Glass | acd51f9 | 2016-10-02 18:01:06 -0600 | [diff] [blame] | 2255 | GENERATED_GBL_DATA_SIZE), and the initial stack is just |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2256 | below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + |
| 2257 | CONFIG_SYS_GBL_DATA_OFFSET) downward. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2258 | |
| 2259 | Note: |
| 2260 | On the MPC824X (or other systems that use the data |
| 2261 | cache for initial memory) the address chosen for |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2262 | CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2263 | point to an otherwise UNUSED address space between |
| 2264 | the top of RAM and the start of the PCI space. |
| 2265 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2266 | - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2267 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2268 | - CONFIG_SYS_OR_TIMING_SDRAM: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2269 | SDRAM timing |
| 2270 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2271 | - CONFIG_SYS_MAMR_PTA: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2272 | periodic timer for refresh |
| 2273 | |
Kumar Gala | a09b9b6 | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 2274 | - CONFIG_SYS_SRIO: |
| 2275 | Chip has SRIO or not |
| 2276 | |
| 2277 | - CONFIG_SRIO1: |
| 2278 | Board has SRIO 1 port available |
| 2279 | |
| 2280 | - CONFIG_SRIO2: |
| 2281 | Board has SRIO 2 port available |
| 2282 | |
Liu Gang | c8b2815 | 2013-05-07 16:30:46 +0800 | [diff] [blame] | 2283 | - CONFIG_SRIO_PCIE_BOOT_MASTER |
| 2284 | Board can support master function for Boot from SRIO and PCIE |
| 2285 | |
Kumar Gala | a09b9b6 | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 2286 | - CONFIG_SYS_SRIOn_MEM_VIRT: |
| 2287 | Virtual Address of SRIO port 'n' memory region |
| 2288 | |
Simon Glass | 62f9b65 | 2019-11-14 12:57:09 -0700 | [diff] [blame] | 2289 | - CONFIG_SYS_SRIOn_MEM_PHYxS: |
Kumar Gala | a09b9b6 | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 2290 | Physical Address of SRIO port 'n' memory region |
| 2291 | |
| 2292 | - CONFIG_SYS_SRIOn_MEM_SIZE: |
| 2293 | Size of SRIO port 'n' memory region |
| 2294 | |
Fabio Estevam | 66bd184 | 2013-04-11 09:35:34 +0000 | [diff] [blame] | 2295 | - CONFIG_SYS_NAND_BUSWIDTH_16BIT |
| 2296 | Defined to tell the NAND controller that the NAND chip is using |
| 2297 | a 16 bit bus. |
| 2298 | Not all NAND drivers use this symbol. |
Fabio Estevam | a430e91 | 2013-04-11 09:35:35 +0000 | [diff] [blame] | 2299 | Example of drivers that use it: |
Miquel Raynal | a430fa0 | 2018-08-16 17:30:07 +0200 | [diff] [blame] | 2300 | - drivers/mtd/nand/raw/ndfc.c |
| 2301 | - drivers/mtd/nand/raw/mxc_nand.c |
Alex Waterman | eced462 | 2011-05-19 15:08:36 -0400 | [diff] [blame] | 2302 | |
| 2303 | - CONFIG_SYS_NDFC_EBC0_CFG |
| 2304 | Sets the EBC0_CFG register for the NDFC. If not defined |
| 2305 | a default value will be used. |
| 2306 | |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2307 | - CONFIG_SPD_EEPROM |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 2308 | Get DDR timing information from an I2C EEPROM. Common |
| 2309 | with pluggable memory modules such as SODIMMs |
| 2310 | |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2311 | SPD_EEPROM_ADDRESS |
| 2312 | I2C address of the SPD EEPROM |
| 2313 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2314 | - CONFIG_SYS_SPD_BUS_NUM |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 2315 | If SPD EEPROM is on an I2C bus other than the first |
| 2316 | one, specify here. Note that the value must resolve |
| 2317 | to something your driver can deal with. |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2318 | |
York Sun | 1b3e3c4 | 2011-06-07 09:42:16 +0800 | [diff] [blame] | 2319 | - CONFIG_SYS_DDR_RAW_TIMING |
| 2320 | Get DDR timing information from other than SPD. Common with |
| 2321 | soldered DDR chips onboard without SPD. DDR raw timing |
| 2322 | parameters are extracted from datasheet and hard-coded into |
| 2323 | header files or board specific files. |
| 2324 | |
York Sun | 6f5e1dc | 2011-09-16 13:21:35 -0700 | [diff] [blame] | 2325 | - CONFIG_FSL_DDR_INTERACTIVE |
| 2326 | Enable interactive DDR debugging. See doc/README.fsl-ddr. |
| 2327 | |
York Sun | e32d59a | 2015-01-06 13:18:55 -0800 | [diff] [blame] | 2328 | - CONFIG_FSL_DDR_SYNC_REFRESH |
| 2329 | Enable sync of refresh for multiple controllers. |
| 2330 | |
York Sun | 4516ff8 | 2015-03-19 09:30:28 -0700 | [diff] [blame] | 2331 | - CONFIG_FSL_DDR_BIST |
| 2332 | Enable built-in memory test for Freescale DDR controllers. |
| 2333 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2334 | - CONFIG_SYS_83XX_DDR_USES_CS0 |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 2335 | Only for 83xx systems. If specified, then DDR should |
| 2336 | be configured using CS0 and CS1 instead of CS2 and CS3. |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 2337 | |
wdenk | c26e454 | 2004-04-18 10:13:26 +0000 | [diff] [blame] | 2338 | - CONFIG_RMII |
| 2339 | Enable RMII mode for all FECs. |
| 2340 | Note that this is a global option, we can't |
| 2341 | have one FEC in standard MII mode and another in RMII mode. |
| 2342 | |
wdenk | 5cf91d6 | 2004-04-23 20:32:05 +0000 | [diff] [blame] | 2343 | - CONFIG_CRC32_VERIFY |
| 2344 | Add a verify option to the crc32 command. |
| 2345 | The syntax is: |
| 2346 | |
| 2347 | => crc32 -v <address> <count> <crc32> |
| 2348 | |
| 2349 | Where address/count indicate a memory area |
| 2350 | and crc32 is the correct crc32 which the |
| 2351 | area should have. |
| 2352 | |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 2353 | - CONFIG_LOOPW |
| 2354 | Add the "loopw" memory command. This only takes effect if |
Simon Glass | 493f420 | 2017-08-04 16:34:27 -0600 | [diff] [blame] | 2355 | the memory commands are activated globally (CONFIG_CMD_MEMORY). |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 2356 | |
Joel Johnson | 7273231 | 2020-01-29 09:17:18 -0700 | [diff] [blame] | 2357 | - CONFIG_CMD_MX_CYCLIC |
stroese | 7b46664 | 2004-12-16 18:46:55 +0000 | [diff] [blame] | 2358 | Add the "mdc" and "mwc" memory commands. These are cyclic |
| 2359 | "md/mw" commands. |
| 2360 | Examples: |
| 2361 | |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 2362 | => mdc.b 10 4 500 |
stroese | 7b46664 | 2004-12-16 18:46:55 +0000 | [diff] [blame] | 2363 | This command will print 4 bytes (10,11,12,13) each 500 ms. |
| 2364 | |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 2365 | => mwc.l 100 12345678 10 |
stroese | 7b46664 | 2004-12-16 18:46:55 +0000 | [diff] [blame] | 2366 | This command will write 12345678 to address 100 all 10 ms. |
| 2367 | |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 2368 | This only takes effect if the memory commands are activated |
Simon Glass | 493f420 | 2017-08-04 16:34:27 -0600 | [diff] [blame] | 2369 | globally (CONFIG_CMD_MEMORY). |
stroese | 7b46664 | 2004-12-16 18:46:55 +0000 | [diff] [blame] | 2370 | |
Aneesh V | 401bb30 | 2011-07-13 05:11:07 +0000 | [diff] [blame] | 2371 | - CONFIG_SPL_BUILD |
Thomas Hebb | 32f2ca2 | 2019-11-13 18:18:03 -0800 | [diff] [blame] | 2372 | Set when the currently-running compilation is for an artifact |
| 2373 | that will end up in the SPL (as opposed to the TPL or U-Boot |
| 2374 | proper). Code that needs stage-specific behavior should check |
| 2375 | this. |
wdenk | 400558b | 2005-04-02 23:52:25 +0000 | [diff] [blame] | 2376 | |
Ying Zhang | 3aa29de | 2013-08-16 15:16:15 +0800 | [diff] [blame] | 2377 | - CONFIG_TPL_BUILD |
Thomas Hebb | 32f2ca2 | 2019-11-13 18:18:03 -0800 | [diff] [blame] | 2378 | Set when the currently-running compilation is for an artifact |
| 2379 | that will end up in the TPL (as opposed to the SPL or U-Boot |
| 2380 | proper). Code that needs stage-specific behavior should check |
| 2381 | this. |
Ying Zhang | 3aa29de | 2013-08-16 15:16:15 +0800 | [diff] [blame] | 2382 | |
Ying Zhang | 5df572f | 2013-05-20 14:07:23 +0800 | [diff] [blame] | 2383 | - CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 2384 | Only for 85xx systems. If this variable is specified, the section |
| 2385 | .resetvec is not kept and the section .bootpg is placed in the |
| 2386 | previous 4k of the .text section. |
| 2387 | |
Simon Glass | 4213fc2 | 2013-02-24 17:33:14 +0000 | [diff] [blame] | 2388 | - CONFIG_ARCH_MAP_SYSMEM |
| 2389 | Generally U-Boot (and in particular the md command) uses |
| 2390 | effective address. It is therefore not necessary to regard |
| 2391 | U-Boot address as virtual addresses that need to be translated |
| 2392 | to physical addresses. However, sandbox requires this, since |
| 2393 | it maintains its own little RAM buffer which contains all |
| 2394 | addressable memory. This option causes some memory accesses |
| 2395 | to be mapped through map_sysmem() / unmap_sysmem(). |
| 2396 | |
Simon Glass | 588a13f | 2013-02-14 04:18:54 +0000 | [diff] [blame] | 2397 | - CONFIG_X86_RESET_VECTOR |
| 2398 | If defined, the x86 reset vector code is included. This is not |
| 2399 | needed when U-Boot is running from Coreboot. |
|