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wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
Robert P. J. Day7207b362015-12-19 07:16:10 -050037In case of problems see the CHANGELOG file to find out who contributed
38the specific port. In addition, there are various MAINTAINERS files
39scattered throughout the U-Boot source identifying the people or
40companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000041
Robert P. J. Day7207b362015-12-19 07:16:10 -050042Note: As of August, 2010, there is no longer a CHANGELOG file in the
43actual U-Boot source tree; however, it can be created dynamically
44from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000045
46 make CHANGELOG
47
wdenkc6097192002-11-03 00:24:07 +000048
49Where to get help:
50==================
51
wdenk24ee89b2002-11-03 17:56:27 +000052In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050053U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050054<u-boot@lists.denx.de>. There is also an archive of previous traffic
55on the mailing list - please search the archive before asking FAQ's.
56Please see http://lists.denx.de/pipermail/u-boot and
57http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000058
59
Wolfgang Denk218ca722008-03-26 10:40:12 +010060Where to get source code:
61=========================
62
Robert P. J. Day7207b362015-12-19 07:16:10 -050063The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010064git://www.denx.de/git/u-boot.git ; you can browse it online at
65http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
66
67The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020068any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010069available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
70directory.
71
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010072Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010073ftp://ftp.denx.de/pub/u-boot/images/
74
75
wdenkc6097192002-11-03 00:24:07 +000076Where we come from:
77===================
78
79- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000080- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000081- clean up code
82- make it easier to add custom boards
83- make it possible to add other [PowerPC] CPUs
84- extend functions, especially:
85 * Provide extended interface to Linux boot loader
86 * S-Record download
87 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020088 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000089- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000090- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000091- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020092- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000093
94
95Names and Spelling:
96===================
97
98The "official" name of this project is "Das U-Boot". The spelling
99"U-Boot" shall be used in all written text (documentation, comments
100in source files etc.). Example:
101
102 This is the README file for the U-Boot project.
103
104File names etc. shall be based on the string "u-boot". Examples:
105
106 include/asm-ppc/u-boot.h
107
108 #include <asm/u-boot.h>
109
110Variable names, preprocessor constants etc. shall be either based on
111the string "u_boot" or on "U_BOOT". Example:
112
113 U_BOOT_VERSION u_boot_logo
114 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000115
116
wdenk93f19cc2002-12-17 17:55:09 +0000117Versioning:
118===========
119
Thomas Weber360d8832010-09-28 08:06:25 +0200120Starting with the release in October 2008, the names of the releases
121were changed from numerical release numbers without deeper meaning
122into a time stamp based numbering. Regular releases are identified by
123names consisting of the calendar year and month of the release date.
124Additional fields (if present) indicate release candidates or bug fix
125releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000126
Thomas Weber360d8832010-09-28 08:06:25 +0200127Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000128 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200129 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100130 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000131
132
wdenkc6097192002-11-03 00:24:07 +0000133Directory Hierarchy:
134====================
135
Peter Tyser8d321b82010-04-12 22:28:21 -0500136/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900137 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /avr32 Files generic to AVR32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500140 /blackfin Files generic to Analog Devices Blackfin architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500142 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500143 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000144 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500145 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400146 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200147 /powerpc Files generic to PowerPC architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500148 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500149 /sh Files generic to SH architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500150 /sparc Files generic to SPARC architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400151 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500152/api Machine/arch independent API for external apps
153/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800154/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500155/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500156/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500157/disk Code for disk drive partition handling
158/doc Documentation (don't expect too much)
159/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400160/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500161/examples Example code for standalone applications, etc.
162/fs Filesystem code (cramfs, ext2, jffs2, etc.)
163/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500164/lib Library routines generic to all architectures
165/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500166/net Networking code
167/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500168/scripts Various build scripts and Makefiles
169/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500170/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000171
wdenkc6097192002-11-03 00:24:07 +0000172Software Configuration:
173=======================
174
175Configuration is usually done using C preprocessor defines; the
176rationale behind that is to avoid dead code whenever possible.
177
178There are two classes of configuration variables:
179
180* Configuration _OPTIONS_:
181 These are selectable by the user and have names beginning with
182 "CONFIG_".
183
184* Configuration _SETTINGS_:
185 These depend on the hardware etc. and should not be meddled with if
186 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000188
Robert P. J. Day7207b362015-12-19 07:16:10 -0500189Previously, all configuration was done by hand, which involved creating
190symbolic links and editing configuration files manually. More recently,
191U-Boot has added the Kbuild infrastructure used by the Linux kernel,
192allowing you to use the "make menuconfig" command to configure your
193build.
wdenkc6097192002-11-03 00:24:07 +0000194
195
196Selection of Processor Architecture and Board Type:
197---------------------------------------------------
198
199For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200200configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000201
202Example: For a TQM823L module type:
203
204 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200205 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000206
Robert P. J. Day7207b362015-12-19 07:16:10 -0500207Note: If you're looking for the default configuration file for a board
208you're sure used to be there but is now missing, check the file
209doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000210
Simon Glass75b3c3a2014-03-22 17:12:59 -0600211Sandbox Environment:
212--------------------
213
214U-Boot can be built natively to run on a Linux host using the 'sandbox'
215board. This allows feature development which is not board- or architecture-
216specific to be undertaken on a native platform. The sandbox is also used to
217run some of U-Boot's tests.
218
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530219See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600220
221
Simon Glassdb910352015-03-03 08:03:00 -0700222Board Initialisation Flow:
223--------------------------
224
225This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500226SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700227
Robert P. J. Day7207b362015-12-19 07:16:10 -0500228Note: "SPL" stands for "Secondary Program Loader," which is explained in
229more detail later in this file.
230
231At present, SPL mostly uses a separate code path, but the function names
232and roles of each function are the same. Some boards or architectures
233may not conform to this. At least most ARM boards which use
234CONFIG_SPL_FRAMEWORK conform to this.
235
236Execution typically starts with an architecture-specific (and possibly
237CPU-specific) start.S file, such as:
238
239 - arch/arm/cpu/armv7/start.S
240 - arch/powerpc/cpu/mpc83xx/start.S
241 - arch/mips/cpu/start.S
242
243and so on. From there, three functions are called; the purpose and
244limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700245
246lowlevel_init():
247 - purpose: essential init to permit execution to reach board_init_f()
248 - no global_data or BSS
249 - there is no stack (ARMv7 may have one but it will soon be removed)
250 - must not set up SDRAM or use console
251 - must only do the bare minimum to allow execution to continue to
252 board_init_f()
253 - this is almost never needed
254 - return normally from this function
255
256board_init_f():
257 - purpose: set up the machine ready for running board_init_r():
258 i.e. SDRAM and serial UART
259 - global_data is available
260 - stack is in SRAM
261 - BSS is not available, so you cannot use global/static variables,
262 only stack variables and global_data
263
264 Non-SPL-specific notes:
265 - dram_init() is called to set up DRAM. If already done in SPL this
266 can do nothing
267
268 SPL-specific notes:
269 - you can override the entire board_init_f() function with your own
270 version as needed.
271 - preloader_console_init() can be called here in extremis
272 - should set up SDRAM, and anything needed to make the UART work
273 - these is no need to clear BSS, it will be done by crt0.S
274 - must return normally from this function (don't call board_init_r()
275 directly)
276
277Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
278this point the stack and global_data are relocated to below
279CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
280memory.
281
282board_init_r():
283 - purpose: main execution, common code
284 - global_data is available
285 - SDRAM is available
286 - BSS is available, all static/global variables can be used
287 - execution eventually continues to main_loop()
288
289 Non-SPL-specific notes:
290 - U-Boot is relocated to the top of memory and is now running from
291 there.
292
293 SPL-specific notes:
294 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
295 CONFIG_SPL_STACK_R_ADDR points into SDRAM
296 - preloader_console_init() can be called here - typically this is
297 done by defining CONFIG_SPL_BOARD_INIT and then supplying a
298 spl_board_init() function containing this call
299 - loads U-Boot or (in falcon mode) Linux
300
301
302
wdenkc6097192002-11-03 00:24:07 +0000303Configuration Options:
304----------------------
305
306Configuration depends on the combination of board and CPU type; all
307such information is kept in a configuration file
308"include/configs/<board_name>.h".
309
310Example: For a TQM823L module, all configuration settings are in
311"include/configs/TQM823L.h".
312
313
wdenk7f6c2cb2002-11-10 22:06:23 +0000314Many of the options are named exactly as the corresponding Linux
315kernel configuration options. The intention is to make it easier to
316build a config tool - later.
317
318
wdenkc6097192002-11-03 00:24:07 +0000319The following options need to be configured:
320
Kim Phillips26281142007-08-10 13:28:25 -0500321- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000322
Kim Phillips26281142007-08-10 13:28:25 -0500323- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200324
325- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100326 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000327
Lei Wencf946c62011-02-09 18:06:58 +0530328- Marvell Family Member
329 CONFIG_SYS_MVFS - define it if you want to enable
330 multiple fs option at one time
331 for marvell soc family
332
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200333- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
339 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000340
wdenk66ca92a2004-09-28 17:59:53 +0000341- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000344 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000345 See doc/README.MPC866
346
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000348
wdenkba56f622004-02-06 23:19:44 +0000349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200354 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000355
Heiko Schocher506f3912009-03-12 07:37:15 +0100356 CONFIG_SYS_DELAYED_ICACHE
357
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
360
Kumar Gala66412c62011-02-18 05:40:54 -0600361- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000362 CONFIG_SYS_PPC64
363
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
367
Kumar Gala66412c62011-02-18 05:40:54 -0600368 CONFIG_SYS_FSL_TBCLK_DIV
369
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
373
Kumar Gala8f290842011-05-20 00:39:21 -0500374 CONFIG_SYS_FSL_PCIE_COMPAT
375
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
378
Prabhakar Kushwahaafa6b552012-04-29 23:56:13 +0000379 CONFIG_SYS_PPC_E500_DEBUG_TLB
380
381 Enables a temporary TLB entry to be used during boot to work
382 around limitations in e500v1 and e500v2 external debugger
383 support. This reduces the portions of the boot code where
384 breakpoints and single stepping do not work. The value of this
385 symbol should be set to the TLB1 entry to be used for this
386 purpose.
387
Scott Wood33eee332012-08-14 10:14:53 +0000388 CONFIG_SYS_FSL_ERRATUM_A004510
389
390 Enables a workaround for erratum A004510. If set,
391 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
392 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
393
394 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
395 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
396
397 Defines one or two SoC revisions (low 8 bits of SVR)
398 for which the A004510 workaround should be applied.
399
400 The rest of SVR is either not relevant to the decision
401 of whether the erratum is present (e.g. p2040 versus
402 p2041) or is implied by the build target, which controls
403 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
404
405 See Freescale App Note 4493 for more information about
406 this erratum.
407
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530408 CONFIG_A003399_NOR_WORKAROUND
409 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800410 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530411
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530412 CONFIG_A008044_WORKAROUND
413 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800414 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530415
Scott Wood33eee332012-08-14 10:14:53 +0000416 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
417
418 This is the value to write into CCSR offset 0x18600
419 according to the A004510 workaround.
420
Priyanka Jain64501c62013-07-02 09:21:04 +0530421 CONFIG_SYS_FSL_DSP_DDR_ADDR
422 This value denotes start offset of DDR memory which is
423 connected exclusively to the DSP cores.
424
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530425 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
426 This value denotes start offset of M2 memory
427 which is directly connected to the DSP core.
428
Priyanka Jain64501c62013-07-02 09:21:04 +0530429 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
430 This value denotes start offset of M3 memory which is directly
431 connected to the DSP core.
432
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530433 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
434 This value denotes start offset of DSP CCSR space.
435
Priyanka Jainb1359912013-12-17 14:25:52 +0530436 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
437 Single Source Clock is clocking mode present in some of FSL SoC's.
438 In this mode, a single differential clock is used to supply
439 clocks to the sysclock, ddrclock and usbclock.
440
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530441 CONFIG_SYS_CPC_REINIT_F
442 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800443 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530444
Tang Yuantianaade2002014-04-17 15:33:46 +0800445 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800446 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800447 supported, core will start to execute uboot when wakes up.
448
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000449- Generic CPU options:
York Sun2a1680e2014-05-02 17:28:04 -0700450 CONFIG_SYS_GENERIC_GLOBAL_DATA
451 Defines global data is initialized in generic board board_init_f().
452 If this macro is defined, global data is created and cleared in
453 generic board board_init_f(). Without this macro, architecture/board
454 should initialize global data before calling board_init_f().
455
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000456 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
457
458 Defines the endianess of the CPU. Implementation of those
459 values is arch specific.
460
York Sun5614e712013-09-30 09:22:09 -0700461 CONFIG_SYS_FSL_DDR
462 Freescale DDR driver in use. This type of DDR controller is
463 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
464 SoCs.
465
466 CONFIG_SYS_FSL_DDR_ADDR
467 Freescale DDR memory-mapped register base.
468
469 CONFIG_SYS_FSL_DDR_EMU
470 Specify emulator support for DDR. Some DDR features such as
471 deskew training are not available.
472
473 CONFIG_SYS_FSL_DDRC_GEN1
474 Freescale DDR1 controller.
475
476 CONFIG_SYS_FSL_DDRC_GEN2
477 Freescale DDR2 controller.
478
479 CONFIG_SYS_FSL_DDRC_GEN3
480 Freescale DDR3 controller.
481
York Sun34e026f2014-03-27 17:54:47 -0700482 CONFIG_SYS_FSL_DDRC_GEN4
483 Freescale DDR4 controller.
484
York Sun9ac4ffb2013-09-30 14:20:51 -0700485 CONFIG_SYS_FSL_DDRC_ARM_GEN3
486 Freescale DDR3 controller for ARM-based SoCs.
487
York Sun5614e712013-09-30 09:22:09 -0700488 CONFIG_SYS_FSL_DDR1
489 Board config to use DDR1. It can be enabled for SoCs with
490 Freescale DDR1 or DDR2 controllers, depending on the board
491 implemetation.
492
493 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400494 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700495 Freescale DDR2 or DDR3 controllers, depending on the board
496 implementation.
497
498 CONFIG_SYS_FSL_DDR3
499 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700500 Freescale DDR3 or DDR3L controllers.
501
502 CONFIG_SYS_FSL_DDR3L
503 Board config to use DDR3L. It can be enabled for SoCs with
504 DDR3L controllers.
505
506 CONFIG_SYS_FSL_DDR4
507 Board config to use DDR4. It can be enabled for SoCs with
508 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700509
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530510 CONFIG_SYS_FSL_IFC_BE
511 Defines the IFC controller register space as Big Endian
512
513 CONFIG_SYS_FSL_IFC_LE
514 Defines the IFC controller register space as Little Endian
515
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530516 CONFIG_SYS_FSL_PBL_PBI
517 It enables addition of RCW (Power on reset configuration) in built image.
518 Please refer doc/README.pblimage for more details
519
520 CONFIG_SYS_FSL_PBL_RCW
521 It adds PBI(pre-boot instructions) commands in u-boot build image.
522 PBI commands can be used to configure SoC before it starts the execution.
523 Please refer doc/README.pblimage for more details
524
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530525 CONFIG_SPL_FSL_PBL
526 It adds a target to create boot binary having SPL binary in PBI format
527 concatenated with u-boot binary.
528
York Sun4e5b1bd2014-02-10 13:59:42 -0800529 CONFIG_SYS_FSL_DDR_BE
530 Defines the DDR controller register space as Big Endian
531
532 CONFIG_SYS_FSL_DDR_LE
533 Defines the DDR controller register space as Little Endian
534
York Sun6b9e3092014-02-10 13:59:43 -0800535 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
536 Physical address from the view of DDR controllers. It is the
537 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
538 it could be different for ARM SoCs.
539
York Sun6b1e1252014-02-10 13:59:44 -0800540 CONFIG_SYS_FSL_DDR_INTLV_256B
541 DDR controller interleaving on 256-byte. This is a special
542 interleaving mode, handled by Dickens for Freescale layerscape
543 SoCs with ARM core.
544
York Sun1d71efb2014-08-01 15:51:00 -0700545 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
546 Number of controllers used as main memory.
547
548 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
549 Number of controllers used for other than main memory.
550
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530551 CONFIG_SYS_FSL_HAS_DP_DDR
552 Defines the SoC has DP-DDR used for DPAA.
553
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530554 CONFIG_SYS_FSL_SEC_BE
555 Defines the SEC controller register space as Big Endian
556
557 CONFIG_SYS_FSL_SEC_LE
558 Defines the SEC controller register space as Little Endian
559
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200560- MIPS CPU options:
561 CONFIG_SYS_INIT_SP_OFFSET
562
563 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
564 pointer. This is needed for the temporary stack before
565 relocation.
566
567 CONFIG_SYS_MIPS_CACHE_MODE
568
569 Cache operation mode for the MIPS CPU.
570 See also arch/mips/include/asm/mipsregs.h.
571 Possible values are:
572 CONF_CM_CACHABLE_NO_WA
573 CONF_CM_CACHABLE_WA
574 CONF_CM_UNCACHED
575 CONF_CM_CACHABLE_NONCOHERENT
576 CONF_CM_CACHABLE_CE
577 CONF_CM_CACHABLE_COW
578 CONF_CM_CACHABLE_CUW
579 CONF_CM_CACHABLE_ACCELERATED
580
581 CONFIG_SYS_XWAY_EBU_BOOTCFG
582
583 Special option for Lantiq XWAY SoCs for booting from NOR flash.
584 See also arch/mips/cpu/mips32/start.S.
585
586 CONFIG_XWAY_SWAP_BYTES
587
588 Enable compilation of tools/xway-swap-bytes needed for Lantiq
589 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
590 be swapped if a flash programmer is used.
591
Christian Rieschb67d8812012-02-02 00:44:39 +0000592- ARM options:
593 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
594
595 Select high exception vectors of the ARM core, e.g., do not
596 clear the V bit of the c1 register of CP15.
597
Aneesh V5356f542012-03-08 07:20:19 +0000598 CONFIG_SYS_THUMB_BUILD
599
600 Use this flag to build U-Boot using the Thumb instruction
601 set for ARM architectures. Thumb instruction set provides
602 better code density. For ARM architectures that support
603 Thumb2 this flag will result in Thumb2 code generated by
604 GCC.
605
Stephen Warrenc5d47522013-03-04 13:29:40 +0000606 CONFIG_ARM_ERRATA_716044
Stephen Warren06785872013-02-26 12:28:27 +0000607 CONFIG_ARM_ERRATA_742230
608 CONFIG_ARM_ERRATA_743622
609 CONFIG_ARM_ERRATA_751472
Nitin Gargb7588e32014-04-02 08:55:02 -0500610 CONFIG_ARM_ERRATA_761320
Ian Campbelle392b922015-09-29 10:27:09 +0100611 CONFIG_ARM_ERRATA_773022
612 CONFIG_ARM_ERRATA_774769
613 CONFIG_ARM_ERRATA_794072
Stephen Warren06785872013-02-26 12:28:27 +0000614
615 If set, the workarounds for these ARM errata are applied early
616 during U-Boot startup. Note that these options force the
617 workarounds to be applied; no CPU-type/version detection
618 exists, unlike the similar options in the Linux kernel. Do not
619 set these options unless they apply!
620
York Sun207774b2015-03-20 19:28:08 -0700621 COUNTER_FREQUENCY
622 Generic timer clock source frequency.
623
624 COUNTER_FREQUENCY_REAL
625 Generic timer clock source frequency if the real clock is
626 different from COUNTER_FREQUENCY, and can only be determined
627 at run time.
628
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500629 NOTE: The following can be machine specific errata. These
630 do have ability to provide rudimentary version and machine
631 specific checks, but expect no product checks.
Nishanth Menon5902f4c2015-03-09 17:12:01 -0500632 CONFIG_ARM_ERRATA_430973
Nishanth Menonb45c48a2015-03-09 17:12:00 -0500633 CONFIG_ARM_ERRATA_454179
Nishanth Menon9b4d65f2015-03-09 17:12:02 -0500634 CONFIG_ARM_ERRATA_621766
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500635 CONFIG_ARM_ERRATA_798870
Nishanth Menona615d0b2015-07-27 16:26:05 -0500636 CONFIG_ARM_ERRATA_801819
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500637
Stephen Warren73c38932015-01-19 16:25:52 -0700638- Tegra SoC options:
639 CONFIG_TEGRA_SUPPORT_NON_SECURE
640
641 Support executing U-Boot in non-secure (NS) mode. Certain
642 impossible actions will be skipped if the CPU is in NS mode,
643 such as ARM architectural timer initialization.
644
wdenk5da627a2003-10-09 20:09:04 +0000645- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000646 CONFIG_CLOCKS_IN_MHZ
647
648 U-Boot stores all clock information in Hz
649 internally. For binary compatibility with older Linux
650 kernels (which expect the clocks passed in the
651 bd_info data to be in MHz) the environment variable
652 "clocks_in_mhz" can be defined so that U-Boot
653 converts clock data to MHZ before passing it to the
654 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000655 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100656 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000657 default environment.
658
wdenk5da627a2003-10-09 20:09:04 +0000659 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
660
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800661 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000662 expect it to be in bytes, others in MB.
663 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
664
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400665 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200666
667 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400668 passed using flattened device trees (based on open firmware
669 concepts).
670
671 CONFIG_OF_LIBFDT
672 * New libfdt-based support
673 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500674 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400675
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200676 OF_CPU - The proper name of the cpus node (only required for
677 MPC512X and MPC5xxx based boards).
678 OF_SOC - The proper name of the soc node (only required for
679 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200680 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600681 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200682
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200683 boards with QUICC Engines require OF_QE to set UCC MAC
684 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500685
Kumar Gala4e253132006-01-11 13:54:17 -0600686 CONFIG_OF_BOARD_SETUP
687
688 Board code has addition modification that it wants to make
689 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000690
Simon Glassc654b512014-10-23 18:58:54 -0600691 CONFIG_OF_SYSTEM_SETUP
692
693 Other code has addition modification that it wants to make
694 to the flat device tree before handing it off to the kernel.
695 This causes ft_system_setup() to be called before booting
696 the kernel.
697
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200698 CONFIG_OF_IDE_FIXUP
699
700 U-Boot can detect if an IDE device is present or not.
701 If not, and this new config option is activated, U-Boot
702 removes the ATA node from the DTS before booting Linux,
703 so the Linux IDE driver does not probe the device and
704 crash. This is needed for buggy hardware (uc101) where
705 no pull down resistor is connected to the signal IDE5V_DD7.
706
Igor Grinberg7eb29392011-07-14 05:45:07 +0000707 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
708
709 This setting is mandatory for all boards that have only one
710 machine type and must be used to specify the machine type
711 number as it appears in the ARM machine registry
712 (see http://www.arm.linux.org.uk/developer/machines/).
713 Only boards that have multiple machine types supported
714 in a single configuration file and the machine type is
715 runtime discoverable, do not have to use this setting.
716
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100717- vxWorks boot parameters:
718
719 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700720 environments variables: bootdev, bootfile, ipaddr, netmask,
721 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100722 It loads the vxWorks image pointed bootfile.
723
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100724 Note: If a "bootargs" environment is defined, it will overwride
725 the defaults discussed just above.
726
Aneesh V2c451f72011-06-16 23:30:47 +0000727- Cache Configuration:
728 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
729 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
730 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
731
Aneesh V93bc2192011-06-16 23:30:51 +0000732- Cache Configuration for ARM:
733 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
734 controller
735 CONFIG_SYS_PL310_BASE - Physical base address of PL310
736 controller register space
737
wdenk6705d812004-08-02 23:22:59 +0000738- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200739 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000740
741 Define this if you want support for Amba PrimeCell PL010 UARTs.
742
Andreas Engel48d01922008-09-08 14:30:53 +0200743 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000744
745 Define this if you want support for Amba PrimeCell PL011 UARTs.
746
747 CONFIG_PL011_CLOCK
748
749 If you have Amba PrimeCell PL011 UARTs, set this variable to
750 the clock speed of the UARTs.
751
752 CONFIG_PL01x_PORTS
753
754 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
755 define this to a list of base addresses for each (supported)
756 port. See e.g. include/configs/versatile.h
757
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400758 CONFIG_SERIAL_HW_FLOW_CONTROL
759
760 Define this variable to enable hw flow control in serial driver.
761 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000762
wdenkc6097192002-11-03 00:24:07 +0000763- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000764 Depending on board, define exactly one serial port
765 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
766 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
767 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000768
769 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
770 port routines must be defined elsewhere
771 (i.e. serial_init(), serial_getc(), ...)
772
wdenkc6097192002-11-03 00:24:07 +0000773- Console Baudrate:
774 CONFIG_BAUDRATE - in bps
775 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200776 CONFIG_SYS_BAUDRATE_TABLE, see below.
777 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000778
Heiko Schocherc92fac92009-01-30 12:55:38 +0100779- Console Rx buffer length
780 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
781 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100782 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100783 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
784 must be defined, to setup the maximum idle timeout for
785 the SMC.
786
wdenkc6097192002-11-03 00:24:07 +0000787- Autoboot Command:
788 CONFIG_BOOTCOMMAND
789 Only needed when CONFIG_BOOTDELAY is enabled;
790 define a command string that is automatically executed
791 when no character is read on the console interface
792 within "Boot Delay" after reset.
793
794 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000795 This can be used to pass arguments to the bootm
796 command. The value of CONFIG_BOOTARGS goes into the
797 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000798
799 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000800 The value of these goes into the environment as
801 "ramboot" and "nfsboot" respectively, and can be used
802 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200803 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000804
Heiko Schochereda0ba32013-11-04 14:04:59 +0100805- Bootcount:
806 CONFIG_BOOTCOUNT_LIMIT
807 Implements a mechanism for detecting a repeating reboot
808 cycle, see:
809 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
810
811 CONFIG_BOOTCOUNT_ENV
812 If no softreset save registers are found on the hardware
813 "bootcount" is stored in the environment. To prevent a
814 saveenv on all reboots, the environment variable
815 "upgrade_available" is used. If "upgrade_available" is
816 0, "bootcount" is always 0, if "upgrade_available" is
817 1 "bootcount" is incremented in the environment.
818 So the Userspace Applikation must set the "upgrade_available"
819 and "bootcount" variable to 0, if a boot was successfully.
820
wdenkc6097192002-11-03 00:24:07 +0000821- Pre-Boot Commands:
822 CONFIG_PREBOOT
823
824 When this option is #defined, the existence of the
825 environment variable "preboot" will be checked
826 immediately before starting the CONFIG_BOOTDELAY
827 countdown and/or running the auto-boot command resp.
828 entering interactive mode.
829
830 This feature is especially useful when "preboot" is
831 automatically generated or modified. For an example
832 see the LWMON board specific code: here "preboot" is
833 modified when the user holds down a certain
834 combination of keys on the (special) keyboard when
835 booting the systems
836
837- Serial Download Echo Mode:
838 CONFIG_LOADS_ECHO
839 If defined to 1, all characters received during a
840 serial download (using the "loads" command) are
841 echoed back. This might be needed by some terminal
842 emulations (like "cu"), but may as well just take
843 time on others. This setting #define's the initial
844 value of the "loads_echo" environment variable.
845
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500846- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000847 CONFIG_KGDB_BAUDRATE
848 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200849 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000850
851- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500852 Monitor commands can be included or excluded
853 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000854 <config_cmd_all.h> and #undef'ing unwanted
Joe Hershbergeref0f2f52015-06-22 16:15:30 -0500855 commands, or adding #define's for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000856
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500857 The default command configuration includes all commands
858 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000859
Marek Vasutb401b732014-03-05 19:58:39 +0100860 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500861 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500862 CONFIG_CMD_BDI bdinfo
863 CONFIG_CMD_BEDBUG * Include BedBug Debugger
864 CONFIG_CMD_BMP * BMP support
865 CONFIG_CMD_BSP * Board specific commands
866 CONFIG_CMD_BOOTD bootd
Tom Rinid2b2ffe2014-08-14 06:42:36 -0400867 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500868 CONFIG_CMD_CACHE * icache, dcache
Michal Simek08d0d6f2013-11-21 13:39:02 -0800869 CONFIG_CMD_CLK * clock command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500870 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500871 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500872 CONFIG_CMD_DATE * support for RTC, date/time...
873 CONFIG_CMD_DHCP * DHCP support
874 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600875 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
876 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
877 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
878 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500879 CONFIG_CMD_DTT * Digital Therm and Thermostat
880 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500881 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500882 CONFIG_CMD_EEPROM * EEPROM read/write support
Nikita Kiryanovaa9e6042016-04-16 17:55:03 +0300883 CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500884 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600885 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600886 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500887 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500888 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000889 CONFIG_CMD_EXT2 * ext2 command support
890 CONFIG_CMD_EXT4 * ext4 command support
Stephen Warren16f4d932014-01-24 20:46:37 -0700891 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
892 that work for multiple fs types
Christian Gmeiner59e890e2014-11-12 14:35:04 +0100893 CONFIG_CMD_FS_UUID * Look up a filesystem UUID
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500894 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500895 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000896 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500897 CONFIG_CMD_FLASH flinfo, erase, protect
898 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200899 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000900 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500901 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +0000902 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +0000903 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500904 CONFIG_CMD_I2C * I2C serial bus support
905 CONFIG_CMD_IDE * IDE harddisk support
906 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +0000907 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200908 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500909 CONFIG_CMD_IMMAP * IMMR dump support
Simon Glassaa532332014-06-11 23:29:41 -0600910 CONFIG_CMD_IOTRACE * I/O tracing for debugging
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500911 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +0000912 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500913 CONFIG_CMD_IRQ * irqinfo
914 CONFIG_CMD_ITEST Integer/string test of 2 values
915 CONFIG_CMD_JFFS2 * JFFS2 Support
916 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200917 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +0000918 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
919 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500920 CONFIG_CMD_LOADB loadb
921 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200922 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400923 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +0000924 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500925 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +0000926 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200927 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500928 CONFIG_CMD_MISC Misc functions like sleep etc
929 CONFIG_CMD_MMC * MMC memory mapped support
930 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +0100931 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500932 CONFIG_CMD_NAND * NAND support
933 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200934 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -0600935 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000936 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500937 CONFIG_CMD_PCI * pciinfo
938 CONFIG_CMD_PCMCIA * PCMCIA support
939 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
940 host
941 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +0000942 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500943 CONFIG_CMD_REGINFO * Register dump
944 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +0000945 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500946 CONFIG_CMD_SAVES * save S record dump
Simon Glassc649e3c2016-05-01 11:36:02 -0600947 CONFIG_SCSI * SCSI Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500948 CONFIG_CMD_SDRAM * print SDRAM configuration information
949 (requires CONFIG_CMD_I2C)
950 CONFIG_CMD_SETGETDCR Support for DCR Register access
951 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -0700952 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200953 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400954 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +0800955 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200956 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500957 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +0000958 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +0000959 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +0000960 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
961 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500962 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500963 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +0000964 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200965 CONFIG_CMD_XIMG Load part of Multi Image
Przemyslaw Marczak89c82302014-04-02 10:20:05 +0200966 CONFIG_CMD_UUID * Generate random UUID or GUID string
wdenkc6097192002-11-03 00:24:07 +0000967
968 EXAMPLE: If you want all functions except of network
969 support you can write:
970
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500971 #include "config_cmd_all.h"
972 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +0000973
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400974 Other Commands:
975 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +0000976
977 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500978 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +0000979 what you (and your U-Boot users) are doing. Data
980 cache cannot be enabled on systems like the 8xx or
981 8260 (where accesses to the IMMR region must be
982 uncached), and it cannot be disabled on all other
983 systems where we (mis-) use the data cache to hold an
984 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +0000985
986
987 XXX - this list needs to get updated!
988
Simon Glass302a6482016-03-13 19:07:28 -0600989- Removal of commands
990 If no commands are needed to boot, you can disable
991 CONFIG_CMDLINE to remove them. In this case, the command line
992 will not be available, and when U-Boot wants to execute the
993 boot command (on start-up) it will call board_run_command()
994 instead. This can reduce image size significantly for very
995 simple boot procedures.
996
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000997- Regular expression support:
998 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200999 If this variable is defined, U-Boot is linked against
1000 the SLRE (Super Light Regular Expression) library,
1001 which adds regex support to some commands, as for
1002 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001003
Simon Glass45ba8072011-10-15 05:48:20 +00001004- Device tree:
1005 CONFIG_OF_CONTROL
1006 If this variable is defined, U-Boot will use a device tree
1007 to configure its devices, instead of relying on statically
1008 compiled #defines in the board file. This option is
1009 experimental and only available on a few boards. The device
1010 tree is available in the global data as gd->fdt_blob.
1011
Simon Glass2c0f79e2011-10-24 19:15:31 +00001012 U-Boot needs to get its device tree from somewhere. This can
1013 be done using one of the two options below:
Simon Glassbbb0b122011-10-15 05:48:21 +00001014
1015 CONFIG_OF_EMBED
1016 If this variable is defined, U-Boot will embed a device tree
1017 binary in its image. This device tree file should be in the
1018 board directory and called <soc>-<board>.dts. The binary file
1019 is then picked up in board_init_f() and made available through
1020 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +00001021
Simon Glass2c0f79e2011-10-24 19:15:31 +00001022 CONFIG_OF_SEPARATE
1023 If this variable is defined, U-Boot will build a device tree
1024 binary. It will be called u-boot.dtb. Architecture-specific
1025 code will locate it at run-time. Generally this works by:
1026
1027 cat u-boot.bin u-boot.dtb >image.bin
1028
1029 and in fact, U-Boot does this for you, creating a file called
1030 u-boot-dtb.bin which is useful in the common case. You can
1031 still use the individual files if you need something more
1032 exotic.
1033
wdenkc6097192002-11-03 00:24:07 +00001034- Watchdog:
1035 CONFIG_WATCHDOG
1036 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001037 support for the SoC. There must be support in the SoC
1038 specific code for a watchdog. For the 8xx and 8260
1039 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1040 register. When supported for a specific SoC is
1041 available, then no further board specific code should
1042 be needed to use it.
1043
1044 CONFIG_HW_WATCHDOG
1045 When using a watchdog circuitry external to the used
1046 SoC, then define this variable and provide board
1047 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001048
Heiko Schocher7bae0d62015-01-21 08:38:22 +01001049 CONFIG_AT91_HW_WDT_TIMEOUT
1050 specify the timeout in seconds. default 2 seconds.
1051
stroesec1551ea2003-04-04 15:53:41 +00001052- U-Boot Version:
1053 CONFIG_VERSION_VARIABLE
1054 If this variable is defined, an environment variable
1055 named "ver" is created by U-Boot showing the U-Boot
1056 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001057 Any change to this variable will be reverted at the
1058 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001059
wdenkc6097192002-11-03 00:24:07 +00001060- Real-Time Clock:
1061
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001062 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001063 has to be selected, too. Define exactly one of the
1064 following options:
1065
1066 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1067 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001068 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001069 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001070 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001071 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001072 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +02001073 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +00001074 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001075 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001076 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001077 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001078 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1079 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001080
wdenkb37c7e52003-06-30 16:24:52 +00001081 Note that if the RTC uses I2C, then the I2C interface
1082 must also be configured. See I2C Support, below.
1083
Peter Tysere92739d2008-12-17 16:36:21 -06001084- GPIO Support:
1085 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001086
Chris Packham5dec49c2010-12-19 10:12:13 +00001087 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1088 chip-ngpio pairs that tell the PCA953X driver the number of
1089 pins supported by a particular chip.
1090
Peter Tysere92739d2008-12-17 16:36:21 -06001091 Note that if the GPIO device uses I2C, then the I2C interface
1092 must also be configured. See I2C Support, below.
1093
Simon Glassaa532332014-06-11 23:29:41 -06001094- I/O tracing:
1095 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1096 accesses and can checksum them or write a list of them out
1097 to memory. See the 'iotrace' command for details. This is
1098 useful for testing device drivers since it can confirm that
1099 the driver behaves the same way before and after a code
1100 change. Currently this is supported on sandbox and arm. To
1101 add support for your architecture, add '#include <iotrace.h>'
1102 to the bottom of arch/<arch>/include/asm/io.h and test.
1103
1104 Example output from the 'iotrace stats' command is below.
1105 Note that if the trace buffer is exhausted, the checksum will
1106 still continue to operate.
1107
1108 iotrace is enabled
1109 Start: 10000000 (buffer start address)
1110 Size: 00010000 (buffer size)
1111 Offset: 00000120 (current buffer offset)
1112 Output: 10000120 (start + offset)
1113 Count: 00000018 (number of trace records)
1114 CRC32: 9526fb66 (CRC32 of all trace records)
1115
wdenkc6097192002-11-03 00:24:07 +00001116- Timestamp Support:
1117
wdenk43d96162003-03-06 00:02:04 +00001118 When CONFIG_TIMESTAMP is selected, the timestamp
1119 (date and time) of an image is printed by image
1120 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001121 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001122
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001123- Partition Labels (disklabels) Supported:
1124 Zero or more of the following:
1125 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1126 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1127 Intel architecture, USB sticks, etc.
1128 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1129 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1130 bootloader. Note 2TB partition limit; see
1131 disk/part_efi.c
1132 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001133
Wolfgang Denk218ca722008-03-26 10:40:12 +01001134 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
Simon Glassc649e3c2016-05-01 11:36:02 -06001135 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001136 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001137
1138- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001139 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1140 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001141
wdenk4d13cba2004-03-14 14:09:05 +00001142 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1143 be performed by calling the function
1144 ide_set_reset(int reset)
1145 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001146
1147- ATAPI Support:
1148 CONFIG_ATAPI
1149
1150 Set this to enable ATAPI support.
1151
wdenkc40b2952004-03-13 23:29:43 +00001152- LBA48 Support
1153 CONFIG_LBA48
1154
1155 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001156 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001157 Whithout these , LBA48 support uses 32bit variables and will 'only'
1158 support disks up to 2.1TB.
1159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001160 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001161 When enabled, makes the IDE subsystem use 64bit sector addresses.
1162 Default is 32bit.
1163
wdenkc6097192002-11-03 00:24:07 +00001164- SCSI Support:
1165 At the moment only there is only support for the
1166 SYM53C8XX SCSI controller; define
1167 CONFIG_SCSI_SYM53C8XX to enable it.
1168
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001169 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1170 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1171 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001172 maximum numbers of LUNs, SCSI ID's and target
1173 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001174 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001175
Wolfgang Denk93e14592013-10-04 17:43:24 +02001176 The environment variable 'scsidevs' is set to the number of
1177 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001178
wdenkc6097192002-11-03 00:24:07 +00001179- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001180 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001181 Support for Intel 8254x/8257x gigabit chips.
1182
1183 CONFIG_E1000_SPI
1184 Utility code for direct access to the SPI bus on Intel 8257x.
1185 This does not do anything useful unless you set at least one
1186 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1187
1188 CONFIG_E1000_SPI_GENERIC
1189 Allow generic access to the SPI bus on the Intel 8257x, for
1190 example with the "sspi" command.
1191
1192 CONFIG_CMD_E1000
1193 Management command for E1000 devices. When used on devices
1194 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001195
wdenkc6097192002-11-03 00:24:07 +00001196 CONFIG_EEPRO100
1197 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001198 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001199 write routine for first time initialisation.
1200
1201 CONFIG_TULIP
1202 Support for Digital 2114x chips.
1203 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1204 modem chip initialisation (KS8761/QS6611).
1205
1206 CONFIG_NATSEMI
1207 Support for National dp83815 chips.
1208
1209 CONFIG_NS8382X
1210 Support for National dp8382[01] gigabit chips.
1211
wdenk45219c42003-05-12 21:50:16 +00001212- NETWORK Support (other):
1213
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001214 CONFIG_DRIVER_AT91EMAC
1215 Support for AT91RM9200 EMAC.
1216
1217 CONFIG_RMII
1218 Define this to use reduced MII inteface
1219
1220 CONFIG_DRIVER_AT91EMAC_QUIET
1221 If this defined, the driver is quiet.
1222 The driver doen't show link status messages.
1223
Rob Herringefdd7312011-12-15 11:15:49 +00001224 CONFIG_CALXEDA_XGMAC
1225 Support for the Calxeda XGMAC device
1226
Ashok3bb46d22012-10-15 06:20:47 +00001227 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001228 Support for SMSC's LAN91C96 chips.
1229
wdenk45219c42003-05-12 21:50:16 +00001230 CONFIG_LAN91C96_USE_32_BIT
1231 Define this to enable 32 bit addressing
1232
Ashok3bb46d22012-10-15 06:20:47 +00001233 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001234 Support for SMSC's LAN91C111 chip
1235
1236 CONFIG_SMC91111_BASE
1237 Define this to hold the physical address
1238 of the device (I/O space)
1239
1240 CONFIG_SMC_USE_32_BIT
1241 Define this if data bus is 32 bits
1242
1243 CONFIG_SMC_USE_IOFUNCS
1244 Define this to use i/o functions instead of macros
1245 (some hardware wont work with macros)
1246
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001247 CONFIG_DRIVER_TI_EMAC
1248 Support for davinci emac
1249
1250 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1251 Define this if you have more then 3 PHYs.
1252
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001253 CONFIG_FTGMAC100
1254 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1255
1256 CONFIG_FTGMAC100_EGIGA
1257 Define this to use GE link update with gigabit PHY.
1258 Define this if FTGMAC100 is connected to gigabit PHY.
1259 If your system has 10/100 PHY only, it might not occur
1260 wrong behavior. Because PHY usually return timeout or
1261 useless data when polling gigabit status and gigabit
1262 control registers. This behavior won't affect the
1263 correctnessof 10/100 link speed update.
1264
Mike Rapoportc2fff332009-11-11 10:03:03 +02001265 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001266 Support for SMSC's LAN911x and LAN921x chips
1267
Mike Rapoportc2fff332009-11-11 10:03:03 +02001268 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001269 Define this to hold the physical address
1270 of the device (I/O space)
1271
Mike Rapoportc2fff332009-11-11 10:03:03 +02001272 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001273 Define this if data bus is 32 bits
1274
Mike Rapoportc2fff332009-11-11 10:03:03 +02001275 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001276 Define this if data bus is 16 bits. If your processor
1277 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001278 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001279
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001280 CONFIG_SH_ETHER
1281 Support for Renesas on-chip Ethernet controller
1282
1283 CONFIG_SH_ETHER_USE_PORT
1284 Define the number of ports to be used
1285
1286 CONFIG_SH_ETHER_PHY_ADDR
1287 Define the ETH PHY's address
1288
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001289 CONFIG_SH_ETHER_CACHE_WRITEBACK
1290 If this option is set, the driver enables cache flush.
1291
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001292- PWM Support:
1293 CONFIG_PWM_IMX
Robert P. J. Day5052e812016-09-13 08:35:18 -04001294 Support for PWM module on the imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001295
Vadim Bendebury5e124722011-10-17 08:36:14 +00001296- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001297 CONFIG_TPM
1298 Support TPM devices.
1299
Christophe Ricard0766ad22015-10-06 22:54:41 +02001300 CONFIG_TPM_TIS_INFINEON
1301 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001302 per system is supported at this time.
1303
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001304 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1305 Define the burst count bytes upper limit
1306
Christophe Ricard3aa74082016-01-21 23:27:13 +01001307 CONFIG_TPM_ST33ZP24
1308 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
1309
1310 CONFIG_TPM_ST33ZP24_I2C
1311 Support for STMicroelectronics ST33ZP24 I2C devices.
1312 Requires TPM_ST33ZP24 and I2C.
1313
Christophe Ricardb75fdc12016-01-21 23:27:14 +01001314 CONFIG_TPM_ST33ZP24_SPI
1315 Support for STMicroelectronics ST33ZP24 SPI devices.
1316 Requires TPM_ST33ZP24 and SPI.
1317
Dirk Eibachc01939c2013-06-26 15:55:15 +02001318 CONFIG_TPM_ATMEL_TWI
1319 Support for Atmel TWI TPM device. Requires I2C support.
1320
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001321 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001322 Support for generic parallel port TPM devices. Only one device
1323 per system is supported at this time.
1324
1325 CONFIG_TPM_TIS_BASE_ADDRESS
1326 Base address where the generic TPM device is mapped
1327 to. Contemporary x86 systems usually map it at
1328 0xfed40000.
1329
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001330 CONFIG_CMD_TPM
1331 Add tpm monitor functions.
1332 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1333 provides monitor access to authorized functions.
1334
1335 CONFIG_TPM
1336 Define this to enable the TPM support library which provides
1337 functional interfaces to some TPM commands.
1338 Requires support for a TPM device.
1339
1340 CONFIG_TPM_AUTH_SESSIONS
1341 Define this to enable authorized functions in the TPM library.
1342 Requires CONFIG_TPM and CONFIG_SHA1.
1343
wdenkc6097192002-11-03 00:24:07 +00001344- USB Support:
1345 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001346 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001347 CONFIG_USB_UHCI to enable it.
1348 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001349 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001350 storage devices.
1351 Note:
1352 Supported are USB Keyboards and USB Floppy drives
1353 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001354 MPC5200 USB requires additional defines:
1355 CONFIG_USB_CLOCK
1356 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001357 CONFIG_PSC3_USB
1358 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001359 CONFIG_USB_CONFIG
1360 for differential drivers: 0x00001000
1361 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001362 for differential drivers on PSC3: 0x00000100
1363 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001364 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001365 May be defined to allow interrupt polling
1366 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001367
Simon Glass9ab4ce22012-02-27 10:52:47 +00001368 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1369 txfilltuning field in the EHCI controller on reset.
1370
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001371 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1372 HW module registers.
1373
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001374- USB Device:
1375 Define the below if you wish to use the USB console.
1376 Once firmware is rebuilt from a serial console issue the
1377 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001378 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001379 it has found a new device. The environment variable usbtty
1380 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001381 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001382 Common Device Class Abstract Control Model serial device.
1383 If you select usbtty = gserial you should be able to enumerate
1384 a Linux host by
1385 # modprobe usbserial vendor=0xVendorID product=0xProductID
1386 else if using cdc_acm, simply setting the environment
1387 variable usbtty to be cdc_acm should suffice. The following
1388 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001389
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001390 CONFIG_USB_DEVICE
1391 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001392
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001393 CONFIG_USB_TTY
1394 Define this to have a tty type of device available to
1395 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001396
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301397 CONFIG_USBD_HS
1398 Define this to enable the high speed support for usb
1399 device and usbtty. If this feature is enabled, a routine
1400 int is_usbd_high_speed(void)
1401 also needs to be defined by the driver to dynamically poll
1402 whether the enumeration has succeded at high speed or full
1403 speed.
1404
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001405 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001406 Define this if you want stdin, stdout &/or stderr to
1407 be set to usbtty.
1408
1409 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001410 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001411 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001412 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001413
Wolfgang Denk386eda02006-06-14 18:14:56 +02001414 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001415 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001416 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001417 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1418 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1419 should pretend to be a Linux device to it's target host.
1420
1421 CONFIG_USBD_MANUFACTURER
1422 Define this string as the name of your company for
1423 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001424
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001425 CONFIG_USBD_PRODUCT_NAME
1426 Define this string as the name of your product
1427 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1428
1429 CONFIG_USBD_VENDORID
1430 Define this as your assigned Vendor ID from the USB
1431 Implementors Forum. This *must* be a genuine Vendor ID
1432 to avoid polluting the USB namespace.
1433 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001434
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001435 CONFIG_USBD_PRODUCTID
1436 Define this as the unique Product ID
1437 for your device
1438 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001439
Igor Grinbergd70a5602011-12-12 12:08:35 +02001440- ULPI Layer Support:
1441 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1442 the generic ULPI layer. The generic layer accesses the ULPI PHY
1443 via the platform viewport, so you need both the genric layer and
1444 the viewport enabled. Currently only Chipidea/ARC based
1445 viewport is supported.
1446 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1447 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001448 If your ULPI phy needs a different reference clock than the
1449 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1450 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001451
1452- MMC Support:
1453 The MMC controller on the Intel PXA is supported. To
1454 enable this define CONFIG_MMC. The MMC can be
1455 accessed from the boot prompt by mapping the device
1456 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001457 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1458 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001459
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001460 CONFIG_SH_MMCIF
1461 Support for Renesas on-chip MMCIF controller
1462
1463 CONFIG_SH_MMCIF_ADDR
1464 Define the base address of MMCIF registers
1465
1466 CONFIG_SH_MMCIF_CLK
1467 Define the clock frequency for MMCIF
1468
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001469 CONFIG_GENERIC_MMC
1470 Enable the generic MMC driver
1471
1472 CONFIG_SUPPORT_EMMC_BOOT
1473 Enable some additional features of the eMMC boot partitions.
1474
1475 CONFIG_SUPPORT_EMMC_RPMB
1476 Enable the commands for reading, writing and programming the
1477 key for the Replay Protection Memory Block partition in eMMC.
1478
Tom Rinib3ba6e92013-03-14 05:32:47 +00001479- USB Device Firmware Update (DFU) class support:
Paul Kocialkowski01acd6a2015-06-12 19:56:58 +02001480 CONFIG_USB_FUNCTION_DFU
Tom Rinib3ba6e92013-03-14 05:32:47 +00001481 This enables the USB portion of the DFU USB class
1482
1483 CONFIG_CMD_DFU
1484 This enables the command "dfu" which is used to have
1485 U-Boot create a DFU class device via USB. This command
1486 requires that the "dfu_alt_info" environment variable be
1487 set and define the alt settings to expose to the host.
1488
1489 CONFIG_DFU_MMC
1490 This enables support for exposing (e)MMC devices via DFU.
1491
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001492 CONFIG_DFU_NAND
1493 This enables support for exposing NAND devices via DFU.
1494
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301495 CONFIG_DFU_RAM
1496 This enables support for exposing RAM via DFU.
1497 Note: DFU spec refer to non-volatile memory usage, but
1498 allow usages beyond the scope of spec - here RAM usage,
1499 one that would help mostly the developer.
1500
Heiko Schochere7e75c72013-06-12 06:05:51 +02001501 CONFIG_SYS_DFU_DATA_BUF_SIZE
1502 Dfu transfer uses a buffer before writing data to the
1503 raw storage device. Make the size (in bytes) of this buffer
1504 configurable. The size of this buffer is also configurable
1505 through the "dfu_bufsiz" environment variable.
1506
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001507 CONFIG_SYS_DFU_MAX_FILE_SIZE
1508 When updating files rather than the raw storage device,
1509 we use a static buffer to copy the file into and then write
1510 the buffer once we've been given the whole file. Define
1511 this to the maximum filesize (in bytes) for the buffer.
1512 Default is 4 MiB if undefined.
1513
Heiko Schocher001a8312014-03-18 08:09:56 +01001514 DFU_DEFAULT_POLL_TIMEOUT
1515 Poll timeout [ms], is the timeout a device can send to the
1516 host. The host must wait for this timeout before sending
1517 a subsequent DFU_GET_STATUS request to the device.
1518
1519 DFU_MANIFEST_POLL_TIMEOUT
1520 Poll timeout [ms], which the device sends to the host when
1521 entering dfuMANIFEST state. Host waits this timeout, before
1522 sending again an USB request to the device.
1523
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001524- USB Device Android Fastboot support:
Paul Kocialkowski17da3c02015-06-12 19:56:59 +02001525 CONFIG_USB_FUNCTION_FASTBOOT
1526 This enables the USB part of the fastboot gadget
1527
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001528 CONFIG_CMD_FASTBOOT
1529 This enables the command "fastboot" which enables the Android
1530 fastboot mode for the platform's USB device. Fastboot is a USB
1531 protocol for downloading images, flashing and device control
1532 used on Android devices.
1533 See doc/README.android-fastboot for more information.
1534
1535 CONFIG_ANDROID_BOOT_IMAGE
1536 This enables support for booting images which use the Android
1537 image format header.
1538
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001539 CONFIG_FASTBOOT_BUF_ADDR
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001540 The fastboot protocol requires a large memory buffer for
1541 downloads. Define this to the starting RAM address to use for
1542 downloaded images.
1543
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001544 CONFIG_FASTBOOT_BUF_SIZE
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001545 The fastboot protocol requires a large memory buffer for
1546 downloads. This buffer should be as large as possible for a
1547 platform. Define this to the size available RAM for fastboot.
1548
Steve Raed1b5ed02014-08-26 11:47:28 -07001549 CONFIG_FASTBOOT_FLASH
1550 The fastboot protocol includes a "flash" command for writing
1551 the downloaded image to a non-volatile storage device. Define
1552 this to enable the "fastboot flash" command.
1553
1554 CONFIG_FASTBOOT_FLASH_MMC_DEV
1555 The fastboot "flash" command requires additional information
1556 regarding the non-volatile storage device. Define this to
1557 the eMMC device that fastboot should use to store the image.
1558
Steve Rae0ff7e582014-12-12 15:51:54 -08001559 CONFIG_FASTBOOT_GPT_NAME
1560 The fastboot "flash" command supports writing the downloaded
1561 image to the Protective MBR and the Primary GUID Partition
1562 Table. (Additionally, this downloaded image is post-processed
1563 to generate and write the Backup GUID Partition Table.)
1564 This occurs when the specified "partition name" on the
1565 "fastboot flash" command line matches this value.
Petr Kulhavy6f6c8632016-09-09 10:27:18 +02001566 The default is "gpt" if undefined.
Steve Rae0ff7e582014-12-12 15:51:54 -08001567
Petr Kulhavyb6dd69a2016-09-09 10:27:16 +02001568 CONFIG_FASTBOOT_MBR_NAME
1569 The fastboot "flash" command supports writing the downloaded
1570 image to DOS MBR.
1571 This occurs when the "partition name" specified on the
1572 "fastboot flash" command line matches this value.
1573 If not defined the default value "mbr" is used.
1574
wdenk6705d812004-08-02 23:22:59 +00001575- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001576 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001577 Define these for a default partition on a NAND device
1578
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001579 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1580 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001581 Define these for a default partition on a NOR device
1582
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001583- FAT(File Allocation Table) filesystem write function support:
1584 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001585
1586 Define this to enable support for saving memory data as a
1587 file in FAT formatted partition.
1588
1589 This will also enable the command "fatwrite" enabling the
1590 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001591
Alexander von Gernleredb42db2016-10-07 19:44:14 +02001592- CBFS (Coreboot Filesystem) support:
Gabe Black84cd9322012-10-12 14:26:11 +00001593 CONFIG_CMD_CBFS
1594
1595 Define this to enable support for reading from a Coreboot
1596 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1597 and cbfsload.
1598
Siva Durga Prasad Paladugu4f0d1a22014-05-26 19:18:37 +05301599- FAT(File Allocation Table) filesystem cluster size:
1600 CONFIG_FS_FAT_MAX_CLUSTSIZE
1601
1602 Define the max cluster size for fat operations else
1603 a default value of 65536 will be defined.
1604
wdenkc6097192002-11-03 00:24:07 +00001605- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001606 See Kconfig help for available keyboard drivers.
1607
1608 CONFIG_KEYBOARD
1609
1610 Define this to enable a custom keyboard support.
1611 This simply calls drv_keyboard_init() which must be
1612 defined in your board-specific files. This option is deprecated
1613 and is only used by novena. For new boards, use driver model
1614 instead.
wdenkc6097192002-11-03 00:24:07 +00001615
1616- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001617 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001618 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001619 SOCs that have a DIU should define this macro to enable DIU
1620 support, and should also define these other macros:
1621
1622 CONFIG_SYS_DIU_ADDR
1623 CONFIG_VIDEO
1624 CONFIG_CMD_BMP
1625 CONFIG_CFB_CONSOLE
1626 CONFIG_VIDEO_SW_CURSOR
1627 CONFIG_VGA_AS_SINGLE_DEVICE
1628 CONFIG_VIDEO_LOGO
1629 CONFIG_VIDEO_BMP_LOGO
1630
Timur Tabiba8e76b2011-04-11 14:18:22 -05001631 The DIU driver will look for the 'video-mode' environment
1632 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001633 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001634 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001635
wdenkc6097192002-11-03 00:24:07 +00001636- LCD Support: CONFIG_LCD
1637
1638 Define this to enable LCD support (for output to LCD
1639 display); also select one of the supported displays
1640 by defining one of these:
1641
Stelian Pop39cf4802008-05-09 21:57:18 +02001642 CONFIG_ATMEL_LCD:
1643
1644 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1645
wdenkfd3103b2003-11-25 16:55:19 +00001646 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001647
wdenkfd3103b2003-11-25 16:55:19 +00001648 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001649
wdenkfd3103b2003-11-25 16:55:19 +00001650 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001651
wdenkfd3103b2003-11-25 16:55:19 +00001652 NEC NL6448BC20-08. 6.5", 640x480.
1653 Active, color, single scan.
1654
1655 CONFIG_NEC_NL6448BC33_54
1656
1657 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001658 Active, color, single scan.
1659
1660 CONFIG_SHARP_16x9
1661
1662 Sharp 320x240. Active, color, single scan.
1663 It isn't 16x9, and I am not sure what it is.
1664
1665 CONFIG_SHARP_LQ64D341
1666
1667 Sharp LQ64D341 display, 640x480.
1668 Active, color, single scan.
1669
1670 CONFIG_HLD1045
1671
1672 HLD1045 display, 640x480.
1673 Active, color, single scan.
1674
1675 CONFIG_OPTREX_BW
1676
1677 Optrex CBL50840-2 NF-FW 99 22 M5
1678 or
1679 Hitachi LMG6912RPFC-00T
1680 or
1681 Hitachi SP14Q002
1682
1683 320x240. Black & white.
1684
1685 Normally display is black on white background; define
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001686 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
wdenkc6097192002-11-03 00:24:07 +00001687
Simon Glass676d3192012-10-17 13:24:54 +00001688 CONFIG_LCD_ALIGNMENT
1689
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001690 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001691 defined then the LCD will be aligned to this value instead.
1692 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1693 here, since it is cheaper to change data cache settings on
1694 a per-section basis.
1695
1696
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001697 CONFIG_LCD_ROTATION
1698
1699 Sometimes, for example if the display is mounted in portrait
1700 mode or even if it's mounted landscape but rotated by 180degree,
1701 we need to rotate our content of the display relative to the
1702 framebuffer, so that user can read the messages which are
1703 printed out.
1704 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1705 initialized with a given rotation from "vl_rot" out of
1706 "vidinfo_t" which is provided by the board specific code.
1707 The value for vl_rot is coded as following (matching to
1708 fbcon=rotate:<n> linux-kernel commandline):
1709 0 = no rotation respectively 0 degree
1710 1 = 90 degree rotation
1711 2 = 180 degree rotation
1712 3 = 270 degree rotation
1713
1714 If CONFIG_LCD_ROTATION is not defined, the console will be
1715 initialized with 0degree rotation.
1716
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001717 CONFIG_LCD_BMP_RLE8
1718
1719 Support drawing of RLE8-compressed bitmaps on the LCD.
1720
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001721 CONFIG_I2C_EDID
1722
1723 Enables an 'i2c edid' command which can read EDID
1724 information over I2C from an attached LCD display.
1725
wdenk7152b1d2003-09-05 23:19:14 +00001726- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001727
wdenk8bde7f72003-06-27 21:31:46 +00001728 If this option is set, the environment is checked for
1729 a variable "splashimage". If found, the usual display
1730 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001731 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001732 specified in "splashimage" is loaded instead. The
1733 console is redirected to the "nulldev", too. This
1734 allows for a "silent" boot where a splash screen is
1735 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001736
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001737 CONFIG_SPLASHIMAGE_GUARD
1738
1739 If this option is set, then U-Boot will prevent the environment
1740 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001741 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001742 This option is useful for targets where, due to alignment
1743 restrictions, an improperly aligned BMP image will cause a data
1744 abort. If you think you will not have problems with unaligned
1745 accesses (for example because your toolchain prevents them)
1746 there is no need to set this option.
1747
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001748 CONFIG_SPLASH_SCREEN_ALIGN
1749
1750 If this option is set the splash image can be freely positioned
1751 on the screen. Environment variable "splashpos" specifies the
1752 position as "x,y". If a positive number is given it is used as
1753 number of pixel from left/top. If a negative number is given it
1754 is used as number of pixel from right/bottom. You can also
1755 specify 'm' for centering the image.
1756
1757 Example:
1758 setenv splashpos m,m
1759 => image at center of screen
1760
1761 setenv splashpos 30,20
1762 => image at x = 30 and y = 20
1763
1764 setenv splashpos -10,m
1765 => vertically centered image
1766 at x = dspWidth - bmpWidth - 9
1767
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001768- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1769
1770 If this option is set, additionally to standard BMP
1771 images, gzipped BMP images can be displayed via the
1772 splashscreen support or the bmp command.
1773
Anatolij Gustschind5011762010-03-15 14:50:25 +01001774- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1775
1776 If this option is set, 8-bit RLE compressed BMP images
1777 can be displayed via the splashscreen support or the
1778 bmp command.
1779
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001780- Do compressing for memory range:
Lei Wenf2b96df2012-09-28 04:26:47 +00001781 CONFIG_CMD_ZIP
1782
1783 If this option is set, it would use zlib deflate method
1784 to compress the specified memory at its best effort.
1785
wdenkc29fdfc2003-08-29 20:57:53 +00001786- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001787 CONFIG_GZIP
1788
1789 Enabled by default to support gzip compressed images.
1790
wdenkc29fdfc2003-08-29 20:57:53 +00001791 CONFIG_BZIP2
1792
1793 If this option is set, support for bzip2 compressed
1794 images is included. If not, only uncompressed and gzip
1795 compressed images are supported.
1796
wdenk42d1f032003-10-15 23:53:47 +00001797 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001798 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001799 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001800
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001801 CONFIG_LZMA
1802
1803 If this option is set, support for lzma compressed
1804 images is included.
1805
1806 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1807 requires an amount of dynamic memory that is given by the
1808 formula:
1809
1810 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1811
1812 Where lc and lp stand for, respectively, Literal context bits
1813 and Literal pos bits.
1814
1815 This value is upper-bounded by 14MB in the worst case. Anyway,
1816 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1817 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1818 a very small buffer.
1819
1820 Use the lzmainfo tool to determinate the lc and lp values and
1821 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001822 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001823
Kees Cook8ef70472013-08-16 07:59:12 -07001824 CONFIG_LZO
1825
1826 If this option is set, support for LZO compressed images
1827 is included.
1828
wdenk17ea1172004-06-06 21:51:03 +00001829- MII/PHY support:
1830 CONFIG_PHY_ADDR
1831
1832 The address of PHY on MII bus.
1833
1834 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1835
1836 The clock frequency of the MII bus
1837
1838 CONFIG_PHY_GIGE
1839
1840 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001841 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001842
1843 CONFIG_PHY_RESET_DELAY
1844
1845 Some PHY like Intel LXT971A need extra delay after
1846 reset before any MII register access is possible.
1847 For such PHY, set this option to the usec delay
1848 required. (minimum 300usec for LXT971A)
1849
1850 CONFIG_PHY_CMD_DELAY (ppc4xx)
1851
1852 Some PHY like Intel LXT971A need extra delay after
1853 command issued before MII status register can be read
1854
wdenkc6097192002-11-03 00:24:07 +00001855- IP address:
1856 CONFIG_IPADDR
1857
1858 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001859 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001860 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001861 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001862
1863- Server IP address:
1864 CONFIG_SERVERIP
1865
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001866 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001867 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001868 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001869
Robin Getz97cfe862009-07-21 12:15:28 -04001870 CONFIG_KEEP_SERVERADDR
1871
1872 Keeps the server's MAC address, in the env 'serveraddr'
1873 for passing to bootargs (like Linux's netconsole option)
1874
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001875- Gateway IP address:
1876 CONFIG_GATEWAYIP
1877
1878 Defines a default value for the IP address of the
1879 default router where packets to other networks are
1880 sent to.
1881 (Environment variable "gatewayip")
1882
1883- Subnet mask:
1884 CONFIG_NETMASK
1885
1886 Defines a default value for the subnet mask (or
1887 routing prefix) which is used to determine if an IP
1888 address belongs to the local subnet or needs to be
1889 forwarded through a router.
1890 (Environment variable "netmask")
1891
David Updegraff53a5c422007-06-11 10:41:07 -05001892- Multicast TFTP Mode:
1893 CONFIG_MCAST_TFTP
1894
1895 Defines whether you want to support multicast TFTP as per
1896 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001897 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001898 driver in use must provide a function: mcast() to join/leave a
1899 multicast group.
1900
wdenkc6097192002-11-03 00:24:07 +00001901- BOOTP Recovery Mode:
1902 CONFIG_BOOTP_RANDOM_DELAY
1903
1904 If you have many targets in a network that try to
1905 boot using BOOTP, you may want to avoid that all
1906 systems send out BOOTP requests at precisely the same
1907 moment (which would happen for instance at recovery
1908 from a power failure, when all systems will try to
1909 boot, thus flooding the BOOTP server. Defining
1910 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1911 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001912 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001913
1914 1st BOOTP request: delay 0 ... 1 sec
1915 2nd BOOTP request: delay 0 ... 2 sec
1916 3rd BOOTP request: delay 0 ... 4 sec
1917 4th and following
1918 BOOTP requests: delay 0 ... 8 sec
1919
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001920 CONFIG_BOOTP_ID_CACHE_SIZE
1921
1922 BOOTP packets are uniquely identified using a 32-bit ID. The
1923 server will copy the ID from client requests to responses and
1924 U-Boot will use this to determine if it is the destination of
1925 an incoming response. Some servers will check that addresses
1926 aren't in use before handing them out (usually using an ARP
1927 ping) and therefore take up to a few hundred milliseconds to
1928 respond. Network congestion may also influence the time it
1929 takes for a response to make it back to the client. If that
1930 time is too long, U-Boot will retransmit requests. In order
1931 to allow earlier responses to still be accepted after these
1932 retransmissions, U-Boot's BOOTP client keeps a small cache of
1933 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1934 cache. The default is to keep IDs for up to four outstanding
1935 requests. Increasing this will allow U-Boot to accept offers
1936 from a BOOTP client in networks with unusually high latency.
1937
stroesefe389a82003-08-28 14:17:32 +00001938- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001939 You can fine tune the DHCP functionality by defining
1940 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001941
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001942 CONFIG_BOOTP_SUBNETMASK
1943 CONFIG_BOOTP_GATEWAY
1944 CONFIG_BOOTP_HOSTNAME
1945 CONFIG_BOOTP_NISDOMAIN
1946 CONFIG_BOOTP_BOOTPATH
1947 CONFIG_BOOTP_BOOTFILESIZE
1948 CONFIG_BOOTP_DNS
1949 CONFIG_BOOTP_DNS2
1950 CONFIG_BOOTP_SEND_HOSTNAME
1951 CONFIG_BOOTP_NTPSERVER
1952 CONFIG_BOOTP_TIMEOFFSET
1953 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001954 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001955
Wilson Callan5d110f02007-07-28 10:56:13 -04001956 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1957 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001958
Joe Hershberger2c00e092012-05-23 07:59:19 +00001959 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1960 after the configured retry count, the call will fail
1961 instead of starting over. This can be used to fail over
1962 to Link-local IP address configuration if the DHCP server
1963 is not available.
1964
stroesefe389a82003-08-28 14:17:32 +00001965 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1966 serverip from a DHCP server, it is possible that more
1967 than one DNS serverip is offered to the client.
1968 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1969 serverip will be stored in the additional environment
1970 variable "dnsip2". The first DNS serverip is always
1971 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001972 is defined.
stroesefe389a82003-08-28 14:17:32 +00001973
1974 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1975 to do a dynamic update of a DNS server. To do this, they
1976 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001977 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001978 of the "hostname" environment variable is passed as
1979 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001980
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001981 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1982
1983 A 32bit value in microseconds for a delay between
1984 receiving a "DHCP Offer" and sending the "DHCP Request".
1985 This fixes a problem with certain DHCP servers that don't
1986 respond 100% of the time to a "DHCP request". E.g. On an
1987 AT91RM9200 processor running at 180MHz, this delay needed
1988 to be *at least* 15,000 usec before a Windows Server 2003
1989 DHCP server would reply 100% of the time. I recommend at
1990 least 50,000 usec to be safe. The alternative is to hope
1991 that one of the retries will be successful but note that
1992 the DHCP timeout and retry process takes a longer than
1993 this delay.
1994
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001995 - Link-local IP address negotiation:
1996 Negotiate with other link-local clients on the local network
1997 for an address that doesn't require explicit configuration.
1998 This is especially useful if a DHCP server cannot be guaranteed
1999 to exist in all environments that the device must operate.
2000
2001 See doc/README.link-local for more information.
2002
wdenka3d991b2004-04-15 21:48:45 +00002003 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00002004 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00002005
2006 The device id used in CDP trigger frames.
2007
2008 CONFIG_CDP_DEVICE_ID_PREFIX
2009
2010 A two character string which is prefixed to the MAC address
2011 of the device.
2012
2013 CONFIG_CDP_PORT_ID
2014
2015 A printf format string which contains the ascii name of
2016 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002017 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00002018
2019 CONFIG_CDP_CAPABILITIES
2020
2021 A 32bit integer which indicates the device capabilities;
2022 0x00000010 for a normal host which does not forwards.
2023
2024 CONFIG_CDP_VERSION
2025
2026 An ascii string containing the version of the software.
2027
2028 CONFIG_CDP_PLATFORM
2029
2030 An ascii string containing the name of the platform.
2031
2032 CONFIG_CDP_TRIGGER
2033
2034 A 32bit integer sent on the trigger.
2035
2036 CONFIG_CDP_POWER_CONSUMPTION
2037
2038 A 16bit integer containing the power consumption of the
2039 device in .1 of milliwatts.
2040
2041 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2042
2043 A byte containing the id of the VLAN.
2044
wdenkc6097192002-11-03 00:24:07 +00002045- Status LED: CONFIG_STATUS_LED
2046
2047 Several configurations allow to display the current
2048 status using a LED. For instance, the LED will blink
2049 fast while running U-Boot code, stop blinking as
2050 soon as a reply to a BOOTP request was received, and
2051 start blinking slow once the Linux kernel is running
2052 (supported by a status LED driver in the Linux
2053 kernel). Defining CONFIG_STATUS_LED enables this
2054 feature in U-Boot.
2055
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002056 Additional options:
2057
2058 CONFIG_GPIO_LED
2059 The status LED can be connected to a GPIO pin.
2060 In such cases, the gpio_led driver can be used as a
2061 status LED backend implementation. Define CONFIG_GPIO_LED
2062 to include the gpio_led driver in the U-Boot binary.
2063
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002064 CONFIG_GPIO_LED_INVERTED_TABLE
2065 Some GPIO connected LEDs may have inverted polarity in which
2066 case the GPIO high value corresponds to LED off state and
2067 GPIO low value corresponds to LED on state.
2068 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2069 with a list of GPIO LEDs that have inverted polarity.
2070
wdenkc6097192002-11-03 00:24:07 +00002071- CAN Support: CONFIG_CAN_DRIVER
2072
2073 Defining CONFIG_CAN_DRIVER enables CAN driver support
2074 on those systems that support this (optional)
2075 feature, like the TQM8xxL modules.
2076
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002077- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002078
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002079 This enable the NEW i2c subsystem, and will allow you to use
2080 i2c commands at the u-boot command line (as long as you set
2081 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2082 based realtime clock chips or other i2c devices. See
2083 common/cmd_i2c.c for a description of the command line
2084 interface.
2085
2086 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002087 - drivers/i2c/soft_i2c.c:
2088 - activate first bus with CONFIG_SYS_I2C_SOFT define
2089 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2090 for defining speed and slave address
2091 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2092 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2093 for defining speed and slave address
2094 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2095 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2096 for defining speed and slave address
2097 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2098 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2099 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002100
Heiko Schocher00f792e2012-10-24 13:48:22 +02002101 - drivers/i2c/fsl_i2c.c:
2102 - activate i2c driver with CONFIG_SYS_I2C_FSL
2103 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2104 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2105 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2106 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002107 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002108 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2109 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2110 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2111 second bus.
2112
Simon Glass1f2ba722012-10-30 07:28:53 +00002113 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002114 - activate this driver with CONFIG_SYS_I2C_TEGRA
2115 - This driver adds 4 i2c buses with a fix speed from
2116 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002117
Dirk Eibach880540d2013-04-25 02:40:01 +00002118 - drivers/i2c/ppc4xx_i2c.c
2119 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2120 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2121 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2122
tremfac96402013-09-21 18:13:35 +02002123 - drivers/i2c/i2c_mxc.c
2124 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002125 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
2126 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
2127 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
2128 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02002129 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2130 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2131 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2132 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2133 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2134 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002135 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
2136 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002137 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02002138 for speed, and 0 for slave.
2139
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002140 - drivers/i2c/rcar_i2c.c:
2141 - activate this driver with CONFIG_SYS_I2C_RCAR
2142 - This driver adds 4 i2c buses
2143
2144 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2145 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2146 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2147 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2148 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2149 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2150 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2151 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2152 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2153
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002154 - drivers/i2c/sh_i2c.c:
2155 - activate this driver with CONFIG_SYS_I2C_SH
2156 - This driver adds from 2 to 5 i2c buses
2157
2158 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2159 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2160 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2161 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2162 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2163 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2164 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2165 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2166 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2167 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002168 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002169
Heiko Schocher6789e842013-10-22 11:03:18 +02002170 - drivers/i2c/omap24xx_i2c.c
2171 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2172 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2173 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2174 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2175 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2176 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2177 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2178 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2179 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2180 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2181 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2182
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002183 - drivers/i2c/zynq_i2c.c
2184 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2185 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2186 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2187
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302188 - drivers/i2c/s3c24x0_i2c.c:
2189 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2190 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2191 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2192 with a fix speed from 100000 and the slave addr 0!
2193
Dirk Eibachb46226b2014-07-03 09:28:18 +02002194 - drivers/i2c/ihs_i2c.c
2195 - activate this driver with CONFIG_SYS_I2C_IHS
2196 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2197 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2198 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2199 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2200 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2201 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2202 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2203 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2204 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2205 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2206 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2207 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01002208 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
2209 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
2210 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
2211 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
2212 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
2213 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
2214 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
2215 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
2216 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02002217
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002218 additional defines:
2219
2220 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06002221 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002222
2223 CONFIG_SYS_I2C_DIRECT_BUS
2224 define this, if you don't use i2c muxes on your hardware.
2225 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2226 omit this define.
2227
2228 CONFIG_SYS_I2C_MAX_HOPS
2229 define how many muxes are maximal consecutively connected
2230 on one i2c bus. If you not use i2c muxes, omit this
2231 define.
2232
2233 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002234 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002235 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2236 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2237 CONFIG_SYS_NUM_I2C_BUSES = 9:
2238
2239 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2240 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2241 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2242 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2243 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2244 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2245 {1, {I2C_NULL_HOP}}, \
2246 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2247 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2248 }
2249
2250 which defines
2251 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002252 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2253 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2254 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2255 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2256 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002257 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002258 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2259 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002260
2261 If you do not have i2c muxes on your board, omit this define.
2262
Heiko Schocherea818db2013-01-29 08:53:15 +01002263- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002264
2265 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2266 provides the following compelling advantages:
2267
2268 - more than one i2c adapter is usable
2269 - approved multibus support
2270 - better i2c mux support
2271
2272 ** Please consider updating your I2C driver now. **
2273
Heiko Schocherea818db2013-01-29 08:53:15 +01002274 These enable legacy I2C serial bus commands. Defining
2275 CONFIG_HARD_I2C will include the appropriate I2C driver
2276 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002277
wdenk945af8d2003-07-16 21:53:01 +00002278 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002279 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002280 CONFIG_COMMANDS) and communicate with i2c based realtime
2281 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002282 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002283
Ben Warrenbb99ad62006-09-07 16:50:54 -04002284 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002285
wdenk945af8d2003-07-16 21:53:01 +00002286 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002287 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002288
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002289 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002290 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002291 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002292 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002293
Peter Tyser8d321b82010-04-12 22:28:21 -05002294 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002295 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002296 and so its address should therefore be cleared to 0 (See,
2297 eg, MPC823e User's Manual p.16-473). So, set
2298 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002299
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002300 CONFIG_SYS_I2C_INIT_MPC5XXX
2301
2302 When a board is reset during an i2c bus transfer
2303 chips might think that the current transfer is still
2304 in progress. Reset the slave devices by sending start
2305 commands until the slave device responds.
2306
wdenk945af8d2003-07-16 21:53:01 +00002307 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002308
Heiko Schocherea818db2013-01-29 08:53:15 +01002309 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002310 then the following macros need to be defined (examples are
2311 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002312
2313 I2C_INIT
2314
wdenkb37c7e52003-06-30 16:24:52 +00002315 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002316 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002317
wdenkba56f622004-02-06 23:19:44 +00002318 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002319
wdenkc6097192002-11-03 00:24:07 +00002320 I2C_PORT
2321
wdenk43d96162003-03-06 00:02:04 +00002322 (Only for MPC8260 CPU). The I/O port to use (the code
2323 assumes both bits are on the same port). Valid values
2324 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002325
2326 I2C_ACTIVE
2327
2328 The code necessary to make the I2C data line active
2329 (driven). If the data line is open collector, this
2330 define can be null.
2331
wdenkb37c7e52003-06-30 16:24:52 +00002332 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2333
wdenkc6097192002-11-03 00:24:07 +00002334 I2C_TRISTATE
2335
2336 The code necessary to make the I2C data line tri-stated
2337 (inactive). If the data line is open collector, this
2338 define can be null.
2339
wdenkb37c7e52003-06-30 16:24:52 +00002340 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2341
wdenkc6097192002-11-03 00:24:07 +00002342 I2C_READ
2343
York Sun472d5462013-04-01 11:29:11 -07002344 Code that returns true if the I2C data line is high,
2345 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002346
wdenkb37c7e52003-06-30 16:24:52 +00002347 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2348
wdenkc6097192002-11-03 00:24:07 +00002349 I2C_SDA(bit)
2350
York Sun472d5462013-04-01 11:29:11 -07002351 If <bit> is true, sets the I2C data line high. If it
2352 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002353
wdenkb37c7e52003-06-30 16:24:52 +00002354 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002355 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002356 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002357
wdenkc6097192002-11-03 00:24:07 +00002358 I2C_SCL(bit)
2359
York Sun472d5462013-04-01 11:29:11 -07002360 If <bit> is true, sets the I2C clock line high. If it
2361 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002362
wdenkb37c7e52003-06-30 16:24:52 +00002363 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002364 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002365 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002366
wdenkc6097192002-11-03 00:24:07 +00002367 I2C_DELAY
2368
2369 This delay is invoked four times per clock cycle so this
2370 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002371 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002372 like:
2373
wdenkb37c7e52003-06-30 16:24:52 +00002374 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00002375
Mike Frysinger793b5722010-07-21 13:38:02 -04002376 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2377
2378 If your arch supports the generic GPIO framework (asm/gpio.h),
2379 then you may alternatively define the two GPIOs that are to be
2380 used as SCL / SDA. Any of the previous I2C_xxx macros will
2381 have GPIO-based defaults assigned to them as appropriate.
2382
2383 You should define these to the GPIO value as given directly to
2384 the generic GPIO functions.
2385
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002386 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00002387
wdenk8bde7f72003-06-27 21:31:46 +00002388 When a board is reset during an i2c bus transfer
2389 chips might think that the current transfer is still
2390 in progress. On some boards it is possible to access
2391 the i2c SCLK line directly, either by using the
2392 processor pin as a GPIO or by having a second pin
2393 connected to the bus. If this option is defined a
2394 custom i2c_init_board() routine in boards/xxx/board.c
2395 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00002396
Richard Retanubun26a33502010-04-12 15:08:17 -04002397 CONFIG_SYS_I2C_BOARD_LATE_INIT
2398
2399 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2400 defined a custom i2c_board_late_init() routine in
2401 boards/xxx/board.c is run AFTER the operations in i2c_init()
2402 is completed. This callpoint can be used to unreset i2c bus
2403 using CPU i2c controller register accesses for CPUs whose i2c
2404 controller provide such a method. It is called at the end of
2405 i2c_init() to allow i2c_init operations to setup the i2c bus
2406 controller on the CPU (e.g. setting bus speed & slave address).
2407
wdenk17ea1172004-06-06 21:51:03 +00002408 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2409
2410 This option enables configuration of bi_iic_fast[] flags
2411 in u-boot bd_info structure based on u-boot environment
2412 variable "i2cfast". (see also i2cfast)
2413
Ben Warrenbb99ad62006-09-07 16:50:54 -04002414 CONFIG_I2C_MULTI_BUS
2415
2416 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002417 must have a controller. At any point in time, only one bus is
2418 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04002419 Note that bus numbering is zero-based.
2420
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002421 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04002422
2423 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002424 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05002425 is set, specify a list of bus-device pairs. Otherwise, specify
2426 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04002427
2428 e.g.
2429 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002430 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002431
2432 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2433
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002434 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06002435 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002436
2437 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2438
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002439 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06002440
2441 If defined, then this indicates the I2C bus number for DDR SPD.
2442 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2443
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002444 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002445
2446 If defined, then this indicates the I2C bus number for the RTC.
2447 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2448
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002449 CONFIG_SYS_DTT_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002450
2451 If defined, then this indicates the I2C bus number for the DTT.
2452 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2453
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002454 CONFIG_SYS_I2C_DTT_ADDR:
Victor Gallardo<