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wdenka17d0ff2002-10-11 11:25:54 +00001/*
2 * (C) Copyright 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/* #define DEBUG */
25
26#include <common.h>
27#include <mpc8xx.h>
28
29#if defined(CFG_ENV_IS_IN_FLASH)
30# ifndef CFG_ENV_ADDR
31# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
32# endif
33# ifndef CFG_ENV_SIZE
34# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
35# endif
36# ifndef CFG_ENV_SECT_SIZE
37# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
38# endif
39#endif
40
41/*---------------------------------------------------------------------*/
42
43flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
44
45/*-----------------------------------------------------------------------
46 * Functions
47 */
48static ulong flash_get_size (vu_long *addr, flash_info_t *info);
49static int write_data (flash_info_t *info, ulong dest, ulong data);
50static void flash_get_offsets (ulong base, flash_info_t *info);
51
52/*-----------------------------------------------------------------------
53 */
54
55unsigned long flash_init (void)
56{
57 volatile immap_t *immap = (immap_t *)CFG_IMMR;
58 volatile memctl8xx_t *memctl = &immap->im_memctl;
59 unsigned long size_b0, size_b1;
60 int i;
61
62 /* Init: no FLASHes known */
63 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
64 flash_info[i].flash_id = FLASH_UNKNOWN;
65 }
66
67 /* Static FLASH Bank configuration here - FIXME XXX */
68
69 debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
70
71 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
72
73 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
74 printf ("## Unknown FLASH on Bank 0: "
75 "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
76 flash_info[0].flash_id,
77 size_b0, size_b0<<20);
78 }
79
80 debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
81
82 size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
83
84 debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
85
86 if (size_b1 > size_b0) {
87 printf ("## ERROR: "
88 "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
89 size_b1, size_b1<<20,
90 size_b0, size_b0<<20
91 );
92 flash_info[0].flash_id = FLASH_UNKNOWN;
93 flash_info[1].flash_id = FLASH_UNKNOWN;
94 flash_info[0].sector_count = -1;
95 flash_info[1].sector_count = -1;
96 flash_info[0].size = 0;
97 flash_info[1].size = 0;
98 return (0);
99 }
100
101 debug ("## Before remap: "
102 "BR0: 0x%08x OR0: 0x%08x "
103 "BR1: 0x%08x OR1: 0x%08x\n",
104 memctl->memc_br0, memctl->memc_or0,
105 memctl->memc_br1, memctl->memc_or1);
106
107 /* Remap FLASH according to real size */
108 memctl->memc_or0 = (-size_b0 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
109 OR_CSNT_SAM | OR_ACS_DIV1;
110 memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_V;
111
112 debug ("## BR0: 0x%08x OR0: 0x%08x\n",
113 memctl->memc_br0, memctl->memc_or0);
114
115 /* Re-do sizing to get full correct info */
116 size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
117
118 flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
119
120 flash_info[0].size = size_b0;
121
122#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
123 /* monitor protection ON by default */
124 flash_protect(FLAG_PROTECT_SET,
125 CFG_MONITOR_BASE,
wdenk3b57fe02003-05-30 12:48:29 +0000126 CFG_MONITOR_BASE+monitor_flash_len-1,
wdenka17d0ff2002-10-11 11:25:54 +0000127 &flash_info[0]);
128#endif
129
130#ifdef CFG_ENV_IS_IN_FLASH
131 /* ENV protection ON by default */
132 flash_protect(FLAG_PROTECT_SET,
133 CFG_ENV_ADDR,
134 CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
135 &flash_info[0]);
136#endif
137
138 if (size_b1) {
139 memctl->memc_or1 = (-size_b1 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
140 OR_CSNT_SAM | OR_ACS_DIV1;
141 memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
142 BR_PS_32 | BR_V;
143
144 debug ("## BR1: 0x%08x OR1: 0x%08x\n",
145 memctl->memc_br1, memctl->memc_or1);
146
147 /* Re-do sizing to get full correct info */
148 size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
149 &flash_info[1]);
150
151 flash_info[1].size = size_b1;
152
153 flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
154
155#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
156 /* monitor protection ON by default */
157 flash_protect(FLAG_PROTECT_SET,
158 CFG_MONITOR_BASE,
wdenk3b57fe02003-05-30 12:48:29 +0000159 CFG_MONITOR_BASE+monitor_flash_len-1,
wdenka17d0ff2002-10-11 11:25:54 +0000160 &flash_info[1]);
161#endif
162
163#ifdef CFG_ENV_IS_IN_FLASH
164 /* ENV protection ON by default */
165 flash_protect(FLAG_PROTECT_SET,
166 CFG_ENV_ADDR,
167 CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
168 &flash_info[1]);
169#endif
170 } else {
171 memctl->memc_br1 = 0; /* invalidate bank */
172 memctl->memc_or1 = 0; /* invalidate bank */
173
174 debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
175 memctl->memc_br1, memctl->memc_or1);
176
177 flash_info[1].flash_id = FLASH_UNKNOWN;
178 flash_info[1].sector_count = -1;
179 flash_info[1].size = 0;
180 }
181
182 debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
183
184 return (size_b0 + size_b1);
185}
186
187/*-----------------------------------------------------------------------
188 */
189static void flash_get_offsets (ulong base, flash_info_t *info)
190{
191 int i;
192
193 if (info->flash_id == FLASH_UNKNOWN) {
194 return;
195 }
196
197 switch (info->flash_id & FLASH_VENDMASK) {
198 case FLASH_MAN_INTEL:
199 for (i = 0; i < info->sector_count; i++) {
200 info->start[i] = base;
201 base += 0x00020000 * 2; /* 128k * 2 chips per bank */
202 }
203 return;
204
205 default:
206 printf ("Don't know sector ofsets for flash type 0x%lx\n",
207 info->flash_id);
208 return;
209 }
210}
211
212/*-----------------------------------------------------------------------
213 */
214void flash_print_info (flash_info_t *info)
215{
216 int i;
217
218 if (info->flash_id == FLASH_UNKNOWN) {
219 printf ("missing or unknown FLASH type\n");
220 return;
221 }
222
223 switch (info->flash_id & FLASH_VENDMASK) {
224 case FLASH_MAN_AMD: printf ("AMD "); break;
225 case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
226 case FLASH_MAN_SST: printf ("SST "); break;
227 case FLASH_MAN_STM: printf ("STM "); break;
228 case FLASH_MAN_INTEL: printf ("Intel "); break;
229 case FLASH_MAN_MT: printf ("MT "); break;
230 default: printf ("Unknown Vendor "); break;
231 }
232
233 switch (info->flash_id & FLASH_TYPEMASK) {
234 case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
235 break;
236 case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
237 break;
238 case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
239 break;
240 default: printf ("Unknown Chip Type\n");
241 break;
242 }
243
244 if (info->size >= (1 << 20)) {
245 i = 20;
246 } else {
247 i = 10;
248 }
249 printf (" Size: %ld %cB in %d Sectors\n",
250 info->size >> i,
251 (i == 20) ? 'M' : 'k',
252 info->sector_count);
253
254 printf (" Sector Start Addresses:");
255 for (i=0; i<info->sector_count; ++i) {
256 if ((i % 5) == 0)
257 printf ("\n ");
258 printf (" %08lX%s",
259 info->start[i],
260 info->protect[i] ? " (RO)" : " "
261 );
262 }
263 printf ("\n");
264 return;
265}
266
267/*-----------------------------------------------------------------------
268 */
269
270
271/*-----------------------------------------------------------------------
272 */
273
274/*
275 * The following code cannot be run from FLASH!
276 */
277
278static ulong flash_get_size (vu_long *addr, flash_info_t *info)
279{
280 ulong value;
281
282 /* Read Manufacturer ID */
283 addr[0] = 0x00900090;
284 value = addr[0];
285
286 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
287
288 switch (value) {
289 case AMD_MANUFACT:
290 info->flash_id = FLASH_MAN_AMD;
291 break;
292 case FUJ_MANUFACT:
293 info->flash_id = FLASH_MAN_FUJ;
294 break;
295 case SST_MANUFACT:
296 info->flash_id = FLASH_MAN_SST;
297 break;
298 case STM_MANUFACT:
299 info->flash_id = FLASH_MAN_STM;
300 break;
301 case INTEL_MANUFACT:
302 info->flash_id = FLASH_MAN_INTEL;
303 break;
304 default:
305 info->flash_id = FLASH_UNKNOWN;
306 info->sector_count = 0;
307 info->size = 0;
308 addr[0] = 0x00FF00FF; /* restore read mode */
309 return (0); /* no or unknown flash */
310 }
311
312 value = addr[1]; /* device ID */
313
314 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
315
316 switch (value) {
317 case INTEL_ID_28F320J3A:
318 info->flash_id += FLASH_28F320J3A;
319 info->sector_count = 32;
320 info->size = 0x00400000 * 2;
321 break; /* => 8 MB */
322
323 case INTEL_ID_28F640J3A:
324 info->flash_id += FLASH_28F640J3A;
325 info->sector_count = 64;
326 info->size = 0x00800000 * 2;
327 break; /* => 16 MB */
328
329 case INTEL_ID_28F128J3A:
330 info->flash_id += FLASH_28F128J3A;
331 info->sector_count = 128;
332 info->size = 0x01000000 * 2;
333 break; /* => 32 MB */
334
335 default:
336 info->flash_id = FLASH_UNKNOWN;
337 addr[0] = 0x00FF00FF; /* restore read mode */
338 return (0); /* => no or unknown flash */
339
340 }
341
342 if (info->sector_count > CFG_MAX_FLASH_SECT) {
343 printf ("** ERROR: sector count %d > max (%d) **\n",
344 info->sector_count, CFG_MAX_FLASH_SECT);
345 info->sector_count = CFG_MAX_FLASH_SECT;
346 }
347
348 addr[0] = 0x00FF00FF; /* restore read mode */
349
350 return (info->size);
351}
352
353
354/*-----------------------------------------------------------------------
355 */
356
357int flash_erase (flash_info_t *info, int s_first, int s_last)
358{
359 int flag, prot, sect;
360 ulong start, now, last;
361
362 debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
363
364 if ((s_first < 0) || (s_first > s_last)) {
365 if (info->flash_id == FLASH_UNKNOWN) {
366 printf ("- missing\n");
367 } else {
368 printf ("- no sectors to erase\n");
369 }
370 return 1;
371 }
372
373 if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
374 printf ("Can erase only Intel flash types - aborted\n");
375 return 1;
376 }
377
378 prot = 0;
379 for (sect=s_first; sect<=s_last; ++sect) {
380 if (info->protect[sect]) {
381 prot++;
382 }
383 }
384
385 if (prot) {
386 printf ("- Warning: %d protected sectors will not be erased!\n",
387 prot);
388 } else {
389 printf ("\n");
390 }
391
392 start = get_timer (0);
393 last = start;
394 /* Start erase on unprotected sectors */
395 for (sect = s_first; sect<=s_last; sect++) {
396 if (info->protect[sect] == 0) { /* not protected */
397 vu_long *addr = (vu_long *)(info->start[sect]);
398 unsigned long status;
399
400 /* Disable interrupts which might cause a timeout here */
401 flag = disable_interrupts();
402
403 *addr = 0x00500050; /* clear status register */
404 *addr = 0x00200020; /* erase setup */
405 *addr = 0x00D000D0; /* erase confirm */
406
407 /* re-enable interrupts if necessary */
408 if (flag)
409 enable_interrupts();
410
411 /* wait at least 80us - let's wait 1 ms */
412 udelay (1000);
413
414 while (((status = *addr) & 0x00800080) != 0x00800080) {
415 if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
416 printf ("Timeout\n");
417 *addr = 0x00B000B0; /* suspend erase */
418 *addr = 0x00FF00FF; /* reset to read mode */
419 return 1;
420 }
421
422 /* show that we're waiting */
423 if ((now - last) > 1000) { /* every second */
424 putc ('.');
425 last = now;
426 }
427 }
428
429 *addr = 0x00FF00FF; /* reset to read mode */
430 }
431 }
432 printf (" done\n");
433 return 0;
434}
435
436/*-----------------------------------------------------------------------
437 * Copy memory to flash, returns:
438 * 0 - OK
439 * 1 - write timeout
440 * 2 - Flash not erased
441 * 4 - Flash not identified
442 */
443
444#define FLASH_WIDTH 4 /* flash bus width in bytes */
445
446int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
447{
448 ulong cp, wp, data;
449 int i, l, rc;
450
451 if (info->flash_id == FLASH_UNKNOWN) {
452 return 4;
453 }
454
455 wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
456
457 /*
458 * handle unaligned start bytes
459 */
460 if ((l = addr - wp) != 0) {
461 data = 0;
462 for (i=0, cp=wp; i<l; ++i, ++cp) {
463 data = (data << 8) | (*(uchar *)cp);
464 }
465 for (; i<FLASH_WIDTH && cnt>0; ++i) {
466 data = (data << 8) | *src++;
467 --cnt;
468 ++cp;
469 }
470 for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
471 data = (data << 8) | (*(uchar *)cp);
472 }
473
474 if ((rc = write_data(info, wp, data)) != 0) {
475 return (rc);
476 }
477 wp += FLASH_WIDTH;
478 }
479
480 /*
481 * handle FLASH_WIDTH aligned part
482 */
483 while (cnt >= FLASH_WIDTH) {
484 data = 0;
485 for (i=0; i<FLASH_WIDTH; ++i) {
486 data = (data << 8) | *src++;
487 }
488 if ((rc = write_data(info, wp, data)) != 0) {
489 return (rc);
490 }
491 wp += FLASH_WIDTH;
492 cnt -= FLASH_WIDTH;
493 }
494
495 if (cnt == 0) {
496 return (0);
497 }
498
499 /*
500 * handle unaligned tail bytes
501 */
502 data = 0;
503 for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
504 data = (data << 8) | *src++;
505 --cnt;
506 }
507 for (; i<FLASH_WIDTH; ++i, ++cp) {
508 data = (data << 8) | (*(uchar *)cp);
509 }
510
511 return (write_data(info, wp, data));
512}
513
514/*-----------------------------------------------------------------------
515 * Write a word to Flash, returns:
516 * 0 - OK
517 * 1 - write timeout
518 * 2 - Flash not erased
519 */
520static int write_data (flash_info_t *info, ulong dest, ulong data)
521{
522 vu_long *addr = (vu_long *)dest;
523 ulong status;
524 ulong start;
525 int flag;
526
527 /* Check if Flash is (sufficiently) erased */
528 if ((*addr & data) != data) {
529 return (2);
530 }
531 /* Disable interrupts which might cause a timeout here */
532 flag = disable_interrupts();
533
534 *addr = 0x00400040; /* write setup */
535 *addr = data;
536
537 /* re-enable interrupts if necessary */
538 if (flag)
539 enable_interrupts();
540
541 start = get_timer (0);
542
543 while (((status = *addr) & 0x00800080) != 0x00800080) {
544 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
545 *addr = 0x00FF00FF; /* restore read mode */
546 return (1);
547 }
548 }
549
550 *addr = 0x00FF00FF; /* restore read mode */
551
552 return (0);
553}
554
555/*-----------------------------------------------------------------------
556 */