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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Joachim Foerster03d67e12011-10-21 15:48:50 +02002/*
Thomas Chou88d5ecf2015-10-21 21:33:45 +08003 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Joachim Foerster03d67e12011-10-21 15:48:50 +02004 * Copyright (C) 2011 Missing Link Electronics
5 * Joachim Foerster <joachim@missinglinkelectronics.com>
Joachim Foerster03d67e12011-10-21 15:48:50 +02006 */
7#include <common.h>
Thomas Chou88d5ecf2015-10-21 21:33:45 +08008#include <dm.h>
9#include <errno.h>
10#include <malloc.h>
11#include <fdtdec.h>
Joachim Foerster03d67e12011-10-21 15:48:50 +020012#include <asm/io.h>
13#include <asm/gpio.h>
14
Thomas Chou88d5ecf2015-10-21 21:33:45 +080015DECLARE_GLOBAL_DATA_PTR;
Joachim Foerster03d67e12011-10-21 15:48:50 +020016
Thomas Chou88d5ecf2015-10-21 21:33:45 +080017struct altera_pio_regs {
18 u32 data; /* Data register */
19 u32 direction; /* Direction register */
20};
Joachim Foerster03d67e12011-10-21 15:48:50 +020021
Thomas Chou88d5ecf2015-10-21 21:33:45 +080022struct altera_pio_platdata {
23 struct altera_pio_regs *regs;
24 int gpio_count;
25 const char *bank_name;
26};
Joachim Foerster03d67e12011-10-21 15:48:50 +020027
Thomas Chou88d5ecf2015-10-21 21:33:45 +080028static int altera_pio_direction_input(struct udevice *dev, unsigned pin)
Joachim Foerster03d67e12011-10-21 15:48:50 +020029{
Thomas Chou88d5ecf2015-10-21 21:33:45 +080030 struct altera_pio_platdata *plat = dev_get_platdata(dev);
31 struct altera_pio_regs *const regs = plat->regs;
Joachim Foerster03d67e12011-10-21 15:48:50 +020032
Thomas Chou88d5ecf2015-10-21 21:33:45 +080033 clrbits_le32(&regs->direction, 1 << pin);
Joachim Foerster03d67e12011-10-21 15:48:50 +020034
Joachim Foerster03d67e12011-10-21 15:48:50 +020035 return 0;
36}
37
Thomas Chou88d5ecf2015-10-21 21:33:45 +080038static int altera_pio_direction_output(struct udevice *dev, unsigned pin,
39 int val)
Joachim Foerster03d67e12011-10-21 15:48:50 +020040{
Thomas Chou88d5ecf2015-10-21 21:33:45 +080041 struct altera_pio_platdata *plat = dev_get_platdata(dev);
42 struct altera_pio_regs *const regs = plat->regs;
Joachim Foerster03d67e12011-10-21 15:48:50 +020043
Thomas Chou88d5ecf2015-10-21 21:33:45 +080044 if (val)
45 setbits_le32(&regs->data, 1 << pin);
Joachim Foerster03d67e12011-10-21 15:48:50 +020046 else
Thomas Chou88d5ecf2015-10-21 21:33:45 +080047 clrbits_le32(&regs->data, 1 << pin);
48 /* change the data first, then the direction. to avoid glitch */
49 setbits_le32(&regs->direction, 1 << pin);
50
Joachim Foerster03d67e12011-10-21 15:48:50 +020051 return 0;
52}
53
Thomas Chou88d5ecf2015-10-21 21:33:45 +080054static int altera_pio_get_value(struct udevice *dev, unsigned pin)
Joachim Foerster03d67e12011-10-21 15:48:50 +020055{
Thomas Chou88d5ecf2015-10-21 21:33:45 +080056 struct altera_pio_platdata *plat = dev_get_platdata(dev);
57 struct altera_pio_regs *const regs = plat->regs;
Joachim Foerster03d67e12011-10-21 15:48:50 +020058
Thomas Chou88d5ecf2015-10-21 21:33:45 +080059 return readl(&regs->data) & (1 << pin);
Joachim Foerster03d67e12011-10-21 15:48:50 +020060}
61
Thomas Chou88d5ecf2015-10-21 21:33:45 +080062
63static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)
Joachim Foerster03d67e12011-10-21 15:48:50 +020064{
Thomas Chou88d5ecf2015-10-21 21:33:45 +080065 struct altera_pio_platdata *plat = dev_get_platdata(dev);
66 struct altera_pio_regs *const regs = plat->regs;
Joachim Foerster03d67e12011-10-21 15:48:50 +020067
Thomas Chou88d5ecf2015-10-21 21:33:45 +080068 if (val)
69 setbits_le32(&regs->data, 1 << pin);
Joachim Foerster03d67e12011-10-21 15:48:50 +020070 else
Thomas Chou88d5ecf2015-10-21 21:33:45 +080071 clrbits_le32(&regs->data, 1 << pin);
Joachim Foerster03d67e12011-10-21 15:48:50 +020072
Joachim Foerster03d67e12011-10-21 15:48:50 +020073 return 0;
74}
Thomas Chou88d5ecf2015-10-21 21:33:45 +080075
76static int altera_pio_probe(struct udevice *dev)
77{
78 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
79 struct altera_pio_platdata *plat = dev_get_platdata(dev);
80
81 uc_priv->gpio_count = plat->gpio_count;
82 uc_priv->bank_name = plat->bank_name;
83
84 return 0;
85}
86
87static int altera_pio_ofdata_to_platdata(struct udevice *dev)
88{
89 struct altera_pio_platdata *plat = dev_get_platdata(dev);
90
Simon Glassa821c4a2017-05-17 17:18:05 -060091 plat->regs = map_physmem(devfdt_get_addr(dev),
Thomas Chou079bfc52015-11-14 11:26:51 +080092 sizeof(struct altera_pio_regs),
93 MAP_NOCACHE);
Simon Glasse160f7d2017-01-17 16:52:55 -070094 plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
Thomas Chou88d5ecf2015-10-21 21:33:45 +080095 "altr,gpio-bank-width", 32);
Simon Glasse160f7d2017-01-17 16:52:55 -070096 plat->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
Thomas Chou88d5ecf2015-10-21 21:33:45 +080097 "gpio-bank-name", NULL);
98
99 return 0;
100}
101
102static const struct dm_gpio_ops altera_pio_ops = {
103 .direction_input = altera_pio_direction_input,
104 .direction_output = altera_pio_direction_output,
105 .get_value = altera_pio_get_value,
106 .set_value = altera_pio_set_value,
107};
108
109static const struct udevice_id altera_pio_ids[] = {
110 { .compatible = "altr,pio-1.0" },
111 { }
112};
113
114U_BOOT_DRIVER(altera_pio) = {
115 .name = "altera_pio",
116 .id = UCLASS_GPIO,
117 .of_match = altera_pio_ids,
118 .ops = &altera_pio_ops,
119 .ofdata_to_platdata = altera_pio_ofdata_to_platdata,
120 .platdata_auto_alloc_size = sizeof(struct altera_pio_platdata),
121 .probe = altera_pio_probe,
122};