wdenk | d4326ac | 2004-04-18 21:17:30 +0000 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * |
| 3 | * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" |
| 4 | * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND |
| 5 | * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, |
| 6 | * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, |
| 7 | * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION |
| 8 | * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, |
| 9 | * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE |
| 10 | * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY |
| 11 | * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE |
| 12 | * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR |
| 13 | * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF |
| 14 | * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 15 | * FOR A PARTICULAR PURPOSE. |
| 16 | * |
| 17 | * (c) Copyright 2002 Xilinx Inc. |
| 18 | * All rights reserved. |
| 19 | * |
| 20 | *****************************************************************************/ |
| 21 | /****************************************************************************/ |
| 22 | /** |
| 23 | * |
| 24 | * @file xuartlite_l.h |
| 25 | * |
| 26 | * This header file contains identifiers and low-level driver functions (or |
| 27 | * macros) that can be used to access the device. High-level driver functions |
| 28 | * are defined in xuartlite.h. |
| 29 | * |
| 30 | * <pre> |
| 31 | * MODIFICATION HISTORY: |
| 32 | * |
| 33 | * Ver Who Date Changes |
| 34 | * ----- ---- -------- ----------------------------------------------- |
| 35 | * 1.00b rpm 04/25/02 First release |
| 36 | * </pre> |
| 37 | * |
| 38 | *****************************************************************************/ |
| 39 | |
| 40 | #ifndef XUARTLITE_L_H /* prevent circular inclusions */ |
| 41 | #define XUARTLITE_L_H /* by using protection macros */ |
| 42 | |
| 43 | /***************************** Include Files ********************************/ |
| 44 | |
| 45 | #include "xbasic_types.h" |
| 46 | #include "xio.h" |
| 47 | |
| 48 | /************************** Constant Definitions ****************************/ |
| 49 | |
| 50 | /* UART Lite register offsets */ |
| 51 | |
| 52 | #define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */ |
| 53 | #define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */ |
| 54 | #define XUL_STATUS_REG_OFFSET 8 /* status register, read only */ |
| 55 | #define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */ |
| 56 | |
| 57 | /* control register bit positions */ |
| 58 | |
| 59 | #define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */ |
| 60 | #define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */ |
| 61 | #define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */ |
| 62 | |
| 63 | /* status register bit positions */ |
| 64 | |
| 65 | #define XUL_SR_PARITY_ERROR 0x80 |
| 66 | #define XUL_SR_FRAMING_ERROR 0x40 |
| 67 | #define XUL_SR_OVERRUN_ERROR 0x20 |
| 68 | #define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */ |
| 69 | #define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */ |
| 70 | #define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */ |
| 71 | #define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */ |
| 72 | #define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */ |
| 73 | |
| 74 | /* the following constant specifies the size of the FIFOs, the size of the |
| 75 | * FIFOs includes the transmitter and receiver such that it is the total number |
| 76 | * of bytes that the UART can buffer |
| 77 | */ |
| 78 | #define XUL_FIFO_SIZE 16 |
| 79 | |
| 80 | /* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a |
| 81 | * per instance basis |
| 82 | */ |
| 83 | #define XUL_STOP_BITS 1 |
| 84 | |
| 85 | /* Parity definitions |
| 86 | */ |
| 87 | #define XUL_PARITY_NONE 0 |
| 88 | #define XUL_PARITY_ODD 1 |
| 89 | #define XUL_PARITY_EVEN 2 |
| 90 | |
| 91 | /**************************** Type Definitions ******************************/ |
| 92 | |
| 93 | /***************** Macros (Inline Functions) Definitions ********************/ |
| 94 | |
| 95 | /***************************************************************************** |
| 96 | * |
| 97 | * Low-level driver macros and functions. The list below provides signatures |
| 98 | * to help the user use the macros. |
| 99 | * |
| 100 | * void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask) |
| 101 | * u32 XUartLite_mGetControlReg(u32 BaseAddress) |
| 102 | * u32 XUartLite_mGetStatusReg(u32 BaseAddress) |
| 103 | * |
| 104 | * Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress) |
| 105 | * Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress) |
| 106 | * Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress) |
| 107 | * |
| 108 | * void XUartLite_mEnableIntr(u32 BaseAddress) |
| 109 | * void XUartLite_mDisableIntr(u32 BaseAddress) |
| 110 | * |
| 111 | * void XUartLite_SendByte(u32 BaseAddress, u8 Data); |
| 112 | * u8 XUartLite_RecvByte(u32 BaseAddress); |
| 113 | * |
| 114 | *****************************************************************************/ |
| 115 | |
| 116 | /****************************************************************************/ |
| 117 | /** |
| 118 | * |
| 119 | * Set the contents of the control register. Use the XUL_CR_* constants defined |
| 120 | * above to create the bit-mask to be written to the register. |
| 121 | * |
| 122 | * @param BaseAddress is the base address of the device |
| 123 | * @param Mask is the 32-bit value to write to the control register |
| 124 | * |
| 125 | * @return None. |
| 126 | * |
| 127 | * @note None. |
| 128 | * |
| 129 | *****************************************************************************/ |
| 130 | #define XUartLite_mSetControlReg(BaseAddress, Mask) \ |
| 131 | XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask)) |
| 132 | |
| 133 | |
| 134 | /****************************************************************************/ |
| 135 | /** |
| 136 | * |
| 137 | * Get the contents of the control register. Use the XUL_CR_* constants defined |
| 138 | * above to interpret the bit-mask returned. |
| 139 | * |
| 140 | * @param BaseAddress is the base address of the device |
| 141 | * |
| 142 | * @return A 32-bit value representing the contents of the control register. |
| 143 | * |
| 144 | * @note None. |
| 145 | * |
| 146 | *****************************************************************************/ |
| 147 | #define XUartLite_mGetControlReg(BaseAddress) \ |
| 148 | XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET) |
| 149 | |
| 150 | |
| 151 | /****************************************************************************/ |
| 152 | /** |
| 153 | * |
| 154 | * Get the contents of the status register. Use the XUL_SR_* constants defined |
| 155 | * above to interpret the bit-mask returned. |
| 156 | * |
| 157 | * @param BaseAddress is the base address of the device |
| 158 | * |
| 159 | * @return A 32-bit value representing the contents of the status register. |
| 160 | * |
| 161 | * @note None. |
| 162 | * |
| 163 | *****************************************************************************/ |
| 164 | #define XUartLite_mGetStatusReg(BaseAddress) \ |
| 165 | XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET) |
| 166 | |
| 167 | |
| 168 | /****************************************************************************/ |
| 169 | /** |
| 170 | * |
| 171 | * Check to see if the receiver has data. |
| 172 | * |
| 173 | * @param BaseAddress is the base address of the device |
| 174 | * |
| 175 | * @return XTRUE if the receiver is empty, XFALSE if there is data present. |
| 176 | * |
| 177 | * @note None. |
| 178 | * |
| 179 | *****************************************************************************/ |
| 180 | #define XUartLite_mIsReceiveEmpty(BaseAddress) \ |
| 181 | (!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA)) |
| 182 | |
| 183 | |
| 184 | /****************************************************************************/ |
| 185 | /** |
| 186 | * |
| 187 | * Check to see if the transmitter is full. |
| 188 | * |
| 189 | * @param BaseAddress is the base address of the device |
| 190 | * |
| 191 | * @return XTRUE if the transmitter is full, XFALSE otherwise. |
| 192 | * |
| 193 | * @note None. |
| 194 | * |
| 195 | *****************************************************************************/ |
| 196 | #define XUartLite_mIsTransmitFull(BaseAddress) \ |
| 197 | (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL) |
| 198 | |
| 199 | |
| 200 | /****************************************************************************/ |
| 201 | /** |
| 202 | * |
| 203 | * Check to see if the interrupt is enabled. |
| 204 | * |
| 205 | * @param BaseAddress is the base address of the device |
| 206 | * |
| 207 | * @return XTRUE if the interrupt is enabled, XFALSE otherwise. |
| 208 | * |
| 209 | * @note None. |
| 210 | * |
| 211 | *****************************************************************************/ |
| 212 | #define XUartLite_mIsIntrEnabled(BaseAddress) \ |
| 213 | (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED) |
| 214 | |
| 215 | |
| 216 | /****************************************************************************/ |
| 217 | /** |
| 218 | * |
| 219 | * Enable the device interrupt. Preserve the contents of the control register. |
| 220 | * |
| 221 | * @param BaseAddress is the base address of the device |
| 222 | * |
| 223 | * @return None. |
| 224 | * |
| 225 | * @note None. |
| 226 | * |
| 227 | *****************************************************************************/ |
| 228 | #define XUartLite_mEnableIntr(BaseAddress) \ |
| 229 | XUartLite_mSetControlReg((BaseAddress), \ |
| 230 | XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR) |
| 231 | |
| 232 | |
| 233 | /****************************************************************************/ |
| 234 | /** |
| 235 | * |
| 236 | * Disable the device interrupt. Preserve the contents of the control register. |
| 237 | * |
| 238 | * @param BaseAddress is the base address of the device |
| 239 | * |
| 240 | * @return None. |
| 241 | * |
| 242 | * @note None. |
| 243 | * |
| 244 | *****************************************************************************/ |
| 245 | #define XUartLite_mDisableIntr(BaseAddress) \ |
| 246 | XUartLite_mSetControlReg((BaseAddress), \ |
| 247 | XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR) |
| 248 | |
| 249 | |
| 250 | /************************** Function Prototypes *****************************/ |
| 251 | |
| 252 | void XUartLite_SendByte(u32 BaseAddress, u8 Data); |
| 253 | u8 XUartLite_RecvByte(u32 BaseAddress); |
| 254 | |
| 255 | |
| 256 | #endif /* end of protection macro */ |