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Yuantian Tang353f36d2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lu34f39ce2021-06-03 10:51:19 +08003 * Copyright 2019-2021 NXP
Yuantian Tang353f36d2019-04-10 16:43:34 +08004 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
9#define CONFIG_REMAKE_ELF
Yuantian Tang353f36d2019-04-10 16:43:34 +080010#define CONFIG_MP
11
12#include <asm/arch/stream_id_lsch3.h>
13#include <asm/arch/config.h>
14#include <asm/arch/soc.h>
15
16/* Link Definitions */
17#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
18
Yuantian Tang353f36d2019-04-10 16:43:34 +080019#define CONFIG_VERY_BIG_RAM
20#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
21#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
22#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
23#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
24#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
25
Yuantian Tang353f36d2019-04-10 16:43:34 +080026/*
27 * SMP Definitinos
28 */
Michael Walle3d3fe8b2020-06-01 21:53:26 +020029#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang353f36d2019-04-10 16:43:34 +080030
31/* Generic Timer Definitions */
32#define COUNTER_FREQUENCY 25000000 /* 25MHz */
33
Biwen Li90281f42021-02-05 19:01:57 +080034/* GPIO */
35#ifdef CONFIG_DM_GPIO
36#ifndef CONFIG_MPC8XXX_GPIO
37#define CONFIG_MPC8XXX_GPIO
38#endif
39#endif
40
Yuantian Tang353f36d2019-04-10 16:43:34 +080041/* I2C */
Yuantian Tang353f36d2019-04-10 16:43:34 +080042
43/* Serial Port */
Yuantian Tang353f36d2019-04-10 16:43:34 +080044#define CONFIG_SYS_NS16550_SERIAL
45#define CONFIG_SYS_NS16550_REG_SIZE 1
46#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
47
Yuantian Tang353f36d2019-04-10 16:43:34 +080048#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
49
50/* Miscellaneous configurable options */
Yuantian Tang353f36d2019-04-10 16:43:34 +080051
52/* Physical Memory Map */
53#define CONFIG_CHIP_SELECTS_PER_CTRL 4
54
55#define CONFIG_HWCONFIG
56#define HWCONFIG_BUFFER_SIZE 128
57
Yuantian Tang353f36d2019-04-10 16:43:34 +080058#define BOOT_TARGET_DEVICES(func) \
59 func(MMC, mmc, 0) \
Yuantian Tang0de19ab2019-11-04 15:10:45 +080060 func(MMC, mmc, 1) \
Yuantian Tang81d9e552020-03-10 11:31:05 +080061 func(USB, usb, 0) \
62 func(DHCP, dhcp, na)
Yuantian Tang353f36d2019-04-10 16:43:34 +080063#include <config_distro_bootcmd.h>
64
Yuantian Tang353f36d2019-04-10 16:43:34 +080065#undef CONFIG_BOOTCOMMAND
66
Yuantian Tang0de19ab2019-11-04 15:10:45 +080067#define XSPI_NOR_BOOTCOMMAND \
68 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
69 "env exists secureboot && esbc_halt;;"
Yuantian Tang353f36d2019-04-10 16:43:34 +080070#define SD_BOOTCOMMAND \
Yuantian Tang0de19ab2019-11-04 15:10:45 +080071 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
72 "env exists secureboot && esbc_halt;"
73#define SD2_BOOTCOMMAND \
74 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang353f36d2019-04-10 16:43:34 +080075 "env exists secureboot && esbc_halt;"
76
77/* Monitor Command Prompt */
78#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
79#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
80 sizeof(CONFIG_SYS_PROMPT) + 16)
81#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
82
Yuantian Tang353f36d2019-04-10 16:43:34 +080083#define CONFIG_SYS_MAXARGS 64 /* max command args */
84
85#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
86
Yuantian Tang353f36d2019-04-10 16:43:34 +080087#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang353f36d2019-04-10 16:43:34 +080088#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang353f36d2019-04-10 16:43:34 +080089
90#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
91
Yuantian Tang353f36d2019-04-10 16:43:34 +080092/* I2C bus multiplexer */
93#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
94#define I2C_MUX_CH_DEFAULT 0x8
95
96/* EEPROM */
Yuantian Tang353f36d2019-04-10 16:43:34 +080097#define CONFIG_SYS_I2C_EEPROM_NXID
98#define CONFIG_SYS_EEPROM_BUS_NUM 0
Yuantian Tang353f36d2019-04-10 16:43:34 +080099
Wen Hef76d88b2019-11-18 13:26:09 +0800100/* DisplayPort */
101#define DP_PWD_EN_DEFAULT_MASK 0x8
102
Udit Agarwal5536c3c2019-11-07 16:11:32 +0000103#ifdef CONFIG_NXP_ESBC
Yuantian Tanga1e126b2019-05-24 14:36:27 +0800104#include <asm/fsl_secure_boot.h>
105#endif
106
Alex Margineanff6c6b22019-07-03 12:11:39 +0300107/* Ethernet */
108/* smallest ENETC BD ring has 8 entries */
109#define CONFIG_SYS_RX_ETH_BUFFER 8
110
Yuantian Tang353f36d2019-04-10 16:43:34 +0800111#endif /* __L1028A_COMMON_H */