blob: ea2be496e05c7d1da924aaecd5c5ca3cfd85bdd9 [file] [log] [blame]
Adrian Alonso1a8150d2015-09-03 11:49:28 -05001/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX7.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __MX7_COMMON_H
10#define __MX7_COMMON_H
11
12#include <linux/sizes.h>
13#include <asm/arch/imx-regs.h>
14#include <asm/imx-common/gpio.h>
15
16#ifndef CONFIG_MX7
17#define CONFIG_MX7
18#endif
19
20/* Timer settings */
21#define CONFIG_MXC_GPT_HCLK
22#define CONFIG_SYSCOUNTER_TIMER
23#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
24
25/* Enable iomux-lpsr support */
26#define CONFIG_IOMUX_LPSR
27#define CONFIG_IMX_FIXED_IVT_OFFSET
28
29/* Size of malloc() pool */
30#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
31
32#define CONFIG_BOARD_EARLY_INIT_F
33#define CONFIG_BOARD_LATE_INIT
34
35#define CONFIG_ROM_UNIFIED_SECTIONS
36#define CONFIG_SYS_GENERIC_BOARD
37#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_DISPLAY_BOARDINFO
39
40#define CONFIG_LOADADDR 0x80800000
41#define CONFIG_SYS_TEXT_BASE 0x87800000
42
43#ifndef CONFIG_BOOTDELAY
44#define CONFIG_BOOTDELAY 3
45#endif
46
47/* allow to overwrite serial and ethaddr */
48#define CONFIG_ENV_OVERWRITE
49#define CONFIG_CONS_INDEX 1
50#define CONFIG_BAUDRATE 115200
51
52/* Filesystems and image support */
53#define CONFIG_OF_LIBFDT
54#define CONFIG_CMD_BOOTZ
55#define CONFIG_DOS_PARTITION
56#define CONFIG_CMD_EXT2
57#define CONFIG_CMD_EXT4
58#define CONFIG_CMD_EXT4_WRITE
59#define CONFIG_CMD_FAT
60
61/* Miscellaneous configurable options */
62#undef CONFIG_CMD_IMLS
63#define CONFIG_SYS_LONGHELP
64#define CONFIG_SYS_HUSH_PARSER
65#define CONFIG_CMDLINE_EDITING
66#define CONFIG_AUTO_COMPLETE
67#define CONFIG_SYS_CBSIZE 512
68#define CONFIG_SYS_MAXARGS 32
69#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
70
71#ifndef CONFIG_SYS_DCACHE_OFF
72#define CONFIG_CMD_CACHE
73#endif
74
75/* GPIO */
76#define CONFIG_MXC_GPIO
77#define CONFIG_CMD_GPIO
78
79/* UART */
80#define CONFIG_MXC_UART
81#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
82
83/* MMC */
84#define CONFIG_MMC
85#define CONFIG_CMD_MMC
86#define CONFIG_GENERIC_MMC
87#define CONFIG_BOUNCE_BUFFER
88#define CONFIG_FSL_ESDHC
89#define CONFIG_FSL_USDHC
90
91/* Fuses */
92#define CONFIG_CMD_FUSE
93#define CONFIG_MXC_OCOTP
94
95#endif