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wdenkdc7c9a12003-03-26 06:55:25 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
Jens Scharsigc041e9d2010-01-23 12:03:45 +010026#include <exports.h>
27#include <netdev.h>
wdenk85ec0bc2003-03-31 16:34:49 +000028#include <asm/arch/AT91RM9200.h>
Jens Scharsigc041e9d2010-01-23 12:03:45 +010029#include <asm/io.h>
30
31#if defined(CONFIG_DRIVER_ETHER)
Wolfgang Denk080bdb72005-10-05 01:51:29 +020032#include <at91rm9200_net.h>
33#include <dm9161.h>
Jens Scharsigc041e9d2010-01-23 12:03:45 +010034#endif
wdenkdc7c9a12003-03-26 06:55:25 +000035
Wolfgang Denkd87080b2006-03-31 18:32:53 +020036DECLARE_GLOBAL_DATA_PTR;
37
wdenkdc7c9a12003-03-26 06:55:25 +000038/* ------------------------------------------------------------------------- */
39/*
40 * Miscelaneous platform dependent initialisations
41 */
42
wdenk2abbe072003-06-16 23:50:08 +000043int board_init (void)
44{
wdenk2abbe072003-06-16 23:50:08 +000045 /* Enable Ctrlc */
46 console_init_f ();
wdenkdc7c9a12003-03-26 06:55:25 +000047
wdenk2abbe072003-06-16 23:50:08 +000048 /* Correct IRDA resistor problem */
49 /* Set PA23_TXD in Output */
Wolfgang Denk27e166b2005-12-19 13:02:45 +010050 ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
wdenkdc7c9a12003-03-26 06:55:25 +000051
wdenk2abbe072003-06-16 23:50:08 +000052 /* memory and cpu-speed are setup before relocation */
53 /* so we do _nothing_ here */
54
55 /* arch number of AT91RM9200DK-Board */
Claudio Scordino8cc62a72008-09-12 02:20:46 +020056 gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
wdenk2abbe072003-06-16 23:50:08 +000057 /* adress of boot parameters */
58 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
59
60 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +000061}
62
Jean-Christophe PLAGNIOL-VILLARDf82518d2009-03-27 23:26:43 +010063void board_reset (void)
64{
65 AT91PS_PIO pio = AT91C_BASE_PIOA;
66
67 /* Clear PA19 to trigger the hard reset */
68 writel(0x00080000, pio->PIO_CODR);
69 writel(0x00080000, pio->PIO_OER);
70 writel(0x00080000, pio->PIO_PER);
71}
72
wdenk2abbe072003-06-16 23:50:08 +000073int dram_init (void)
wdenkdc7c9a12003-03-26 06:55:25 +000074{
wdenk2abbe072003-06-16 23:50:08 +000075 gd->bd->bi_dram[0].start = PHYS_SDRAM;
76 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
77 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +000078}
79
Wolfgang Denk080bdb72005-10-05 01:51:29 +020080#ifdef CONFIG_DRIVER_ETHER
Jon Loeligerfcec2eb2007-07-09 18:19:09 -050081#if defined(CONFIG_CMD_NET)
Wolfgang Denk080bdb72005-10-05 01:51:29 +020082
83/*
84 * Name:
85 * at91rm9200_GetPhyInterface
86 * Description:
87 * Initialise the interface functions to the PHY
88 * Arguments:
89 * None
90 * Return value:
91 * None
92 */
93void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
94{
95 p_phyops->Init = dm9161_InitPhy;
96 p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
97 p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
98 p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
99}
100
Jon Loeligerfcec2eb2007-07-09 18:19:09 -0500101#endif
Wolfgang Denk080bdb72005-10-05 01:51:29 +0200102#endif /* CONFIG_DRIVER_ETHER */
103
Jens Scharsigc041e9d2010-01-23 12:03:45 +0100104#ifdef CONFIG_DRIVER_AT91EMAC
105int board_eth_init(bd_t *bis)
106{
107 int rc = 0;
108 rc = at91emac_register(bis, 0);
109 return rc;
110}
111#endif
112
wdenkdc7c9a12003-03-26 06:55:25 +0000113/*
114 * Disk On Chip (NAND) Millenium initialization.
115 * The NAND lives in the CS2* space
116 */
Jon Loeligerfcec2eb2007-07-09 18:19:09 -0500117#if defined(CONFIG_CMD_NAND)
wdenka43278a2003-09-11 19:48:06 +0000118extern ulong nand_probe (ulong physadr);
wdenkdc7c9a12003-03-26 06:55:25 +0000119
wdenk2abbe072003-06-16 23:50:08 +0000120#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
121void nand_init (void)
wdenkdc7c9a12003-03-26 06:55:25 +0000122{
123 /* Setup Smart Media, fitst enable the address range of CS3 */
wdenk2abbe072003-06-16 23:50:08 +0000124 *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
125 /* set the bus interface characteristics based on
126 tDS Data Set up Time 30 - ns
127 tDH Data Hold Time 20 - ns
128 tALS ALE Set up Time 20 - ns
129 16ns at 60 MHz ~= 3 */
wdenkdc7c9a12003-03-26 06:55:25 +0000130/*memory mapping structures */
131#define SM_ID_RWH (5 << 28)
132#define SM_RWH (1 << 28)
133#define SM_RWS (0 << 24)
134#define SM_TDF (1 << 8)
135#define SM_NWS (3)
wdenk2abbe072003-06-16 23:50:08 +0000136 AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
137 AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
138 SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
wdenkdc7c9a12003-03-26 06:55:25 +0000139
wdenk2abbe072003-06-16 23:50:08 +0000140 /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
141 *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
142 AT91C_PC3_BFBAA_SMWE;
143 *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
144 AT91C_PC3_BFBAA_SMWE;
wdenkdc7c9a12003-03-26 06:55:25 +0000145
146 /* Configure PC2 as input (signal READY of the SmartMedia) */
wdenk2abbe072003-06-16 23:50:08 +0000147 *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
148 *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
wdenkdc7c9a12003-03-26 06:55:25 +0000149
150 /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
wdenk2abbe072003-06-16 23:50:08 +0000151 *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
152 *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
wdenkdc7c9a12003-03-26 06:55:25 +0000153
wdenk8b07a112004-07-10 21:45:47 +0000154 /* PIOB and PIOC clock enabling */
155 *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
156 *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
157
wdenk2abbe072003-06-16 23:50:08 +0000158 if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
wdenka43278a2003-09-11 19:48:06 +0000159 printf (" No SmartMedia card inserted\n");
160#ifdef DEBUG
161 printf (" SmartMedia card inserted\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000162
wdenk2abbe072003-06-16 23:50:08 +0000163 printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
wdenka43278a2003-09-11 19:48:06 +0000164#endif
165 printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
wdenkdc7c9a12003-03-26 06:55:25 +0000166}
167#endif