Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stephen Warren | b692009 | 2015-08-05 11:52:07 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. |
Stephen Warren | b692009 | 2015-08-05 11:52:07 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! |
| 8 | * |
| 9 | * To generate this file, use the tegra-pinmux-scripts tool available from |
| 10 | * https://github.com/NVIDIA/tegra-pinmux-scripts |
| 11 | * Run "board-to-uboot.py e2220-1170". |
| 12 | */ |
| 13 | |
| 14 | #ifndef _PINMUX_CONFIG_E2220_1170_H_ |
| 15 | #define _PINMUX_CONFIG_E2220_1170_H_ |
| 16 | |
Stephen Warren | 01a97a1 | 2016-05-12 12:07:39 -0600 | [diff] [blame] | 17 | #define GPIO_INIT(_port, _gpio, _init) \ |
Stephen Warren | b692009 | 2015-08-05 11:52:07 -0600 | [diff] [blame] | 18 | { \ |
Stephen Warren | 01a97a1 | 2016-05-12 12:07:39 -0600 | [diff] [blame] | 19 | .gpio = TEGRA_GPIO(_port, _gpio), \ |
Stephen Warren | b692009 | 2015-08-05 11:52:07 -0600 | [diff] [blame] | 20 | .init = TEGRA_GPIO_INIT_##_init, \ |
| 21 | } |
| 22 | |
| 23 | static const struct tegra_gpio_config e2220_1170_gpio_inits[] = { |
Stephen Warren | 01a97a1 | 2016-05-12 12:07:39 -0600 | [diff] [blame] | 24 | /* port, pin, init_val */ |
| 25 | GPIO_INIT(A, 5, IN), |
| 26 | GPIO_INIT(A, 6, IN), |
| 27 | GPIO_INIT(B, 4, IN), |
| 28 | GPIO_INIT(E, 6, IN), |
| 29 | GPIO_INIT(G, 2, OUT0), |
| 30 | GPIO_INIT(G, 3, OUT0), |
| 31 | GPIO_INIT(H, 0, OUT0), |
| 32 | GPIO_INIT(H, 1, OUT0), |
| 33 | GPIO_INIT(H, 2, IN), |
| 34 | GPIO_INIT(H, 3, OUT0), |
| 35 | GPIO_INIT(H, 4, OUT0), |
| 36 | GPIO_INIT(H, 5, IN), |
| 37 | GPIO_INIT(H, 6, OUT0), |
| 38 | GPIO_INIT(H, 7, OUT0), |
| 39 | GPIO_INIT(I, 0, OUT0), |
| 40 | GPIO_INIT(I, 1, IN), |
| 41 | GPIO_INIT(I, 2, OUT0), |
| 42 | GPIO_INIT(I, 3, OUT0), |
| 43 | GPIO_INIT(K, 0, IN), |
| 44 | GPIO_INIT(K, 1, OUT0), |
| 45 | GPIO_INIT(K, 2, OUT0), |
| 46 | GPIO_INIT(K, 3, OUT0), |
| 47 | GPIO_INIT(K, 4, IN), |
| 48 | GPIO_INIT(K, 5, OUT0), |
| 49 | GPIO_INIT(K, 6, IN), |
| 50 | GPIO_INIT(K, 7, OUT0), |
| 51 | GPIO_INIT(L, 0, OUT0), |
| 52 | GPIO_INIT(S, 4, OUT0), |
| 53 | GPIO_INIT(S, 5, OUT0), |
| 54 | GPIO_INIT(S, 6, OUT0), |
| 55 | GPIO_INIT(S, 7, OUT0), |
| 56 | GPIO_INIT(T, 0, OUT0), |
| 57 | GPIO_INIT(T, 1, OUT0), |
| 58 | GPIO_INIT(V, 1, OUT0), |
| 59 | GPIO_INIT(V, 2, OUT0), |
| 60 | GPIO_INIT(V, 3, IN), |
| 61 | GPIO_INIT(V, 5, OUT0), |
| 62 | GPIO_INIT(V, 6, OUT0), |
| 63 | GPIO_INIT(X, 0, IN), |
| 64 | GPIO_INIT(X, 1, IN), |
| 65 | GPIO_INIT(X, 2, IN), |
| 66 | GPIO_INIT(X, 3, IN), |
| 67 | GPIO_INIT(X, 4, IN), |
| 68 | GPIO_INIT(X, 5, IN), |
| 69 | GPIO_INIT(X, 6, IN), |
| 70 | GPIO_INIT(X, 7, IN), |
| 71 | GPIO_INIT(Y, 0, IN), |
| 72 | GPIO_INIT(Y, 1, IN), |
| 73 | GPIO_INIT(Z, 0, IN), |
| 74 | GPIO_INIT(Z, 4, OUT0), |
| 75 | GPIO_INIT(BB, 2, OUT0), |
| 76 | GPIO_INIT(BB, 3, OUT0), |
| 77 | GPIO_INIT(BB, 4, IN), |
| 78 | GPIO_INIT(CC, 1, IN), |
| 79 | GPIO_INIT(CC, 5, OUT0), |
| 80 | GPIO_INIT(CC, 6, IN), |
| 81 | GPIO_INIT(CC, 7, OUT0), |
Stephen Warren | b692009 | 2015-08-05 11:52:07 -0600 | [diff] [blame] | 82 | }; |
| 83 | |
| 84 | #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ |
| 85 | { \ |
| 86 | .pingrp = PMUX_PINGRP_##_pingrp, \ |
| 87 | .func = PMUX_FUNC_##_mux, \ |
| 88 | .pull = PMUX_PULL_##_pull, \ |
| 89 | .tristate = PMUX_TRI_##_tri, \ |
| 90 | .io = PMUX_PIN_##_io, \ |
| 91 | .od = PMUX_PIN_OD_##_od, \ |
| 92 | .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ |
| 93 | .lock = PMUX_PIN_LOCK_DEFAULT, \ |
| 94 | } |
| 95 | |
| 96 | static const struct pmux_pingrp_config e2220_1170_pingrps[] = { |
| 97 | /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ |
| 98 | PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), |
| 99 | PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL), |
| 100 | PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL), |
| 101 | PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), |
| 102 | PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL), |
| 103 | PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 104 | PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 105 | PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 106 | PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 107 | PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 108 | PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 109 | PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 110 | PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
| 111 | PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
| 112 | PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
| 113 | PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 114 | PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 115 | PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 116 | PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 117 | PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 118 | PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 119 | PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 120 | PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 121 | PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 122 | PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 123 | PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 124 | PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 125 | PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 126 | PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 127 | PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 128 | PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 129 | PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 130 | PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 131 | PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 132 | PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 133 | PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 134 | PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 135 | PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 136 | PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 137 | PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 138 | PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 139 | PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 140 | PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 141 | PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 142 | PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 143 | PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 144 | PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 145 | PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 146 | PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 147 | PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 148 | PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 149 | PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 150 | PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 151 | PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 152 | PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 153 | PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 154 | PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 155 | PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 156 | PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 157 | PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 158 | PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 159 | PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 160 | PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 161 | PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 162 | PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 163 | PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 164 | PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 165 | PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 166 | PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 167 | PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 168 | PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 169 | PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 170 | PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 171 | PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 172 | PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 173 | PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 174 | PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 175 | PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 176 | PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 177 | PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 178 | PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 179 | PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 180 | PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 181 | PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 182 | PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 183 | PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 184 | PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 185 | PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 186 | PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 187 | PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 188 | PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 189 | PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 190 | PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 191 | PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 192 | PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 193 | PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 194 | PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 195 | PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 196 | PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 197 | PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 198 | PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 199 | PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 200 | PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 201 | PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 202 | PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 203 | PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 204 | PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 205 | PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 206 | PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 207 | PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 208 | PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 209 | PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 210 | PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 211 | PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 212 | PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 213 | PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 214 | PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 215 | PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 216 | PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 217 | PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 218 | PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), |
| 219 | PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 220 | PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), |
| 221 | PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 222 | PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 223 | PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 224 | PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 225 | PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 226 | PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 227 | PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 228 | PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 229 | PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 230 | PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 231 | PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 232 | PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 233 | PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
| 234 | PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 235 | PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 236 | PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 237 | PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), |
| 238 | PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), |
| 239 | PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 240 | PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 241 | PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), |
| 242 | PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), |
| 243 | PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), |
| 244 | PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), |
| 245 | PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
| 246 | PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 247 | PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 248 | PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 249 | PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 250 | PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 251 | PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 252 | PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 253 | PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 254 | PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), |
| 255 | PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), |
| 256 | PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 257 | PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 258 | PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), |
| 259 | }; |
| 260 | |
| 261 | #define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ |
| 262 | { \ |
| 263 | .drvgrp = PMUX_DRVGRP_##_drvgrp, \ |
| 264 | .slwf = _slwf, \ |
| 265 | .slwr = _slwr, \ |
| 266 | .drvup = _drvup, \ |
| 267 | .drvdn = _drvdn, \ |
| 268 | .lpmd = PMUX_LPMD_##_lpmd, \ |
| 269 | .schmt = PMUX_SCHMT_##_schmt, \ |
| 270 | .hsm = PMUX_HSM_##_hsm, \ |
| 271 | } |
| 272 | |
| 273 | static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { |
| 274 | }; |
| 275 | |
| 276 | #endif /* PINMUX_CONFIG_E2220_1170_H */ |