Peng Fan | 77fa045 | 2017-02-22 16:21:56 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2016 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | |
| 11 | #include "imx7ulp.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "NXP i.MX7ULP EVK"; |
| 15 | compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp", "Generic DT based system"; |
| 16 | |
| 17 | chosen { |
| 18 | bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x402D0010,115200"; |
| 19 | stdout-path = &lpuart4; |
| 20 | }; |
| 21 | |
| 22 | bcmdhd_wlan_0: bcmdhd_wlan@0 { |
| 23 | compatible = "android,bcmdhd_wlan"; |
| 24 | wlreg_on-supply = <&wlreg_on>; |
| 25 | bcmdhd_fw = "/lib/firmware/bcm/1DX_BCM4343W/fw_bcmdhd.bin"; |
| 26 | bcmdhd_nv = "/lib/firmware/bcm/1DX_BCM4343W/bcmdhd.1DX.SDIO.cal"; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | device_type = "memory"; |
| 31 | reg = <0x60000000 0x40000000>; |
| 32 | }; |
| 33 | |
| 34 | backlight { |
| 35 | compatible = "gpio-backlight"; |
| 36 | pinctrl-names = "default"; |
| 37 | pinctrl-0 = <&pinctrl_backlight>; |
| 38 | gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>; |
| 39 | default-on; |
| 40 | status = "okay"; |
| 41 | }; |
| 42 | |
| 43 | mipi_dsi_reset: mipi-dsi-reset { |
| 44 | compatible = "gpio-reset"; |
| 45 | reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; |
| 46 | reset-delay-us = <1000>; |
| 47 | #reset-cells = <0>; |
| 48 | }; |
| 49 | |
| 50 | regulators { |
| 51 | compatible = "simple-bus"; |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <0>; |
| 54 | |
| 55 | wlreg_on: fixedregulator@100 { |
| 56 | compatible = "regulator-fixed"; |
| 57 | regulator-min-microvolt = <5000000>; |
| 58 | regulator-max-microvolt = <5000000>; |
| 59 | regulator-name = "wlreg_on"; |
| 60 | gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>; |
| 61 | startup-delay-us = <100>; |
| 62 | enable-active-high; |
| 63 | }; |
| 64 | |
| 65 | reg_usb_otg1_vbus: regulator@0 { |
| 66 | compatible = "regulator-fixed"; |
| 67 | reg = <0>; |
| 68 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&pinctrl_usb_otg1>; |
| 70 | regulator-name = "usb_otg1_vbus"; |
| 71 | regulator-min-microvolt = <5000000>; |
| 72 | regulator-max-microvolt = <5000000>; |
| 73 | gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; |
| 74 | enable-active-high; |
| 75 | }; |
| 76 | |
| 77 | reg_vsd_3v3: regulator@1 { |
| 78 | compatible = "regulator-fixed"; |
| 79 | reg = <1>; |
| 80 | regulator-name = "VSD_3V3"; |
| 81 | regulator-min-microvolt = <3300000>; |
| 82 | regulator-max-microvolt = <3300000>; |
| 83 | gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; |
| 84 | enable-active-high; |
| 85 | }; |
| 86 | |
| 87 | reg_vsd_3v3b: regulator@2 { |
| 88 | compatible = "regulator-fixed"; |
| 89 | reg = <2>; |
| 90 | regulator-name = "VSD_3V3B"; |
| 91 | regulator-min-microvolt = <3300000>; |
| 92 | regulator-max-microvolt = <3300000>; |
| 93 | gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| 94 | enable-active-high; |
| 95 | }; |
| 96 | }; |
| 97 | |
| 98 | extcon_usb1: extcon_usb1 { |
| 99 | compatible = "linux,extcon-usb-gpio"; |
| 100 | id-gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>; |
| 101 | pinctrl-names = "default"; |
| 102 | pinctrl-0 = <&pinctrl_extcon_usb1>; |
| 103 | }; |
| 104 | |
| 105 | pf1550-rpmsg { |
| 106 | compatible = "fsl,pf1550-rpmsg"; |
| 107 | sw1_reg: SW1 { |
| 108 | regulator-name = "SW1"; |
| 109 | regulator-min-microvolt = <600000>; |
| 110 | regulator-max-microvolt = <1387500>; |
| 111 | regulator-boot-on; |
| 112 | regulator-always-on; |
| 113 | }; |
| 114 | |
| 115 | sw2_reg: SW2 { |
| 116 | regulator-name = "SW2"; |
| 117 | regulator-min-microvolt = <600000>; |
| 118 | regulator-max-microvolt = <1387500>; |
| 119 | regulator-boot-on; |
| 120 | regulator-always-on; |
| 121 | }; |
| 122 | |
| 123 | sw3_reg: SW3 { |
| 124 | regulator-name = "SW3"; |
| 125 | regulator-min-microvolt = <1800000>; |
| 126 | regulator-max-microvolt = <3300000>; |
| 127 | regulator-boot-on; |
| 128 | regulator-always-on; |
| 129 | }; |
| 130 | |
| 131 | vref_reg: VREFDDR { |
| 132 | regulator-name = "VREFDDR"; |
| 133 | regulator-min-microvolt = <1200000>; |
| 134 | regulator-max-microvolt = <1200000>; |
| 135 | regulator-boot-on; |
| 136 | regulator-always-on; |
| 137 | }; |
| 138 | |
| 139 | vldo1_reg: LDO1 { |
| 140 | regulator-name = "LDO1"; |
| 141 | regulator-min-microvolt = <750000>; |
| 142 | regulator-max-microvolt = <3300000>; |
| 143 | regulator-always-on; |
| 144 | }; |
| 145 | |
| 146 | vldo2_reg: LDO2 { |
| 147 | regulator-name = "LDO2"; |
| 148 | regulator-min-microvolt = <1800000>; |
| 149 | regulator-max-microvolt = <3300000>; |
| 150 | regulator-always-on; |
| 151 | }; |
| 152 | |
| 153 | vldo3_reg: LDO3 { |
| 154 | regulator-name = "LDO3"; |
| 155 | regulator-min-microvolt = <750000>; |
| 156 | regulator-max-microvolt = <3300000>; |
| 157 | regulator-always-on; |
| 158 | }; |
| 159 | }; |
| 160 | }; |
| 161 | |
| 162 | &iomuxc1 { |
| 163 | pinctrl-names = "default"; |
| 164 | pinctrl-0 = <&pinctrl_hog_1>; |
| 165 | |
| 166 | imx7ulp-evk { |
| 167 | pinctrl_hog_1: hoggrp-1 { |
| 168 | fsl,pins = < |
| 169 | ULP1_PAD_PTC10__PTC10 0x30100 /* USDHC0 CD */ |
| 170 | ULP1_PAD_PTC1__PTC1 0x20100 |
| 171 | ULP1_PAD_PTD0__PTD0 0x30100 /* USDHC0 RST */ |
| 172 | ULP1_PAD_PTE13__PTE13 0x30103 /* USDHC1 CD */ |
| 173 | ULP1_PAD_PTE12__PTE12 0x30103 /* USDHC1 WP */ |
| 174 | ULP1_PAD_PTE14__SDHC1_VS 0x843 /* USDHC1 VSEL */ |
| 175 | >; |
| 176 | }; |
| 177 | |
| 178 | pinctrl_backlight: backlight_grp { |
| 179 | fsl,pins = < |
| 180 | ULP1_PAD_PTF2__PTF2 0x20100 |
| 181 | >; |
| 182 | }; |
| 183 | |
| 184 | pinctrl_lpi2c5: lpi2c5grp { |
| 185 | fsl,pins = < |
| 186 | ULP1_PAD_PTC4__LPI2C5_SCL 0x527 |
| 187 | ULP1_PAD_PTC5__LPI2C5_SDA 0x527 |
| 188 | >; |
| 189 | }; |
| 190 | |
| 191 | pinctrl_mipi_dsi_reset: mipi_dsi_reset_grp { |
| 192 | fsl,pins = < |
| 193 | ULP1_PAD_PTC19__PTC19 0x20103 |
| 194 | >; |
| 195 | }; |
| 196 | |
| 197 | pinctrl_lpuart4: lpuart4grp { |
| 198 | fsl,pins = < |
| 199 | ULP1_PAD_PTC3__LPUART4_RX 0x400 |
| 200 | ULP1_PAD_PTC2__LPUART4_TX 0x400 |
| 201 | >; |
| 202 | }; |
| 203 | |
| 204 | pinctrl_lpuart6: lpuart6grp { |
| 205 | fsl,pins = < |
| 206 | ULP1_PAD_PTE10__LPUART6_TX 0x400 |
| 207 | ULP1_PAD_PTE11__LPUART6_RX 0x400 |
| 208 | ULP1_PAD_PTE9__LPUART6_RTS_B 0x400 |
| 209 | ULP1_PAD_PTE8__LPUART6_CTS_B 0x400 |
| 210 | ULP1_PAD_PTE7__PTE7 0x00 /* BT_REG_ON */ |
| 211 | >; |
| 212 | }; |
| 213 | |
| 214 | pinctrl_lpuart7: lpuart7grp { |
| 215 | fsl,pins = < |
| 216 | ULP1_PAD_PTF14__LPUART7_TX 0x400 |
| 217 | ULP1_PAD_PTF15__LPUART7_RX 0x400 |
| 218 | ULP1_PAD_PTF13__LPUART7_RTS_B 0x400 |
| 219 | ULP1_PAD_PTF12__LPUART7_CTS_B 0x400 |
| 220 | >; |
| 221 | }; |
| 222 | |
| 223 | pinctrl_usdhc0: usdhc0grp { |
| 224 | fsl,pins = < |
| 225 | ULP1_PAD_PTD1__SDHC0_CMD 0x843 |
| 226 | ULP1_PAD_PTD2__SDHC0_CLK 0x10843 |
| 227 | ULP1_PAD_PTD7__SDHC0_D3 0x843 |
| 228 | ULP1_PAD_PTD8__SDHC0_D2 0x843 |
| 229 | ULP1_PAD_PTD9__SDHC0_D1 0x843 |
| 230 | ULP1_PAD_PTD10__SDHC0_D0 0x843 |
| 231 | >; |
| 232 | }; |
| 233 | |
| 234 | pinctrl_usdhc0_8bit: usdhc0grp_8bit { |
| 235 | fsl,pins = < |
| 236 | ULP1_PAD_PTD1__SDHC0_CMD 0x843 |
| 237 | ULP1_PAD_PTD2__SDHC0_CLK 0x843 |
| 238 | ULP1_PAD_PTD3__SDHC0_D7 0x843 |
| 239 | ULP1_PAD_PTD4__SDHC0_D6 0x843 |
| 240 | ULP1_PAD_PTD5__SDHC0_D5 0x843 |
| 241 | ULP1_PAD_PTD6__SDHC0_D4 0x843 |
| 242 | ULP1_PAD_PTD7__SDHC0_D3 0x843 |
| 243 | ULP1_PAD_PTD8__SDHC0_D2 0x843 |
| 244 | ULP1_PAD_PTD9__SDHC0_D1 0x843 |
| 245 | ULP1_PAD_PTD10__SDHC0_D0 0x843 |
| 246 | >; |
| 247 | }; |
| 248 | |
| 249 | pinctrl_lpi2c7: lpi2c7grp { |
| 250 | fsl,pins = < |
| 251 | ULP1_PAD_PTF12__LPI2C7_SCL 0x527 |
| 252 | ULP1_PAD_PTF13__LPI2C7_SDA 0x527 |
| 253 | >; |
| 254 | }; |
| 255 | |
| 256 | pinctrl_lpspi3: lpspi3grp { |
| 257 | fsl,pins = < |
| 258 | ULP1_PAD_PTF16__LPSPI3_SIN 0x300 |
| 259 | ULP1_PAD_PTF17__LPSPI3_SOUT 0x300 |
| 260 | ULP1_PAD_PTF18__LPSPI3_SCK 0x300 |
| 261 | ULP1_PAD_PTF19__LPSPI3_PCS0 0x300 |
| 262 | >; |
| 263 | }; |
| 264 | |
| 265 | pinctrl_usb_otg1: usbotg1grp { |
| 266 | fsl,pins = < |
| 267 | ULP1_PAD_PTC0__PTC0 0x30100 |
| 268 | >; |
| 269 | }; |
| 270 | |
| 271 | pinctrl_extcon_usb1: extcon1grp { |
| 272 | fsl,pins = < |
| 273 | ULP1_PAD_PTC8__PTC8 0x30103 |
| 274 | >; |
| 275 | }; |
| 276 | |
| 277 | pinctrl_usdhc1: usdhc1grp { |
| 278 | fsl,pins = < |
| 279 | ULP1_PAD_PTE3__SDHC1_CMD 0x843 |
| 280 | ULP1_PAD_PTE2__SDHC1_CLK 0x843 |
| 281 | ULP1_PAD_PTE1__SDHC1_D0 0x843 |
| 282 | ULP1_PAD_PTE0__SDHC1_D1 0x843 |
| 283 | ULP1_PAD_PTE5__SDHC1_D2 0x843 |
| 284 | ULP1_PAD_PTE4__SDHC1_D3 0x843 |
| 285 | >; |
| 286 | }; |
| 287 | |
| 288 | pinctrl_usdhc1_rst: usdhc1grp_rst { |
| 289 | fsl,pins = < |
| 290 | ULP1_PAD_PTE11__PTE11 0x30100 /* USDHC1 RST */ |
| 291 | >; |
| 292 | }; |
| 293 | |
| 294 | pinctrl_wifi: wifigrp { |
| 295 | fsl,pins = < |
| 296 | ULP1_PAD_PTE6__PTE6 0x43 /* WL_REG_ON */ |
| 297 | >; |
| 298 | }; |
| 299 | }; |
| 300 | }; |
| 301 | |
| 302 | &lcdif { |
| 303 | status = "okay"; |
| 304 | disp-dev = "mipi_dsi_northwest"; |
| 305 | display = <&display0>; |
| 306 | |
| 307 | display0: display { |
| 308 | bits-per-pixel = <16>; |
| 309 | bus-width = <24>; |
| 310 | |
| 311 | display-timings { |
| 312 | native-mode = <&timing0>; |
| 313 | timing0: timing0 { |
| 314 | clock-frequency = <9200000>; |
| 315 | hactive = <480>; |
| 316 | vactive = <272>; |
| 317 | hfront-porch = <8>; |
| 318 | hback-porch = <4>; |
| 319 | hsync-len = <41>; |
| 320 | vback-porch = <2>; |
| 321 | vfront-porch = <4>; |
| 322 | vsync-len = <10>; |
| 323 | |
| 324 | hsync-active = <0>; |
| 325 | vsync-active = <0>; |
| 326 | de-active = <1>; |
| 327 | pixelclk-active = <0>; |
| 328 | }; |
| 329 | }; |
| 330 | }; |
| 331 | }; |
| 332 | |
| 333 | &lpi2c7 { |
| 334 | #address-cells = <1>; |
| 335 | #size-cells = <0>; |
| 336 | pinctrl-names = "default"; |
| 337 | pinctrl-0 = <&pinctrl_lpi2c7>; |
| 338 | }; |
| 339 | |
| 340 | &lpi2c5 { |
| 341 | #address-cells = <1>; |
| 342 | #size-cells = <0>; |
| 343 | pinctrl-names = "default"; |
| 344 | pinctrl-0 = <&pinctrl_lpi2c5>; |
| 345 | status = "okay"; |
| 346 | |
| 347 | fxas2100x@20 { |
| 348 | compatible = "fsl,fxas2100x"; |
| 349 | reg = <0x20>; |
| 350 | }; |
| 351 | |
| 352 | fxos8700@1e { |
| 353 | compatible = "fsl,fxos8700"; |
| 354 | reg = <0x1e>; |
| 355 | }; |
| 356 | |
| 357 | mpl3115@60 { |
| 358 | compatible = "fsl,mpl3115"; |
| 359 | reg = <0x60>; |
| 360 | }; |
| 361 | }; |
| 362 | |
| 363 | &lpspi3 { |
| 364 | #address-cells = <1>; |
| 365 | #size-cells = <0>; |
| 366 | pinctrl-names = "default"; |
| 367 | pinctrl-0 = <&pinctrl_lpspi3>; |
| 368 | status = "okay"; |
| 369 | |
| 370 | spidev0: spi@0 { |
| 371 | reg = <0>; |
| 372 | compatible = "rohm,dh2228fv"; |
| 373 | spi-max-frequency = <1000000>; |
| 374 | }; |
| 375 | }; |
| 376 | |
| 377 | &mipi_dsi { |
| 378 | pinctrl-names = "default"; |
| 379 | pinctrl-0 = <&pinctrl_mipi_dsi_reset>; |
| 380 | lcd_panel = "TRULY-WVGA-TFT3P5581E"; |
| 381 | resets = <&mipi_dsi_reset>; |
| 382 | status = "okay"; |
| 383 | }; |
| 384 | |
| 385 | &lpuart4 { /* console */ |
| 386 | pinctrl-names = "default"; |
| 387 | pinctrl-0 = <&pinctrl_lpuart4>; |
| 388 | status = "okay"; |
| 389 | }; |
| 390 | |
| 391 | &lpuart6 { /* BT */ |
| 392 | pinctrl-names = "default"; |
| 393 | pinctrl-0 = <&pinctrl_lpuart6>; |
| 394 | status = "okay"; |
| 395 | }; |
| 396 | |
| 397 | &lpuart7 { /* Uart test */ |
| 398 | pinctrl-names = "default"; |
| 399 | pinctrl-0 = <&pinctrl_lpuart7>; |
| 400 | status = "disabled"; |
| 401 | }; |
| 402 | |
| 403 | &rpmsg{ |
| 404 | status = "okay"; |
| 405 | }; |
| 406 | |
| 407 | &usbotg1 { |
| 408 | vbus-supply = <®_usb_otg1_vbus>; |
| 409 | extcon = <0>, <&extcon_usb1>; |
| 410 | srp-disable; |
| 411 | hnp-disable; |
| 412 | adp-disable; |
| 413 | status = "okay"; |
| 414 | }; |
| 415 | |
| 416 | &usdhc0 { |
| 417 | pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; |
| 418 | pinctrl-0 = <&pinctrl_usdhc0>; |
| 419 | pinctrl-1 = <&pinctrl_usdhc0>; |
| 420 | pinctrl-2 = <&pinctrl_usdhc0>; |
| 421 | pinctrl-3 = <&pinctrl_usdhc0>; |
| 422 | cd-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; |
| 423 | vmmc-supply = <®_vsd_3v3>; |
| 424 | vqmmc-supply = <&vldo2_reg>; |
| 425 | status = "okay"; |
| 426 | }; |