blob: 09a2353e7d93f26f730e5691507941ca62c22f93 [file] [log] [blame]
Mike Frysinger84a9dda2008-10-12 21:32:52 -04001/*
2 * U-boot - main board file
3 *
4 * Copyright (c) 2008-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <common.h>
10#include <config.h>
11#include <command.h>
12#include <net.h>
13#include <netdev.h>
14#include <spi.h>
15#include <asm/blackfin.h>
16#include <asm/net.h>
Mike Frysinger032c44e2010-06-02 19:29:23 -040017#include <asm/portmux.h>
Mike Frysinger84a9dda2008-10-12 21:32:52 -040018#include <asm/mach-common/bits/otp.h>
Cliff Caie54c8202009-11-20 08:24:43 +000019#include <asm/sdh.h>
Mike Frysinger84a9dda2008-10-12 21:32:52 -040020
21DECLARE_GLOBAL_DATA_PTR;
22
23int checkboard(void)
24{
25 printf("Board: ADI BF518F EZ-Board board\n");
26 printf(" Support: http://blackfin.uclinux.org/\n");
27 return 0;
28}
29
Mike Frysinger84a9dda2008-10-12 21:32:52 -040030#if defined(CONFIG_BFIN_MAC)
31static void board_init_enetaddr(uchar *mac_addr)
32{
Mike Frysinger03feb8e2011-03-17 17:14:14 -040033#ifdef CONFIG_SYS_NO_FLASH
34# define USE_MAC_IN_FLASH 0
35#else
36# define USE_MAC_IN_FLASH 1
37#endif
Mike Frysinger84a9dda2008-10-12 21:32:52 -040038 bool valid_mac = false;
39
Mike Frysinger03feb8e2011-03-17 17:14:14 -040040 if (USE_MAC_IN_FLASH) {
41 /* we cram the MAC in the last flash sector */
42 uchar *board_mac_addr = (uchar *)0x203F0096;
43 if (is_valid_ether_addr(board_mac_addr)) {
44 memcpy(mac_addr, board_mac_addr, 6);
Mike Frysinger84a9dda2008-10-12 21:32:52 -040045 valid_mac = true;
Mike Frysinger03feb8e2011-03-17 17:14:14 -040046 }
Mike Frysinger84a9dda2008-10-12 21:32:52 -040047 }
Mike Frysinger84a9dda2008-10-12 21:32:52 -040048
49 if (!valid_mac) {
50 puts("Warning: Generating 'random' MAC address\n");
51 bfin_gen_rand_mac(mac_addr);
52 }
53
54 eth_setenv_enetaddr("ethaddr", mac_addr);
55}
56
Mike Frysingerf57689e2010-12-03 00:31:48 -050057/* Only the first run of boards had a KSZ switch */
58#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
59# define KSZ_POSSIBLE 1
60#else
61# define KSZ_POSSIBLE 0
62#endif
63
Graf Yangf8ddcd52009-05-05 02:26:27 -040064#define KSZ_MAX_HZ 5000000
65
66#define KSZ_WRITE 0x02
67#define KSZ_READ 0x03
68
Mike Frysinger0c929422009-05-29 18:00:16 -040069#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
Graf Yangf8ddcd52009-05-05 02:26:27 -040070#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
71#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
72#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
73
74static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
Wolfgang Denke26ad0e2009-05-15 22:32:57 +020075 uchar data, uchar result[3])
Graf Yangf8ddcd52009-05-05 02:26:27 -040076{
77 unsigned char dout[3] = { dir, reg, data, };
78 return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
79}
80
81static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
82{
83 unsigned char din[3];
84 return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
85}
86
Mike Frysinger0c929422009-05-29 18:00:16 -040087static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
88{
89 int ret;
90 unsigned char din[3];
91 ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
92 return ret ? ret : din[2];
93}
94
Graf Yangf8ddcd52009-05-05 02:26:27 -040095static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
96{
Mike Frysinger0c929422009-05-29 18:00:16 -040097 return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
Graf Yangf8ddcd52009-05-05 02:26:27 -040098}
99
100static int ksz8893m_reset(struct spi_slave *slave)
101{
102 int ret = 0;
103
104 /* Disable STPID mode */
105 ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
106
107 /* Disable VLAN tag insert on Port3 */
108 ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
109
110 /* Start switch */
111 ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
112
113 return ret;
114}
115
Mike Frysingerf57689e2010-12-03 00:31:48 -0500116static bool board_ksz_init(void)
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400117{
Mike Frysingerf57689e2010-12-03 00:31:48 -0500118 static bool switch_is_alive = false;
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400119
120 if (!switch_is_alive) {
Graf Yangf8ddcd52009-05-05 02:26:27 -0400121 struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400122 if (slave) {
123 if (!spi_claim_bus(slave)) {
Mike Frysingerf57689e2010-12-03 00:31:48 -0500124 bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
125 int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
Mike Frysinger0c929422009-05-29 18:00:16 -0400126 switch_is_alive = (ret == 0);
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400127 spi_release_bus(slave);
128 }
129 spi_free_slave(slave);
130 }
131 }
132
Mike Frysingerf57689e2010-12-03 00:31:48 -0500133 return switch_is_alive;
134}
135
136int board_eth_init(bd_t *bis)
137{
138 if (KSZ_POSSIBLE) {
139 if (!board_ksz_init())
140 return 0;
141 }
142 return bfin_EMAC_initialize(bis);
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400143}
144#endif
145
146int misc_init_r(void)
147{
148#ifdef CONFIG_BFIN_MAC
149 uchar enetaddr[6];
150 if (!eth_getenv_enetaddr("ethaddr", enetaddr))
151 board_init_enetaddr(enetaddr);
152#endif
153
Mike Frysinger03feb8e2011-03-17 17:14:14 -0400154#ifndef CONFIG_SYS_NO_FLASH
155 /* we use the last sector for the MAC address / POST LDR */
156 extern flash_info_t flash_info[];
157 flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
158#endif
159
Mike Frysinger84a9dda2008-10-12 21:32:52 -0400160 return 0;
161}
Graf Yangab687902009-05-24 02:34:34 -0400162
163int board_early_init_f(void)
164{
Mike Frysinger032c44e2010-06-02 19:29:23 -0400165 /* connect async banks by default */
166 const unsigned short pins[] = {
167 P_AMS2, P_AMS3, 0,
168 };
169 return peripheral_request_list(pins, "async");
Graf Yangab687902009-05-24 02:34:34 -0400170}
Cliff Caie54c8202009-11-20 08:24:43 +0000171
172#ifdef CONFIG_BFIN_SDH
173int board_mmc_init(bd_t *bis)
174{
175 return bfin_mmc_init(bis);
176}
177#endif