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Marek Vasut6375dad2010-07-19 11:23:07 +02001/*
2 * Palm LifeDrive configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
25/*
26 * High Level Board Configuration Options
27 */
Marek Vasutabc20ab2011-11-26 07:20:07 +010028#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
Marek Vasut6375dad2010-07-19 11:23:07 +020029#define CONFIG_PALMLD 1 /* Palm LifeDrive board */
30
31/*
32 * Environment settings
33 */
34#define CONFIG_ENV_OVERWRITE
35#define CONFIG_SYS_MALLOC_LEN (128*1024)
Marek Vasutd2942ee2010-10-20 21:04:13 +020036#define CONFIG_SYS_TEXT_BASE 0x0
Marek Vasut6375dad2010-07-19 11:23:07 +020037
38#define CONFIG_BOOTCOMMAND \
39 "if mmcinfo && fatload mmc 0 0xa0000000 uboot.script ; then " \
40 "source 0xa0000000; " \
41 "else " \
42 "bootm 0x0x60000; " \
43 "fi; "
44#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,9600"
45#define CONFIG_TIMESTAMP
46#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
47#define CONFIG_CMDLINE_TAG
48#define CONFIG_SETUP_MEMORY_TAGS
49
50#define CONFIG_LZMA /* LZMA compression support */
51
52/*
53 * Serial Console Configuration
54 */
55#define CONFIG_PXA_SERIAL
56#define CONFIG_FFUART 1
57#define CONFIG_BAUDRATE 9600
58#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
59
60/*
61 * Bootloader Components Configuration
62 */
63#include <config_cmd_default.h>
64
65#undef CONFIG_CMD_NET
Sebastien Carlier6d8962e2010-11-05 15:48:07 +010066#undef CONFIG_CMD_NFS
Marek Vasut6375dad2010-07-19 11:23:07 +020067#define CONFIG_CMD_ENV
68#undef CONFIG_CMD_IMLS
69#define CONFIG_CMD_MMC
70#define CONFIG_CMD_IDE
71#define CONFIG_LCD
72
73/*
74 * MMC Card Configuration
75 */
76#ifdef CONFIG_CMD_MMC
77#define CONFIG_MMC
78#define CONFIG_GENERIC_MMC
79#define CONFIG_PXA_MMC_GENERIC
80#define CONFIG_SYS_MMC_BASE 0xF0000000
81#define CONFIG_CMD_FAT
82#define CONFIG_CMD_EXT2
83#define CONFIG_DOS_PARTITION
84#endif
85
86/*
87 * LCD
88 */
89#ifdef CONFIG_LCD
90#define CONFIG_LQ038J7DH53
91#define CONFIG_VIDEO_LOGO
92#define CONFIG_CMD_BMP
93#define CONFIG_SPLASH_SCREEN
94#define CONFIG_SPLASH_SCREEN_ALIGN
95#define CONFIG_VIDEO_BMP_GZIP
96#define CONFIG_VIDEO_BMP_RLE8
97#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
98#endif
99
100/*
101 * KGDB
102 */
103#ifdef CONFIG_CMD_KGDB
104#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
105#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
106#endif
107
108/*
109 * HUSH Shell Configuration
110 */
111#define CONFIG_SYS_HUSH_PARSER 1
112#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
113
114#define CONFIG_SYS_LONGHELP
115#ifdef CONFIG_SYS_HUSH_PARSER
116#define CONFIG_SYS_PROMPT "$ "
117#else
118#define CONFIG_SYS_PROMPT "=> "
119#endif
120#define CONFIG_SYS_CBSIZE 256
121#define CONFIG_SYS_PBSIZE \
122 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
123#define CONFIG_SYS_MAXARGS 16
124#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125#define CONFIG_SYS_DEVICE_NULLDEV 1
126
127/*
128 * Clock Configuration
129 */
130#undef CONFIG_SYS_CLKS_IN_HZ
131#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
132#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
133
134/*
135 * Stack sizes
136 */
137#define CONFIG_STACKSIZE (128*1024) /* regular stack */
138#ifdef CONFIG_USE_IRQ
139#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
140#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
141#endif
142
143/*
144 * DRAM Map
145 */
146#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
147#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
148#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
149
150#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
151#define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
152
153#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
154#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
155
156#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
157
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200158#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200159#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200160
Marek Vasut6375dad2010-07-19 11:23:07 +0200161/*
162 * NOR FLASH
163 */
164#ifdef CONFIG_CMD_FLASH
165#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
166#define PHYS_FLASH_SIZE 0x00080000 /* 512 KB */
167#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
168
169#define CONFIG_SYS_FLASH_CFI
170#define CONFIG_FLASH_CFI_DRIVER 1
171
172#define CONFIG_FLASH_CFI_LEGACY
173#define CONFIG_SYS_FLASH_LEGACY_512Kx16
174
175#define CONFIG_SYS_MONITOR_BASE 0
176#define CONFIG_SYS_MONITOR_LEN 0x40000
177
178#define CONFIG_SYS_MAX_FLASH_BANKS 1
179#define CONFIG_SYS_MAX_FLASH_SECT 256
180
181#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
182
183#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
184#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
185#define CONFIG_SYS_FLASH_LOCK_TOUT (25*CONFIG_SYS_HZ)
186#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25*CONFIG_SYS_HZ)
187#define CONFIG_SYS_FLASH_PROTECTION
188
189#define CONFIG_ENV_IS_IN_FLASH 1
190#define CONFIG_ENV_SECT_SIZE 0x10000
191#else
192#define CONFIG_SYS_NO_FLASH
193#define CONFIG_ENV_IS_NOWHERE
194#endif
195
196#define CONFIG_ENV_ADDR 0x40000
197#define CONFIG_ENV_SIZE 0x4000
198
199/*
200 * IDE
201 */
202#ifdef CONFIG_CMD_IDE
203#define CONFIG_LBA48
204#undef CONFIG_IDE_LED
205#undef CONFIG_IDE_RESET
206
207#define __io
208
209#define CONFIG_SYS_IDE_MAXBUS 1
210#define CONFIG_SYS_IDE_MAXDEVICE 1
211
212#define CONFIG_SYS_ATA_BASE_ADDR 0x20000000
213#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
214
215#define CONFIG_SYS_ATA_DATA_OFFSET 0x10
216#define CONFIG_SYS_ATA_REG_OFFSET 0x10
217#define CONFIG_SYS_ATA_ALT_OFFSET 0x10
218
219#define CONFIG_SYS_ATA_STRIDE 1
220#endif
221
222/*
223 * GPIO settings
224 */
225#define CONFIG_SYS_GAFR0_L_VAL 0x00000000
226#define CONFIG_SYS_GAFR0_U_VAL 0xa5180012
227#define CONFIG_SYS_GAFR1_L_VAL 0x69988056
228#define CONFIG_SYS_GAFR1_U_VAL 0xaaa580aa
229#define CONFIG_SYS_GAFR2_L_VAL 0x6aaaaaaa
230#define CONFIG_SYS_GAFR2_U_VAL 0x01040001
231#define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
232#define CONFIG_SYS_GAFR3_U_VAL 0x00000009
233#define CONFIG_SYS_GPCR0_VAL 0x00000000
234#define CONFIG_SYS_GPCR1_VAL 0x00000000
235#define CONFIG_SYS_GPCR2_VAL 0x00000000
236#define CONFIG_SYS_GPCR3_VAL 0x00000000
237#define CONFIG_SYS_GPDR0_VAL 0xc26b0000
238#define CONFIG_SYS_GPDR1_VAL 0xfcdfaa93
239#define CONFIG_SYS_GPDR2_VAL 0x7bbaffff
240#define CONFIG_SYS_GPDR3_VAL 0x006ff38d
241#define CONFIG_SYS_GPSR0_VAL 0x0d9e45ee
242#define CONFIG_SYS_GPSR1_VAL 0x03affdae
243#define CONFIG_SYS_GPSR2_VAL 0x07554000
244#define CONFIG_SYS_GPSR3_VAL 0x01bc0785
245
246#define CONFIG_SYS_PSSR_VAL 0x30
247
248/*
249 * Clock settings
250 */
251#define CONFIG_SYS_CKEN 0x01ffffff
252#define CONFIG_SYS_CCCR 0x02000210
253
254/*
255 * Memory settings
256 */
257#define CONFIG_SYS_MSC0_VAL 0x7ff844c8
258#define CONFIG_SYS_MSC1_VAL 0x7ff86ab4
259#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8
260#define CONFIG_SYS_MDCNFG_VAL 0x0B880acd
261#define CONFIG_SYS_MDREFR_VAL 0x201fa031
262#define CONFIG_SYS_MDMRS_VAL 0x00320032
263#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
264#define CONFIG_SYS_SXCNFG_VAL 0x40044004
265
266/*
267 * PCMCIA and CF Interfaces
268 */
269#define CONFIG_SYS_MECR_VAL 0x00000003
270#define CONFIG_SYS_MCMEM0_VAL 0x0001c391
271#define CONFIG_SYS_MCMEM1_VAL 0x0001c391
272#define CONFIG_SYS_MCATT0_VAL 0x0001c391
273#define CONFIG_SYS_MCATT1_VAL 0x0001c391
274#define CONFIG_SYS_MCIO0_VAL 0x00014611
275#define CONFIG_SYS_MCIO1_VAL 0x0001c391
276
277#endif /* __CONFIG_H */