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Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001/*-
2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
Remy Böhmerc0d722f2008-12-13 22:51:58 +01003 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01004 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef USB_EHCI_H
23#define USB_EHCI_H
24
Remy Böhmerc0d722f2008-12-13 22:51:58 +010025#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
26#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
27#endif
28
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010029/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
30#define DeviceRequest \
31 ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
michaeldb632992008-12-10 17:55:19 +010032
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010033#define DeviceOutRequest \
34 ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
35
36#define InterfaceRequest \
37 ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
38
39#define EndpointRequest \
40 ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
michaeldb632992008-12-10 17:55:19 +010041
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010042#define EndpointOutRequest \
43 ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
44
45/*
46 * Register Space.
47 */
48struct ehci_hccr {
michaeldb632992008-12-10 17:55:19 +010049 uint32_t cr_capbase;
50#define HC_LENGTH(p) (((p) >> 0) & 0x00ff)
51#define HC_VERSION(p) (((p) >> 16) & 0xffff)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010052 uint32_t cr_hcsparams;
Remy Böhmerc0d722f2008-12-13 22:51:58 +010053#define HCS_PPC(p) ((p) & (1 << 4))
54#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* Port indicators */
michael51ab1422008-12-11 13:43:55 +010055#define HCS_N_PORTS(p) (((p) >> 0) & 0xf)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010056 uint32_t cr_hccparams;
57 uint8_t cr_hcsp_portrt[8];
Remy Böhmerc0d722f2008-12-13 22:51:58 +010058} __attribute__ ((packed));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010059
60struct ehci_hcor {
61 uint32_t or_usbcmd;
michael51ab1422008-12-11 13:43:55 +010062#define CMD_PARK (1 << 11) /* enable "park" */
63#define CMD_PARK_CNT(c) (((c) >> 8) & 3) /* how many transfers to park */
64#define CMD_ASE (1 << 5) /* async schedule enable */
65#define CMD_LRESET (1 << 7) /* partial reset */
66#define CMD_IAAD (1 << 5) /* "doorbell" interrupt */
67#define CMD_PSE (1 << 4) /* periodic schedule enable */
68#define CMD_RESET (1 << 1) /* reset HC not bus */
69#define CMD_RUN (1 << 0) /* start/stop HC */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010070 uint32_t or_usbsts;
michaeldb632992008-12-10 17:55:19 +010071#define STD_ASS (1 << 15)
michael51ab1422008-12-11 13:43:55 +010072#define STS_HALT (1 << 12)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010073 uint32_t or_usbintr;
74 uint32_t or_frindex;
75 uint32_t or_ctrldssegment;
76 uint32_t or_periodiclistbase;
77 uint32_t or_asynclistaddr;
78 uint32_t _reserved_[9];
79 uint32_t or_configflag;
michael51ab1422008-12-11 13:43:55 +010080#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
Remy Böhmerc0d722f2008-12-13 22:51:58 +010081 uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010082 uint32_t or_systune;
Remy Böhmerc0d722f2008-12-13 22:51:58 +010083} __attribute__ ((packed));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010084
michael51ab1422008-12-11 13:43:55 +010085#define USBMODE 0x68 /* USB Device mode */
86#define USBMODE_SDIS (1 << 3) /* Stream disable */
87#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */
88#define USBMODE_CM_HC (3 << 0) /* host controller mode */
89#define USBMODE_CM_IDLE (0 << 0) /* idle state */
90
michaeldb632992008-12-10 17:55:19 +010091/* Interface descriptor */
92struct usb_linux_interface_descriptor {
93 unsigned char bLength;
94 unsigned char bDescriptorType;
95 unsigned char bInterfaceNumber;
96 unsigned char bAlternateSetting;
97 unsigned char bNumEndpoints;
98 unsigned char bInterfaceClass;
99 unsigned char bInterfaceSubClass;
100 unsigned char bInterfaceProtocol;
101 unsigned char iInterface;
102} __attribute__ ((packed));
103
104/* Configuration descriptor information.. */
105struct usb_linux_config_descriptor {
106 unsigned char bLength;
107 unsigned char bDescriptorType;
108 unsigned short wTotalLength;
109 unsigned char bNumInterfaces;
110 unsigned char bConfigurationValue;
111 unsigned char iConfiguration;
112 unsigned char bmAttributes;
113 unsigned char MaxPower;
114} __attribute__ ((packed));
115
116#if defined CONFIG_EHCI_DESC_BIG_ENDIAN
michael51ab1422008-12-11 13:43:55 +0100117#define ehci_readl(x) (*((volatile u32 *)(x)))
118#define ehci_writel(a, b) (*((volatile u32 *)(a)) = ((volatile u32)b))
michaeldb632992008-12-10 17:55:19 +0100119#else
michael51ab1422008-12-11 13:43:55 +0100120#define ehci_readl(x) cpu_to_le32((*((volatile u32 *)(x))))
121#define ehci_writel(a, b) (*((volatile u32 *)(a)) = \
122 cpu_to_le32(((volatile u32)b)))
michaeldb632992008-12-10 17:55:19 +0100123#endif
124
125#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
126#define hc32_to_cpu(x) be32_to_cpu((x))
127#define cpu_to_hc32(x) cpu_to_be32((x))
128#else
129#define hc32_to_cpu(x) le32_to_cpu((x))
130#define cpu_to_hc32(x) cpu_to_le32((x))
131#endif
132
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100133#define EHCI_PS_WKOC_E (1 << 22) /* RW wake on over current */
134#define EHCI_PS_WKDSCNNT_E (1 << 21) /* RW wake on disconnect */
135#define EHCI_PS_WKCNNT_E (1 << 20) /* RW wake on connect */
136#define EHCI_PS_PO (1 << 13) /* RW port owner */
137#define EHCI_PS_PP (1 << 12) /* RW,RO port power */
138#define EHCI_PS_LS (3 << 10) /* RO line status */
139#define EHCI_PS_PR (1 << 8) /* RW port reset */
140#define EHCI_PS_SUSP (1 << 7) /* RW suspend */
141#define EHCI_PS_FPR (1 << 6) /* RW force port resume */
142#define EHCI_PS_OCC (1 << 5) /* RWC over current change */
143#define EHCI_PS_OCA (1 << 4) /* RO over current active */
144#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */
145#define EHCI_PS_PE (1 << 2) /* RW port enable */
146#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */
147#define EHCI_PS_CS (1 << 0) /* RO connect status */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100148#define EHCI_PS_CLEAR (EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
149
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100150#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == (1 << 10))
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100151
152/*
153 * Schedule Interface Space.
154 *
155 * IMPORTANT: Software must ensure that no interface data structure
156 * reachable by the EHCI host controller spans a 4K page boundary!
157 *
158 * Periodic transfers (i.e. isochronous and interrupt transfers) are
159 * not supported.
160 */
161
162/* Queue Element Transfer Descriptor (qTD). */
163struct qTD {
164 uint32_t qt_next;
165#define QT_NEXT_TERMINATE 1
166 uint32_t qt_altnext;
167 uint32_t qt_token;
168 uint32_t qt_buffer[5];
169};
170
171/* Queue Head (QH). */
172struct QH {
173 uint32_t qh_link;
174#define QH_LINK_TERMINATE 1
175#define QH_LINK_TYPE_ITD 0
176#define QH_LINK_TYPE_QH 2
177#define QH_LINK_TYPE_SITD 4
178#define QH_LINK_TYPE_FSTN 6
179 uint32_t qh_endpt1;
180 uint32_t qh_endpt2;
181 uint32_t qh_curtd;
182 struct qTD qh_overlay;
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100183 /*
184 * Add dummy fill value to make the size of this struct
185 * aligned to 32 bytes
186 */
187 uint8_t fill[16];
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100188};
189
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100190/* Low level init functions */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100191int ehci_hcd_init(void);
192int ehci_hcd_stop(void);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100193
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100194#endif /* USB_EHCI_H */