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Neha Malcom Francis1ee652a2023-07-22 00:14:43 +05301.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Neha Francis <n-francis@ti.com>
3
4AM65x Platforms
5===============
6
7Introduction:
8-------------
9The AM65x family of SoCs is the first device family from K3 Multicore
10SoC architecture, targeted for broad market and industrial control with
11aim to meet the complex processing needs of modern embedded products.
12
13The device is built over three domains, each containing specific processing
14cores, voltage domains and peripherals:
15
161. Wake-up (WKUP) domain:
17 * Device Management and Security Controller (DMSC)
18
192. Microcontroller (MCU) domain:
20 * Dual Core ARM Cortex-R5F processor
21
223. MAIN domain:
23 * Quad core 64-bit ARM Cortex-A53
24
25More info can be found in TRM: http://www.ti.com/lit/pdf/spruid7
26
27Boot Flow:
28----------
29On AM65x family devices, ROM supports boot only via MCU(R5). This means that
30bootloader has to run on R5 core. In order to meet this constraint, and for
31the following reasons the boot flow is designed as mentioned:
32
331. Need to move away from R5 asap, so that we want to start *any*
34firmware on the R5 cores for example autosar can be loaded to receive CAN
35response and other safety operations to be started. This operation is
36very time critical and is applicable for all automotive use cases.
37
382. U-Boot on A53 should start other remotecores for various
39applications. This should happen before running Linux.
40
413. In production boot flow, we might not like to use full U-Boot,
42instead use Falcon boot flow to reduce boot time.
43
44.. code-block:: text
45
46 +------------------------------------------------------------------------+
47 | DMSC | R5 | A53 |
48 +------------------------------------------------------------------------+
49 | +--------+ | | |
50 | | Reset | | | |
51 | +--------+ | | |
52 | : | | |
53 | +--------+ | +-----------+ | |
54 | | *ROM* |----------|-->| Reset rls | | |
55 | +--------+ | +-----------+ | |
56 | | | | : | |
57 | | ROM | | : | |
58 | |services| | : | |
59 | | | | +-------------+ | |
60 | | | | | *R5 ROM* | | |
61 | | | | +-------------+ | |
62 | | |<---------|---|Load and auth| | |
63 | | | | | tiboot3.bin | | |
64 | | | | +-------------+ | |
65 | | | | : | |
66 | | | | : | |
67 | | | | : | |
68 | | | | +-------------+ | |
69 | | | | | *R5 SPL* | | |
70 | | | | +-------------+ | |
71 | | | | | Load | | |
72 | | | | | sysfw.itb | | |
73 | | Start | | +-------------+ | |
74 | | System |<---------|---| Start | | |
75 | |Firmware| | | SYSFW | | |
76 | +--------+ | +-------------+ | |
77 | : | | | | |
78 | +---------+ | | Load | | |
79 | | *SYSFW* | | | system | | |
80 | +---------+ | | Config data | | |
81 | | |<--------|---| | | |
82 | | | | +-------------+ | |
83 | | | | | | | |
84 | | | | | DDR | | |
85 | | | | | config | | |
86 | | | | +-------------+ | |
87 | | | | | | | |
88 | | |<--------|---| Start A53 | | |
89 | | | | | and Reset | | |
90 | | | | +-------------+ | |
91 | | | | | +-----------+ |
92 | | |---------|-----------------------|---->| Reset rls | |
93 | | | | | +-----------+ |
94 | | DMSC | | | : |
95 | |Services | | | +------------+ |
96 | | |<--------|-----------------------|---->|*ATF/OP-TEE*| |
97 | | | | | +------------+ |
98 | | | | | : |
99 | | | | | +-----------+ |
100 | | |<--------|-----------------------|---->| *A53 SPL* | |
101 | | | | | +-----------+ |
102 | | | | | | Load | |
103 | | | | | | u-boot.img| |
104 | | | | | +-----------+ |
105 | | | | | : |
106 | | | | | +-----------+ |
107 | | |<--------|-----------------------|---->| *U-Boot* | |
108 | | | | | +-----------+ |
109 | | | | | | prompt | |
110 | | | | | +-----------+ |
111 | +---------+ | | |
112 | | | |
113 +------------------------------------------------------------------------+
114
115- Here DMSC acts as master and provides all the critical services. R5/A53
116 requests DMSC to get these services done as shown in the above diagram.
117
118Sources:
119--------
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530120
Nishanth Menoncce3e7a2023-07-27 13:58:44 -0500121.. include:: k3.rst
122 :start-after: .. k3_rst_include_start_boot_sources
123 :end-before: .. k3_rst_include_end_boot_sources
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530124
125Build procedure:
126----------------
1271. Trusted Firmware-A:
128
129.. code-block:: bash
130
131 $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 \
132 TARGET_BOARD=generic SPD=opteed
133
1342. OP-TEE:
135
136.. code-block:: bash
137
138 $ make PLATFORM=k3-am65x CFG_ARM64_core=y
139
1403. U-Boot:
141
142* 4.1 R5:
143
144.. code-block:: bash
145
146 $ make am65x_evm_r5_defconfig
147 $ make CROSS_COMPILE=arm-linux-gnueabihf- \
148 BINMAN_INDIRS=<path/to/ti-linux-firmware>
149
150* 4.2 A53:
151
152.. code-block:: bash
153
154 $ make am65x_evm_a53_defconfig
155 $ make CROSS_COMPILE=aarch64-linux-gnu- \
156 BL31=<path/to/trusted-firmware-a/dir>/build/k3/generic/release/bl31.bin \
157 TEE=<path/to/optee_os/dir>/out/arm-plat-k3/core/tee-raw.bin \
158 BINMAN_INDIRS=<path/to/ti-linux-firmware>
159
160Target Images
161--------------
Tom Rinif687c8f2023-07-25 12:44:16 -0400162In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img.
163Each SoC variant (GP and HS) requires a different source for these files.
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530164
165- GP
166
167 * tiboot3-am65x_sr2-gp-evm.bin, sysfw-am65x_sr2-gp-evm.itb from step 4.1
168 * tispl.bin_unsigned, u-boot.img_unsigned from step 4.2
169
170- HS
171
172 * tiboot3-am65x_sr2-hs-evm.bin, sysfw-am65x_sr2-hs-evm.itb from step 4.1
173 * tispl.bin, u-boot.img from step 4.2
174
175Image formats:
176--------------
177
178- tiboot3.bin:
179
180.. code-block:: text
181
182 +-----------------------+
183 | X.509 |
184 | Certificate |
185 | +-------------------+ |
186 | | | |
187 | | R5 | |
188 | | u-boot-spl.bin | |
189 | | | |
190 | +-------------------+ |
191 | | | |
192 | | FIT header | |
193 | | +---------------+ | |
194 | | | | | |
195 | | | DTB 1...N | | |
196 | | +---------------+ | |
197 | +-------------------+ |
198 +-----------------------+
199
200- tispl.bin
201
202.. code-block:: text
203
204 +-----------------------+
205 | |
206 | FIT HEADER |
207 | +-------------------+ |
208 | | | |
209 | | A53 ATF | |
210 | +-------------------+ |
211 | | | |
212 | | A53 OP-TEE | |
213 | +-------------------+ |
214 | | | |
215 | | A53 SPL | |
216 | +-------------------+ |
217 | | | |
218 | | SPL DTB 1...N | |
219 | +-------------------+ |
220 +-----------------------+
221
222- sysfw.itb
223
224.. code-block:: text
225
226 +-----------------------+
227 | |
228 | FIT HEADER |
229 | +-------------------+ |
230 | | | |
231 | | sysfw.bin | |
232 | +-------------------+ |
233 | | | |
234 | | board config | |
235 | +-------------------+ |
236 | | | |
237 | | PM config | |
238 | +-------------------+ |
239 | | | |
240 | | RM config | |
241 | +-------------------+ |
242 | | | |
243 | | Secure config | |
244 | +-------------------+ |
245 +-----------------------+
246
247eMMC:
248-----
249ROM supports booting from eMMC from boot0 partition offset 0x0
250
251Flashing images to eMMC:
252
253The following commands can be used to download tiboot3.bin, tispl.bin,
254u-boot.img, and sysfw.itb from an SD card and write them to the eMMC boot0
255partition at respective addresses.
256
257.. code-block:: text
258
259 => mmc dev 0 1
260 => fatload mmc 1 ${loadaddr} tiboot3.bin
261 => mmc write ${loadaddr} 0x0 0x400
262 => fatload mmc 1 ${loadaddr} tispl.bin
263 => mmc write ${loadaddr} 0x400 0x1000
264 => fatload mmc 1 ${loadaddr} u-boot.img
265 => mmc write ${loadaddr} 0x1400 0x2000
266 => fatload mmc 1 ${loadaddr} sysfw.itb
267 => mmc write ${loadaddr} 0x3600 0x800
268
269To give the ROM access to the boot partition, the following commands must be
270used for the first time:
271
272.. code-block:: text
273
274 => mmc partconf 0 1 1 1
275 => mmc bootbus 0 1 0 0
276
277To create a software partition for the rootfs, the following command can be
278used:
279
280.. code-block:: text
281
282 => gpt write mmc 0 ${partitions}
283
284eMMC layout:
285
286.. code-block:: text
287
288 boot0 partition (8 MB) user partition
289 0x0+----------------------------------+ 0x0+-------------------------+
290 | tiboot3.bin (512 KB) | | |
291 0x400+----------------------------------+ | |
292 | tispl.bin (2 MB) | | |
293 0x1400+----------------------------------+ | rootfs |
294 | u-boot.img (4 MB) | | |
295 0x3400+----------------------------------+ | |
296 | environment (128 KB) | | |
297 0x3500+----------------------------------+ | |
298 | backup environment (128 KB) | | |
299 0x3600+----------------------------------+ | |
300 | sysfw (1 MB) | | |
301 0x3E00+----------------------------------+ +-------------------------+
302
303Kernel image and DT are expected to be present in the /boot folder of rootfs.
304To boot kernel from eMMC, use the following commands:
305
306.. code-block:: text
307
308 => setenv mmcdev 0
309 => setenv bootpart 0
310 => boot
311
312OSPI:
313-----
314ROM supports booting from OSPI from offset 0x0.
315
316Flashing images to OSPI:
317
318Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
319and sysfw.itb over tftp and then flash those to OSPI at their respective
320addresses.
321
322.. code-block:: text
323
324 => sf probe
325 => tftp ${loadaddr} tiboot3.bin
326 => sf update $loadaddr 0x0 $filesize
327 => tftp ${loadaddr} tispl.bin
328 => sf update $loadaddr 0x80000 $filesize
329 => tftp ${loadaddr} u-boot.img
330 => sf update $loadaddr 0x280000 $filesize
331 => tftp ${loadaddr} sysfw.itb
332 => sf update $loadaddr 0x6C0000 $filesize
333
334Flash layout for OSPI:
335
336.. code-block:: text
337
338 0x0 +----------------------------+
339 | ospi.tiboot3(512K) |
340 | |
341 0x80000 +----------------------------+
342 | ospi.tispl(2M) |
343 | |
344 0x280000 +----------------------------+
345 | ospi.u-boot(4M) |
346 | |
347 0x680000 +----------------------------+
348 | ospi.env(128K) |
349 | |
350 0x6A0000 +----------------------------+
351 | ospi.env.backup (128K) |
352 | |
353 0x6C0000 +----------------------------+
354 | ospi.sysfw(1M) |
355 | |
356 0x7C0000 +----------------------------+
357 | padding (256k) |
358 0x800000 +----------------------------+
359 | ospi.rootfs(UBIFS) |
360 | |
361 +----------------------------+
362
363Kernel Image and DT are expected to be present in the /boot folder of UBIFS
364ospi.rootfs just like in SD card case. U-Boot looks for UBI volume named
365"rootfs" for rootfs.
366
367To boot kernel from OSPI, at the U-Boot prompt:
368
369.. code-block:: text
370
371 => setenv boot ubi
372 => boot
373
374UART:
375-----
376ROM supports booting from MCU_UART0 via X-Modem protocol. The entire UART-based
377boot process up to U-Boot (proper) prompt goes through different stages and uses
378different UART peripherals as follows:
379
380.. code-block:: text
381
382 +---------+---------------+-------------+------------+
383 | WHO | Loading WHAT | HW Module | Protocol |
384 +---------+---------------+-------------+------------+
385 |Boot ROM | tiboot3.bin | MCU_UART0 | X-Modem(*)|
386 |R5 SPL | sysfw.itb | MCU_UART0 | Y-Modem(*)|
387 |R5 SPL | tispl.bin | MAIN_UART0 | Y-Modem |
388 |A53 SPL | u-boot.img | MAIN_UART0 | Y-Modem |
389 +---------+---------------+-------------+------------+
390
391Note that in addition to X/Y-Modem related protocol timeouts the DMSC
392watchdog timeout of 3min (typ.) needs to be observed until System Firmware
393is fully loaded (from sysfw.itb) and started.
394
395Example bash script sequence for running on a Linux host PC feeding all boot
396artifacts needed to the device:
397
398.. code-block:: text
399
400 MCU_DEV=/dev/ttyUSB1
401 MAIN_DEV=/dev/ttyUSB0
402
403 stty -F $MCU_DEV 115200 cs8 -cstopb -parenb
404 stty -F $MAIN_DEV 115200 cs8 -cstopb -parenb
405
406 sb --xmodem tiboot3.bin > $MCU_DEV < $MCU_DEV
407 sb --ymodem sysfw.itb > $MCU_DEV < $MCU_DEV
408 sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV
409 sleep 1
410 sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV