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TsiChungLiew8ae158c2007-08-16 15:05:11 -05001/*
2 *
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang198cafb2012-03-26 21:49:08 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew8ae158c2007-08-16 15:05:11 -05007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew8ae158c2007-08-16 15:05:11 -050010 */
11
12#include <common.h>
13#include <watchdog.h>
14#include <command.h>
Ben Warren89973f82008-08-31 22:22:04 -070015#include <netdev.h>
TsiChungLiew8ae158c2007-08-16 15:05:11 -050016
17#include <asm/immap.h>
Alison Wang198cafb2012-03-26 21:49:08 +000018#include <asm/io.h>
TsiChungLiew8ae158c2007-08-16 15:05:11 -050019
20DECLARE_GLOBAL_DATA_PTR;
21
Mike Frysinger882b7d72010-10-20 03:41:17 -040022int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
TsiChungLiew8ae158c2007-08-16 15:05:11 -050023{
Alison Wang198cafb2012-03-26 21:49:08 +000024 rcm_t *rcm = (rcm_t *) (MMAP_RCM);
TsiChungLiew8ae158c2007-08-16 15:05:11 -050025 udelay(1000);
Alison Wang45370e12012-10-18 19:25:51 +000026 out_8(&rcm->rcr, RCM_RCR_FRCRSTOUT);
27 udelay(10000);
Alison Wang198cafb2012-03-26 21:49:08 +000028 setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
TsiChungLiew8ae158c2007-08-16 15:05:11 -050029
30 /* we don't return! */
31 return 0;
32};
33
34int checkcpu(void)
35{
Alison Wang198cafb2012-03-26 21:49:08 +000036 ccm_t *ccm = (ccm_t *) MMAP_CCM;
TsiChungLiew8ae158c2007-08-16 15:05:11 -050037 u16 msk;
38 u16 id = 0;
39 u8 ver;
40
41 puts("CPU: ");
Alison Wang198cafb2012-03-26 21:49:08 +000042 msk = (in_be16(&ccm->cir) >> 6);
43 ver = (in_be16(&ccm->cir) & 0x003f);
TsiChungLiew8ae158c2007-08-16 15:05:11 -050044 switch (msk) {
45 case 0x48:
46 id = 54455;
47 break;
48 case 0x49:
49 id = 54454;
50 break;
51 case 0x4a:
52 id = 54453;
53 break;
54 case 0x4b:
55 id = 54452;
56 break;
57 case 0x4d:
58 id = 54451;
59 break;
60 case 0x4f:
61 id = 54450;
62 break;
Alison Wang45370e12012-10-18 19:25:51 +000063 case 0x9F:
64 id = 54410;
65 break;
66 case 0xA0:
67 id = 54415;
68 break;
69 case 0xA1:
70 id = 54416;
71 break;
72 case 0xA2:
73 id = 54417;
74 break;
75 case 0xA3:
76 id = 54418;
77 break;
TsiChungLiew8ae158c2007-08-16 15:05:11 -050078 }
79
80 if (id) {
Wolfgang Denk08ef89e2008-10-19 02:35:49 +020081 char buf1[32], buf2[32], buf3[32];
82
TsiChungLiew8ae158c2007-08-16 15:05:11 -050083 printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
84 ver);
Wolfgang Denk08ef89e2008-10-19 02:35:49 +020085 printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
86 strmhz(buf1, gd->cpu_clk),
87 strmhz(buf2, gd->bus_clk),
Simon Glass7e2592f2012-12-13 20:49:07 +000088 strmhz(buf3, gd->arch.flb_clk));
TsiChungLiew8ae158c2007-08-16 15:05:11 -050089#ifdef CONFIG_PCI
Wolfgang Denk08ef89e2008-10-19 02:35:49 +020090 printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
91 strmhz(buf1, gd->pci_clk),
Simon Glass7e2592f2012-12-13 20:49:07 +000092 strmhz(buf2, gd->arch.inp_clk),
93 strmhz(buf3, gd->arch.vco_clk));
TsiChungLiew8ae158c2007-08-16 15:05:11 -050094#else
Wolfgang Denk08ef89e2008-10-19 02:35:49 +020095 printf(" INP CLK %s MHz VCO CLK %s MHz\n",
Simon Glass7e2592f2012-12-13 20:49:07 +000096 strmhz(buf1, gd->arch.inp_clk),
97 strmhz(buf2, gd->arch.vco_clk));
TsiChungLiew8ae158c2007-08-16 15:05:11 -050098#endif
99 }
100
101 return 0;
102}
Ben Warren86882b82008-08-26 22:16:25 -0700103
104#if defined(CONFIG_MCFFEC)
105/* Default initializations for MCFFEC controllers. To override,
106 * create a board-specific function called:
107 * int board_eth_init(bd_t *bis)
108 */
109
Ben Warren86882b82008-08-26 22:16:25 -0700110int cpu_eth_init(bd_t *bis)
111{
112 return mcffec_initialize(bis);
113}
114#endif