| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y | ||||
| Tom Rini | 2bba780 | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" |
| Tom Rini | c9542ea | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 4 | CONFIG_SPL=y |
| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 5 | CONFIG_MACH_SUN50I=y |
| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 6 | CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y |
| 7 | CONFIG_DRAM_CLK=552 | ||||
| 8 | CONFIG_DRAM_ZQ=3881949 | ||||
| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 9 | CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |
| Tom Rini | c9542ea | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 10 | CONFIG_SPL_SPI_SUNXI=y |
| Tom Rini | f7d0ae9 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 11 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Andre Przywara | 69a0ea0 | 2021-07-12 11:06:51 +0100 | [diff] [blame] | 12 | CONFIG_SUPPORT_EMMC_BOOT=y |
| Tom Rini | 0be2ecd | 2019-11-07 14:25:00 -0500 | [diff] [blame] | 13 | CONFIG_SPI_FLASH_WINBOND=y |
| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 14 | CONFIG_SUN8I_EMAC=y |
| Andre Przywara | 81a46c1 | 2022-01-11 12:46:02 +0000 | [diff] [blame] | 15 | CONFIG_SPI=y |
| Icenowy Zheng | 8458062 | 2017-06-03 17:10:25 +0800 | [diff] [blame] | 16 | CONFIG_USB_EHCI_HCD=y |
| Tom Rini | 7ae2729 | 2019-02-07 14:53:03 -0500 | [diff] [blame] | 17 | CONFIG_USB_OHCI_HCD=y |