blob: 5a413f0ec7837f700f40524bf46de1595b32e180 [file] [log] [blame]
Eugeniy Paltsev15736e22019-02-25 18:35:28 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Synopsys DesignWare Multimedia Card Interface driver
4 * extensions used in various Synopsys ARC devboards.
5 *
6 * Copyright (C) 2019 Synopsys
7 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
8 */
9
10#include <common.h>
11#include <clk.h>
12#include <dm.h>
13#include <dwmmc.h>
14#include <errno.h>
15#include <fdtdec.h>
16#include <linux/libfdt.h>
17#include <linux/err.h>
18#include <malloc.h>
19
20#define CLOCK_MIN 400000 /* 400 kHz */
21#define FIFO_MIN 8
22#define FIFO_MAX 4096
23
24struct snps_dwmci_plat {
25 struct mmc_config cfg;
26 struct mmc mmc;
27};
28
29struct snps_dwmci_priv_data {
30 struct dwmci_host host;
31 u32 f_max;
32};
33
34static int snps_dwmmc_clk_setup(struct udevice *dev)
35{
36 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
37 struct dwmci_host *host = &priv->host;
38
39 struct clk clk_ciu, clk_biu;
40 int ret;
41
42 ret = clk_get_by_name(dev, "ciu", &clk_ciu);
43 if (ret)
44 goto clk_err;
45
46 ret = clk_enable(&clk_ciu);
47 if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
48 goto clk_err_ciu;
49
50 host->bus_hz = clk_get_rate(&clk_ciu);
51 if (host->bus_hz < CLOCK_MIN) {
52 ret = -EINVAL;
53 goto clk_err_ciu_dis;
54 }
55
56 ret = clk_get_by_name(dev, "biu", &clk_biu);
57 if (ret)
58 goto clk_err_ciu_dis;
59
60 ret = clk_enable(&clk_biu);
61 if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
62 goto clk_err_biu;
63
64 return 0;
65
66clk_err_biu:
67 clk_free(&clk_biu);
68clk_err_ciu_dis:
69 clk_disable(&clk_ciu);
70clk_err_ciu:
71 clk_free(&clk_ciu);
72clk_err:
73 dev_err(dev, "failed to setup clocks, ret %d\n", ret);
74
75 return ret;
76}
77
78static int snps_dwmmc_ofdata_to_platdata(struct udevice *dev)
79{
80 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
81 struct dwmci_host *host = &priv->host;
82 u32 fifo_depth;
83 int ret;
84
85 host->ioaddr = devfdt_get_addr_ptr(dev);
86
87 /*
88 * If fifo-depth is unset don't set fifoth_val - we will try to
89 * auto detect it.
90 */
91 ret = dev_read_u32(dev, "fifo-depth", &fifo_depth);
92 if (!ret) {
93 if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX)
94 return -EINVAL;
95
96 host->fifoth_val = MSIZE(0x2) |
97 RX_WMARK(fifo_depth / 2 - 1) |
98 TX_WMARK(fifo_depth / 2);
99 }
100
101 host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
102 if (host->buswidth != 1 && host->buswidth != 4 && host->buswidth != 8)
103 return -EINVAL;
104
105 /*
106 * If max-frequency is unset don't set priv->f_max - we will use
107 * host->bus_hz in probe() instead.
108 */
109 ret = dev_read_u32(dev, "max-frequency", &priv->f_max);
110 if (!ret && priv->f_max < CLOCK_MIN)
111 return -EINVAL;
112
113 host->fifo_mode = dev_read_bool(dev, "fifo-mode");
114 host->name = dev->name;
115 host->dev_index = 0;
116 host->priv = priv;
117
118 return 0;
119}
120
121int snps_dwmmc_getcd(struct udevice *dev)
122{
123 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
124 struct dwmci_host *host = &priv->host;
125
126 return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
127}
128
129struct dm_mmc_ops snps_dwmci_dm_ops;
130
131static int snps_dwmmc_probe(struct udevice *dev)
132{
133#ifdef CONFIG_BLK
134 struct snps_dwmci_plat *plat = dev_get_platdata(dev);
135#endif
136 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
137 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
138 struct dwmci_host *host = &priv->host;
139 unsigned int clock_max;
140 int ret;
141
142 /* Extend generic 'dm_dwmci_ops' with our 'getcd' implementation */
143 memcpy(&snps_dwmci_dm_ops, &dm_dwmci_ops, sizeof(struct dm_mmc_ops));
144 snps_dwmci_dm_ops.get_cd = snps_dwmmc_getcd;
145
146 ret = snps_dwmmc_clk_setup(dev);
147 if (ret)
148 return ret;
149
150 if (!priv->f_max)
151 clock_max = host->bus_hz;
152 else
153 clock_max = min_t(unsigned int, host->bus_hz, priv->f_max);
154
155#ifdef CONFIG_BLK
156 dwmci_setup_cfg(&plat->cfg, host, clock_max, CLOCK_MIN);
157 host->mmc = &plat->mmc;
158#else
159 ret = add_dwmci(host, clock_max, CLOCK_MIN);
160 if (ret)
161 return ret;
162#endif
163 host->mmc->priv = &priv->host;
164 upriv->mmc = host->mmc;
165 host->mmc->dev = dev;
166
167 return dwmci_probe(dev);
168}
169
170static int snps_dwmmc_bind(struct udevice *dev)
171{
172#ifdef CONFIG_BLK
173 struct snps_dwmci_plat *plat = dev_get_platdata(dev);
174 int ret;
175
176 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
177 if (ret)
178 return ret;
179#endif
180
181 return 0;
182}
183
184static const struct udevice_id snps_dwmmc_ids[] = {
185 { .compatible = "snps,dw-mshc" },
186 { }
187};
188
189U_BOOT_DRIVER(snps_dwmmc_drv) = {
190 .name = "snps_dw_mmc",
191 .id = UCLASS_MMC,
192 .of_match = snps_dwmmc_ids,
193 .ofdata_to_platdata = snps_dwmmc_ofdata_to_platdata,
194 .ops = &snps_dwmci_dm_ops,
195 .bind = snps_dwmmc_bind,
196 .probe = snps_dwmmc_probe,
197 .priv_auto_alloc_size = sizeof(struct snps_dwmci_priv_data),
198 .platdata_auto_alloc_size = sizeof(struct snps_dwmci_plat),
199};