blob: dc725c948137b7c935b4cfe1d84173af4982a866 [file] [log] [blame]
Kumar Gala26f4cdba2009-08-14 13:37:54 -05001/*
2 * Copyright 2009 Freescale Semiconductor, Inc.
3 *
4 * Kumar Gala <kumar.gala@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/* This file is intended to be included by other asm code since
26 * we will want to execute this on both the primary core when
27 * it does a bootm and the secondary core's that get released
28 * out of the spin table */
29
30#define SET_IVOR(vector_number, vector_offset) \
31 li r3,vector_offset@l; \
32 mtspr SPRN_IVOR##vector_number,r3;
33
34#define SET_GIVOR(vector_number, vector_offset) \
35 li r3,vector_offset@l; \
36 mtspr SPRN_GIVOR##vector_number,r3;
37
38 SET_IVOR(0, 0x020) /* Critical Input */
39 SET_IVOR(1, 0x000) /* Machine Check */
40 SET_IVOR(2, 0x060) /* Data Storage */
41 SET_IVOR(3, 0x080) /* Instruction Storage */
42 SET_IVOR(4, 0x0a0) /* External Input */
43 SET_IVOR(5, 0x0c0) /* Alignment */
44 SET_IVOR(6, 0x0e0) /* Program */
45 SET_IVOR(7, 0x100) /* FP Unavailable */
46 SET_IVOR(8, 0x120) /* System Call */
47 SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
48 SET_IVOR(10, 0x160) /* Decrementer */
49 SET_IVOR(11, 0x180) /* Fixed Interval Timer */
50 SET_IVOR(12, 0x1a0) /* Watchdog Timer */
51 SET_IVOR(13, 0x1c0) /* Data TLB Error */
52 SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
53 SET_IVOR(15, 0x040) /* Debug */
54
55/* e500v1 & e500v2 only */
56#ifndef CONFIG_E500MC
57 SET_IVOR(32, 0x200) /* SPE Unavailable */
58 SET_IVOR(33, 0x220) /* Embedded FP Data */
59 SET_IVOR(34, 0x240) /* Embedded FP Round */
60#endif
61
62 SET_IVOR(35, 0x260) /* Performance monitor */
63
64/* e500mc only */
65#ifdef CONFIG_E500MC
66 SET_IVOR(36, 0x280) /* Processor doorbell */
67 SET_IVOR(37, 0x2a0) /* Processor doorbell critical */
68 SET_IVOR(38, 0x2c0) /* Guest Processor doorbell */
69 SET_IVOR(39, 0x2e0) /* Guest Processor critical & machine check */
70 SET_IVOR(40, 0x300) /* Hypervisor system call */
71 SET_IVOR(41, 0x320) /* Hypervisor Priviledge */
72
73 SET_GIVOR(2, 0x060) /* Guest Data Storage */
74 SET_GIVOR(3, 0x080) /* Guest Instruction Storage */
75 SET_GIVOR(4, 0x0a0) /* Guest External Input */
76 SET_GIVOR(8, 0x120) /* Guest System Call */
77 SET_GIVOR(13, 0x1c0) /* Guest Data TLB Error */
78 SET_GIVOR(14, 0x1e0) /* Guest Instruction TLB Error */
79#endif