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Kumar Gala44a23cf2008-01-16 22:33:22 -06001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/processor.h>
28#include <asm/mmu.h>
Kumar Galaecf5b982008-12-16 14:59:20 -060029#ifdef CONFIG_ADDR_MAP
30#include <addr_map.h>
31#endif
32
33DECLARE_GLOBAL_DATA_PTR;
Kumar Gala44a23cf2008-01-16 22:33:22 -060034
35void set_tlb(u8 tlb, u32 epn, u64 rpn,
36 u8 perms, u8 wimge,
37 u8 ts, u8 esel, u8 tsize, u8 iprot)
38{
39 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
40
41 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
42 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
43 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
44 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
45 _mas7 = rpn >> 32;
46
47 mtspr(MAS0, _mas0);
48 mtspr(MAS1, _mas1);
49 mtspr(MAS2, _mas2);
50 mtspr(MAS3, _mas3);
51#ifdef CONFIG_ENABLE_36BIT_PHYS
52 mtspr(MAS7, _mas7);
53#endif
54 asm volatile("isync;msync;tlbwe;isync");
Kumar Galaecf5b982008-12-16 14:59:20 -060055
56#ifdef CONFIG_ADDR_MAP
57 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
58 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
59#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -060060}
61
62void disable_tlb(u8 esel)
63{
64 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
65
66 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
67 _mas1 = 0;
68 _mas2 = 0;
69 _mas3 = 0;
70 _mas7 = 0;
71
72 mtspr(MAS0, _mas0);
73 mtspr(MAS1, _mas1);
74 mtspr(MAS2, _mas2);
75 mtspr(MAS3, _mas3);
76#ifdef CONFIG_ENABLE_36BIT_PHYS
77 mtspr(MAS7, _mas7);
78#endif
79 asm volatile("isync;msync;tlbwe;isync");
Kumar Galaecf5b982008-12-16 14:59:20 -060080
81#ifdef CONFIG_ADDR_MAP
82 if (gd->flags & GD_FLG_RELOC)
83 addrmap_set_entry(0, 0, 0, esel);
84#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -060085}
86
87void invalidate_tlb(u8 tlb)
88{
89 if (tlb == 0)
90 mtspr(MMUCSR0, 0x4);
91 if (tlb == 1)
92 mtspr(MMUCSR0, 0x2);
93}
94
95void init_tlbs(void)
96{
Kumar Gala44a23cf2008-01-16 22:33:22 -060097 int i;
98
99 for (i = 0; i < num_tlb_entries; i++) {
100 set_tlb(tlb_table[i].tlb, tlb_table[i].epn, tlb_table[i].rpn,
101 tlb_table[i].perms, tlb_table[i].wimge,
102 tlb_table[i].ts, tlb_table[i].esel, tlb_table[i].tsize,
103 tlb_table[i].iprot);
104 }
Kumar Gala44a23cf2008-01-16 22:33:22 -0600105
106 return ;
107}
Kumar Gala6fb1b732008-06-09 11:07:46 -0500108
Kumar Galaecf5b982008-12-16 14:59:20 -0600109#ifdef CONFIG_ADDR_MAP
110void init_addr_map(void)
111{
112 int i;
113
114 for (i = 0; i < num_tlb_entries; i++) {
115 if (tlb_table[i].tlb == 0)
116 continue;
117
118 addrmap_set_entry(tlb_table[i].epn,
119 tlb_table[i].rpn,
120 (1UL << ((tlb_table[i].tsize * 2) + 10)),
121 tlb_table[i].esel);
122 }
123
124 return ;
125}
126#endif
127
Haiying Wang95026432009-01-13 16:29:22 -0500128#ifndef CONFIG_SYS_DDR_TLB_START
129#define CONFIG_SYS_DDR_TLB_START 8
130#endif
131
Kumar Gala6fb1b732008-06-09 11:07:46 -0500132unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
133{
134 unsigned int tlb_size;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600135 unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
136 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
Fredrik Arnerup90d13b82009-06-02 16:27:10 -0500137 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600138 u64 size, memsize = (u64)memsize_in_meg << 20;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500139
Kumar Galaf8523cb2009-02-06 09:56:35 -0600140 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
Kumar Gala6fb1b732008-06-09 11:07:46 -0500141
Kumar Galaf8523cb2009-02-06 09:56:35 -0600142 /* Convert (4^max) kB to (2^max) bytes */
143 max_cam = max_cam * 2 + 10;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500144
Kumar Galaf8523cb2009-02-06 09:56:35 -0600145 for (; size && ram_tlb_index < 16; ram_tlb_index++) {
146 u32 camsize = __ilog2_u64(size) & ~1U;
147 u32 align = __ilog2(ram_tlb_address) & ~1U;
148
149 if (align == -2) align = max_cam;
150 if (camsize > align)
151 camsize = align;
152
153 if (camsize > max_cam)
154 camsize = max_cam;
155
156 tlb_size = (camsize - 10) / 2;
157
Kumar Gala6fb1b732008-06-09 11:07:46 -0500158 set_tlb(1, ram_tlb_address, ram_tlb_address,
159 MAS3_SX|MAS3_SW|MAS3_SR, 0,
160 0, ram_tlb_index, tlb_size, 1);
161
Kumar Galaf8523cb2009-02-06 09:56:35 -0600162 size -= 1ULL << camsize;
163 memsize -= 1ULL << camsize;
164 ram_tlb_address += 1UL << camsize;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500165 }
166
Kumar Galaf8523cb2009-02-06 09:56:35 -0600167 if (memsize)
Kumar Galad4b130d2009-06-11 23:40:34 -0500168 print_size(memsize, " left unmapped\n");
Kumar Galaf8523cb2009-02-06 09:56:35 -0600169
Kumar Gala6fb1b732008-06-09 11:07:46 -0500170 /*
171 * Confirm that the requested amount of memory was mapped.
172 */
173 return memsize_in_meg;
174}