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Chen-Yu Tsaib5fe5232020-01-12 23:36:13 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (C) 2016 ARM Ltd.
Andre Przywarae7bd15e2017-02-16 01:20:29 +00003
4/dts-v1/;
Jagan Teki702a3e52017-05-25 18:15:36 +00005#include "sun50i-h5.dtsi"
Andre Przywara57285732023-04-02 01:17:07 +01006#include "sun50i-h5-cpu-opp.dtsi"
Andre Przywarae7bd15e2017-02-16 01:20:29 +00007
Jagan Tekif3339732017-05-25 18:26:41 +00008#include <dt-bindings/gpio/gpio.h>
Andre Przywara1caeae32018-07-04 14:16:37 +01009#include <dt-bindings/input/input.h>
10#include <dt-bindings/pinctrl/sun4i-a10.h>
Jagan Tekif3339732017-05-25 18:26:41 +000011
Andre Przywarae7bd15e2017-02-16 01:20:29 +000012/ {
Andre Przywara1caeae32018-07-04 14:16:37 +010013 model = "Xunlong Orange Pi PC 2";
14 compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
15
16 reg_vcc3v3: vcc3v3 {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc3v3";
19 regulator-min-microvolt = <3300000>;
20 regulator-max-microvolt = <3300000>;
21 };
Andre Przywarae7bd15e2017-02-16 01:20:29 +000022
Jagan Teki0107cd42018-05-07 13:03:47 +053023 aliases {
Jagan Teki0107cd42018-05-07 13:03:47 +053024 ethernet0 = &emac;
Andre Przywara1caeae32018-07-04 14:16:37 +010025 serial0 = &uart0;
Jagan Teki0107cd42018-05-07 13:03:47 +053026 };
27
Andre Przywarae7bd15e2017-02-16 01:20:29 +000028 chosen {
29 stdout-path = "serial0:115200n8";
30 };
31
Andre Przywara1caeae32018-07-04 14:16:37 +010032 connector {
33 compatible = "hdmi-connector";
34 type = "a";
Andre Przywarae7bd15e2017-02-16 01:20:29 +000035
Andre Przywara1caeae32018-07-04 14:16:37 +010036 port {
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
39 };
Andre Przywarae7bd15e2017-02-16 01:20:29 +000040 };
41 };
Andre Przywara1caeae32018-07-04 14:16:37 +010042
43 leds {
44 compatible = "gpio-leds";
45
Andre Przywara58f68612021-05-25 01:20:25 +010046 led-0 {
Andre Przywara1caeae32018-07-04 14:16:37 +010047 label = "orangepi:green:pwr";
48 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
49 default-state = "on";
50 };
51
Andre Przywara58f68612021-05-25 01:20:25 +010052 led-1 {
Andre Przywara1caeae32018-07-04 14:16:37 +010053 label = "orangepi:red:status";
54 gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
55 };
56 };
57
Andre Przywara7f53f502022-09-11 00:04:41 +010058 gpio-keys {
Andre Przywara1caeae32018-07-04 14:16:37 +010059 compatible = "gpio-keys";
60
Andre Przywara7f53f502022-09-11 00:04:41 +010061 key-sw4 {
Andre Przywara1caeae32018-07-04 14:16:37 +010062 label = "sw4";
63 linux,code = <BTN_0>;
64 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
Andre Przywara58f68612021-05-25 01:20:25 +010065 wakeup-source;
Andre Przywara1caeae32018-07-04 14:16:37 +010066 };
67 };
68
69 reg_gmac_3v3: gmac-3v3 {
70 compatible = "regulator-fixed";
71 regulator-name = "gmac-3v3";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74 startup-delay-us = <100000>;
75 enable-active-high;
76 gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
77 };
78
79 reg_usb0_vbus: usb0-vbus {
80 compatible = "regulator-fixed";
81 regulator-name = "usb0-vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 enable-active-high;
85 gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
86 status = "okay";
87 };
88};
89
90&codec {
91 allwinner,audio-routing =
92 "Line Out", "LINEOUT",
93 "MIC1", "Mic",
94 "Mic", "MBIAS";
95 status = "okay";
96};
97
Andre Przywara58f68612021-05-25 01:20:25 +010098&cpu0 {
99 cpu-supply = <&reg_vdd_cpux>;
100};
101
Andre Przywara1caeae32018-07-04 14:16:37 +0100102&de {
103 status = "okay";
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000104};
105
Jagan Teki84c569c2018-05-07 13:03:48 +0530106&ehci0 {
107 status = "okay";
108};
109
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000110&ehci1 {
111 status = "okay";
112};
113
Andre Przywara1caeae32018-07-04 14:16:37 +0100114&ehci2 {
115 status = "okay";
116};
117
118&ehci3 {
119 status = "okay";
120};
121
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000122&emac {
123 pinctrl-names = "default";
124 pinctrl-0 = <&emac_rgmii_pins>;
Andre Przywara1caeae32018-07-04 14:16:37 +0100125 phy-supply = <&reg_gmac_3v3>;
Andre Przywara0bb48ef2018-04-04 01:31:19 +0100126 phy-handle = <&ext_rgmii_phy>;
Andre Przywara58f68612021-05-25 01:20:25 +0100127 phy-mode = "rgmii-id";
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000128 status = "okay";
Andre Przywara0bb48ef2018-04-04 01:31:19 +0100129};
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000130
Andre Przywara0bb48ef2018-04-04 01:31:19 +0100131&external_mdio {
132 ext_rgmii_phy: ethernet-phy@1 {
133 compatible = "ethernet-phy-ieee802.3-c22";
Andre Przywarae7bd15e2017-02-16 01:20:29 +0000134 reg = <1>;
135 };
136};
Jagan Teki0107cd42018-05-07 13:03:47 +0530137
Andre Przywara1caeae32018-07-04 14:16:37 +0100138&hdmi {
139 status = "okay";
140};
141
142&hdmi_out {
143 hdmi_out_con: endpoint {
144 remote-endpoint = <&hdmi_con_in>;
145 };
146};
147
148&ir {
149 pinctrl-names = "default";
Chen-Yu Tsaib5fe5232020-01-12 23:36:13 +0800150 pinctrl-0 = <&r_ir_rx_pin>;
Andre Przywara1caeae32018-07-04 14:16:37 +0100151 status = "okay";
152};
153
Jagan Teki0107cd42018-05-07 13:03:47 +0530154&mmc0 {
Jagan Teki0107cd42018-05-07 13:03:47 +0530155 vmmc-supply = <&reg_vcc3v3>;
156 bus-width = <4>;
Andre Przywara1caeae32018-07-04 14:16:37 +0100157 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
Jagan Teki0107cd42018-05-07 13:03:47 +0530158 status = "okay";
159};
160
Jagan Teki84c569c2018-05-07 13:03:48 +0530161&ohci0 {
162 status = "okay";
163};
164
Jagan Teki0107cd42018-05-07 13:03:47 +0530165&ohci1 {
166 status = "okay";
167};
168
Andre Przywara1caeae32018-07-04 14:16:37 +0100169&ohci2 {
170 status = "okay";
171};
172
173&ohci3 {
174 status = "okay";
175};
176
Andre Przywara58f68612021-05-25 01:20:25 +0100177&r_i2c {
178 status = "okay";
179
180 reg_vdd_cpux: regulator@65 {
181 compatible = "silergy,sy8106a";
182 reg = <0x65>;
183 regulator-name = "vdd-cpux";
184 silergy,fixed-microvolt = <1100000>;
185 regulator-min-microvolt = <1000000>;
186 regulator-max-microvolt = <1400000>;
187 regulator-ramp-delay = <200>;
188 regulator-boot-on;
189 regulator-always-on;
190 };
191};
192
Andre Przywara4c974ee2018-10-29 00:56:49 +0000193&spi0 {
194 status = "okay";
195
196 flash@0 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "jedec,spi-nor";
200 reg = <0>;
201 spi-max-frequency = <40000000>;
202 };
203};
204
Jagan Teki0107cd42018-05-07 13:03:47 +0530205&uart0 {
206 pinctrl-names = "default";
Chen-Yu Tsaib5fe5232020-01-12 23:36:13 +0800207 pinctrl-0 = <&uart0_pa_pins>;
Jagan Teki0107cd42018-05-07 13:03:47 +0530208 status = "okay";
209};
210
Andre Przywara1caeae32018-07-04 14:16:37 +0100211&uart1 {
212 pinctrl-names = "default";
213 pinctrl-0 = <&uart1_pins>;
214 status = "disabled";
215};
216
217&uart2 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&uart2_pins>;
220 status = "disabled";
221};
222
Jagan Teki84c569c2018-05-07 13:03:48 +0530223&usb_otg {
224 dr_mode = "otg";
225 status = "okay";
226};
227
Jagan Teki0107cd42018-05-07 13:03:47 +0530228&usbphy {
Andre Przywara1caeae32018-07-04 14:16:37 +0100229 /* USB Type-A ports' VBUS is always on */
230 usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
231 usb0_vbus-supply = <&reg_usb0_vbus>;
Jagan Teki0107cd42018-05-07 13:03:47 +0530232 status = "okay";
233};