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HeungJun, Kim89f95492012-01-16 21:13:05 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 * Heungjun Kim <riverful.kim@samsung.com>
4 *
5 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
HeungJun, Kim89f95492012-01-16 21:13:05 +00008 */
9
Piotr Wilczekfe601642014-03-07 14:59:48 +010010#ifndef __CONFIG_TRATS_H
11#define __CONFIG_TRATS_H
HeungJun, Kim89f95492012-01-16 21:13:05 +000012
Simon Glass4c7bb1d2014-10-07 22:01:44 -060013#include <configs/exynos4-common.h>
HeungJun, Kim89f95492012-01-16 21:13:05 +000014
Piotr Wilczekfe601642014-03-07 14:59:48 +010015#define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */
HeungJun, Kim89f95492012-01-16 21:13:05 +000016
Piotr Wilczekfe601642014-03-07 14:59:48 +010017#define CONFIG_TRATS
18
Piotr Wilczekfe601642014-03-07 14:59:48 +010019
20#define CONFIG_TIZEN /* TIZEN lib */
HeungJun, Kim89f95492012-01-16 21:13:05 +000021
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010022#define CONFIG_SYS_L2CACHE_OFF
Łukasz Majewskid0460b02012-08-07 05:42:14 +000023#ifndef CONFIG_SYS_L2CACHE_OFF
24#define CONFIG_SYS_L2_PL310
25#define CONFIG_SYS_PL310_BASE 0x10502000
26#endif
HeungJun, Kim89f95492012-01-16 21:13:05 +000027
Piotr Wilczekfe601642014-03-07 14:59:48 +010028/* TRATS has 4 banks of DRAM */
29#define CONFIG_NR_DRAM_BANKS 4
HeungJun, Kim89f95492012-01-16 21:13:05 +000030#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekfe601642014-03-07 14:59:48 +010031#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
HeungJun, Kim89f95492012-01-16 21:13:05 +000032#define CONFIG_SYS_TEXT_BASE 0x63300000
Piotr Wilczekfe601642014-03-07 14:59:48 +010033#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
HeungJun, Kim89f95492012-01-16 21:13:05 +000034
Piotr Wilczekfe601642014-03-07 14:59:48 +010035/* memtest works on */
36#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
37#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
38#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
HeungJun, Kim89f95492012-01-16 21:13:05 +000039
Piotr Wilczekfe601642014-03-07 14:59:48 +010040#define CONFIG_SYS_TEXT_BASE 0x63300000
HeungJun, Kim89f95492012-01-16 21:13:05 +000041
HeungJun, Kim89f95492012-01-16 21:13:05 +000042/* select serial console configuration */
Piotr Wilczekfe601642014-03-07 14:59:48 +010043#define CONFIG_SERIAL2
HeungJun, Kim89f95492012-01-16 21:13:05 +000044#define CONFIG_BAUDRATE 115200
45
Piotr Wilczekfe601642014-03-07 14:59:48 +010046/* Console configuration */
47#define CONFIG_SYS_CONSOLE_INFO_QUIET
48#define CONFIG_SYS_CONSOLE_IS_IN_ENV
HeungJun, Kim89f95492012-01-16 21:13:05 +000049
Piotr Wilczekfe601642014-03-07 14:59:48 +010050/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
51#define MACH_TYPE_TRATS 3928
52#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
HeungJun, Kim89f95492012-01-16 21:13:05 +000053
HeungJun, Kim89f95492012-01-16 21:13:05 +000054#define CONFIG_BOOTARGS "Please use defined boot"
55#define CONFIG_BOOTCOMMAND "run mmcboot"
Łukasz Majewski6afc3f62014-04-09 10:44:34 +020056#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
HeungJun, Kim89f95492012-01-16 21:13:05 +000057
Piotr Wilczekfe601642014-03-07 14:59:48 +010058#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
59 - GENERATED_GBL_DATA_SIZE)
60
61#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
62
63#define CONFIG_SYS_MONITOR_BASE 0x00000000
64
HeungJun, Kim89f95492012-01-16 21:13:05 +000065#define CONFIG_BOOTBLOCK "10"
66#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
67
Piotr Wilczekfe601642014-03-07 14:59:48 +010068#define CONFIG_ENV_IS_IN_MMC
69#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
70#define CONFIG_ENV_SIZE 4096
71#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
72
73#define CONFIG_ENV_OVERWRITE
74
75#define CONFIG_ENV_VARS_UBOOT_CONFIG
76#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
77
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010078/* Tizen - partitions definitions */
79#define PARTS_CSA "csa-mmc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010080#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010081#define PARTS_QBOOT "qboot"
82#define PARTS_CSC "csc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010083#define PARTS_ROOT "platform"
84#define PARTS_DATA "data"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010085#define PARTS_UMS "ums"
86
87#define PARTS_DEFAULT \
88 "uuid_disk=${uuid_gpt_disk};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010089 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
90 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
91 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010092 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010093 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
94 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010095 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
96
Lukasz Majewski93a1ab52012-08-06 14:41:11 +020097#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020098 "u-boot raw 0x80 0x400;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020099 "/uImage ext4 0 2;" \
100 "/modem.bin ext4 0 2;" \
101 "/exynos4210-trats.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +0100102 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +0100103 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +0100104 ""PARTS_QBOOT" part 0 3;" \
105 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +0100106 ""PARTS_ROOT" part 0 5;" \
107 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +0100108 ""PARTS_UMS" part 0 7;" \
Mateusz Zalegab7d42592014-04-28 21:13:25 +0200109 "params.bin raw 0x38 0x8\0"
Lukasz Majewski93a1ab52012-08-06 14:41:11 +0200110
HeungJun, Kim89f95492012-01-16 21:13:05 +0000111#define CONFIG_EXTRA_ENV_SETTINGS \
112 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100113 "run loaduimage;" \
114 "if run loaddtb; then " \
115 "bootm 0x40007FC0 - ${fdtaddr};" \
116 "fi;" \
117 "bootm 0x40007FC0;\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000118 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +0900119 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
120 "mmc dev 0 0\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000121 "updatebootb=" \
122 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
123 "lpj=lpj=3981312\0" \
124 "nfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000125 "setenv bootargs root=/dev/nfs rw " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000126 "nfsroot=${nfsroot},nolock,tcp " \
127 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
128 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
129 "; run bootk\0" \
130 "ramfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000131 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000132 "${console} ${meminfo} " \
133 "initrd=0x43000000,8M ramdisk=8192\0" \
134 "mmcboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000135 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000136 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100137 "run bootk\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000138 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000139 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
140 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
141 "verify=n\0" \
142 "rootfstype=ext4\0" \
143 "console=" CONFIG_DEFAULT_CONSOLE \
144 "meminfo=crashkernel=32M@0x50000000\0" \
145 "nfsroot=/nfsroot/arm\0" \
146 "bootblock=" CONFIG_BOOTBLOCK "\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000147 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
Łukasz Majewski4ef400b2013-07-18 13:14:22 +0200148 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200149 "${fdtfile}\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000150 "mmcdev=0\0" \
151 "mmcbootpart=2\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000152 "mmcrootpart=5\0" \
Lukasz Majewski93a1ab52012-08-06 14:41:11 +0200153 "opts=always_resume=1\0" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100154 "partitions=" PARTS_DEFAULT \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000155 "dfu_alt_info=" CONFIG_DFU_ALT \
156 "spladdr=0x40000100\0" \
157 "splsize=0x200\0" \
158 "splfile=falcon.bin\0" \
159 "spl_export=" \
160 "setexpr spl_imgsize ${splsize} + 8 ;" \
Przemyslaw Marczakdc993a62013-03-12 03:41:49 +0000161 "setenv spl_imgsize 0x${spl_imgsize};" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000162 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
163 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
164 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
165 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
166 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
167 "spl export atags 0x40007FC0;" \
168 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
169 "mw.l ${spl_addr_tmp} ${splsize};" \
170 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
171 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
172 "setenv spl_imgsize;" \
173 "setenv spl_imgaddr;" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200174 "setenv spl_addr_tmp;\0" \
175 "fdtaddr=40800000\0" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200176
Łukasz Majewski35777e22013-01-02 06:06:02 +0000177/* Falcon mode definitions */
178#define CONFIG_CMD_SPL
Piotr Wilczekfe601642014-03-07 14:59:48 +0100179#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
HeungJun, Kim89f95492012-01-16 21:13:05 +0000180
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100181/* GPT */
Przemyslaw Marczakaafd2c52014-04-02 10:20:07 +0200182#define CONFIG_RANDOM_UUID
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100183
Piotr Wilczekfe601642014-03-07 14:59:48 +0100184/* I2C */
185#include <asm/arch/gpio.h>
HeungJun, Kim89f95492012-01-16 21:13:05 +0000186
Piotr Wilczekfe601642014-03-07 14:59:48 +0100187#define CONFIG_CMD_I2C
HeungJun, Kim89f95492012-01-16 21:13:05 +0000188
Heiko Schocherea818db2013-01-29 08:53:15 +0100189#define CONFIG_SYS_I2C
Piotr Wilczek2d8f1e22013-11-20 10:43:49 +0100190#define CONFIG_SYS_I2C_S3C24X0
191#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
192#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0xFE
193#define CONFIG_MAX_I2C_NUM 8
Heiko Schocherea818db2013-01-29 08:53:15 +0100194#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
195#define CONFIG_SYS_I2C_SOFT_SPEED 50000
Piotr Wilczek2d8f1e22013-11-20 10:43:49 +0100196#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
HeungJun, Kim89f95492012-01-16 21:13:05 +0000197#define CONFIG_SOFT_I2C_READ_REPEATED_START
Łukasz Majewskifd8dca82012-09-04 23:15:21 +0000198#define CONFIG_SYS_I2C_INIT_BOARD
Łukasz Majewskifd8dca82012-09-04 23:15:21 +0000199
Łukasz Majewskifd8dca82012-09-04 23:15:21 +0000200/* I2C FG */
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530201#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41
202#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40
HeungJun, Kim89f95492012-01-16 21:13:05 +0000203
Piotr Wilczekfe601642014-03-07 14:59:48 +0100204/* POWER */
Łukasz Majewskibe3b51a2012-11-13 03:22:14 +0000205#define CONFIG_POWER
206#define CONFIG_POWER_I2C
207#define CONFIG_POWER_MAX8997
HeungJun, Kim89f95492012-01-16 21:13:05 +0000208
Łukasz Majewski5a773582012-11-13 03:22:07 +0000209#define CONFIG_POWER_FG
210#define CONFIG_POWER_FG_MAX17042
Łukasz Majewski7dcda992012-11-13 03:22:06 +0000211#define CONFIG_POWER_MUIC
212#define CONFIG_POWER_MUIC_MAX8997
Łukasz Majewski61365ff2012-11-13 03:22:08 +0000213#define CONFIG_POWER_BATTERY
214#define CONFIG_POWER_BATTERY_TRATS
HeungJun, Kim89f95492012-01-16 21:13:05 +0000215
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100216/* Security subsystem - enable hw_rand() */
217#define CONFIG_EXYNOS_ACE_SHA
218#define CONFIG_LIB_HW_RAND
219
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100220/* Common misc for Samsung */
221#define CONFIG_MISC_COMMON
222
223#define CONFIG_MISC_INIT_R
224
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100225/* Download menu - Samsung common */
226#define CONFIG_LCD_MENU
227#define CONFIG_LCD_MENU_BOARD
228
229/* Download menu - definitions for check keys */
230#ifndef __ASSEMBLY__
231#include <power/max8997_pmic.h>
232
233#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
234#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
235#define KEY_PWR_STATUS_MASK (1 << 0)
236#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
237#define KEY_PWR_INTERRUPT_MASK (1 << 0)
238
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530239#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
240#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100241#endif /* __ASSEMBLY__ */
242
243/* LCD console */
244#define LCD_BPP LCD_COLOR16
245#define CONFIG_SYS_WHITE_ON_BLACK
246
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000247/* LCD */
248#define CONFIG_EXYNOS_FB
249#define CONFIG_LCD
Donghwa Lee90464972012-05-09 19:23:46 +0000250#define CONFIG_CMD_BMP
Przemyslaw Marczak2df21cb2014-01-22 11:24:16 +0100251#define CONFIG_BMP_16BPP
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000252#define CONFIG_FB_ADDR 0x52504000
253#define CONFIG_S6E8AX0
254#define CONFIG_EXYNOS_MIPI_DSIM
Donghwa Lee90464972012-05-09 19:23:46 +0000255#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100256#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000257
HeungJun, Kim89f95492012-01-16 21:13:05 +0000258#endif /* __CONFIG_H */