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Tom Warren07067142013-01-28 13:32:13 +00001/*
2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _TEGRA114_COMMON_H_
18#define _TEGRA114_COMMON_H_
19#include "tegra-common.h"
20
21/*
22 * NS16550 Configuration
23 */
24#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
25
26/*
27 * High Level Configuration Options
28 */
29#define CONFIG_TEGRA114 /* in a NVidia Tegra114 core */
30
31/* Environment information, boards can override if required */
32#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
33
34/*
35 * Miscellaneous configurable options
36 */
37#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */
38#define CONFIG_STACKBASE 0x82800000 /* 40MB */
39
40/*-----------------------------------------------------------------------
41 * Physical Memory Map
42 */
43#define CONFIG_SYS_TEXT_BASE 0x8010E000
44
45/*
46 * Memory layout for where various images get loaded by boot scripts:
47 *
48 * scriptaddr can be pretty much anywhere that doesn't conflict with something
49 * else. Put it above BOOTMAPSZ to eliminate conflicts.
50 *
51 * kernel_addr_r must be within the first 128M of RAM in order for the
52 * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
53 * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
54 * should not overlap that area, or the kernel will have to copy itself
55 * somewhere else before decompression. Similarly, the address of any other
56 * data passed to the kernel shouldn't overlap the start of RAM. Pushing
57 * this up to 16M allows for a sizable kernel to be decompressed below the
58 * compressed load address.
59 *
60 * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
61 * the compressed kernel to be up to 16M too.
62 *
63 * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
64 * for the FDT/DTB to be up to 1M, which is hopefully plenty.
65 */
66#define MEM_LAYOUT_ENV_SETTINGS \
67 "scriptaddr=0x90000000\0" \
68 "kernel_addr_r=0x81000000\0" \
69 "fdt_addr_r=0x82000000\0" \
70 "ramdisk_addr_r=0x82100000\0"
71
72/* Defines for SPL */
73#define CONFIG_SPL_TEXT_BASE 0x80108000
74#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
75#define CONFIG_SPL_STACK 0x800ffffc
76
77#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra114/u-boot-spl.lds"
78
Tom Warrena7f8b5e2013-02-08 07:25:32 +000079/* Total I2C ports on Tegra114 */
80#define TEGRA_I2C_NUM_CONTROLLERS 5
81
Tom Warren07067142013-01-28 13:32:13 +000082#endif /* _TEGRA114_COMMON_H_ */