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Tom Rini83d290c2018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02003# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00004# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenkc6097192002-11-03 00:24:07 +00005
6Summary:
7========
8
wdenk24ee89b2002-11-03 17:56:27 +00009This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000010Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
wdenkc6097192002-11-03 00:24:07 +000014
15The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000016the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000018support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000032Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000033"working". In fact, many of them are used in production systems.
34
Robert P. J. Day7207b362015-12-19 07:16:10 -050035In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000039
Robert P. J. Day7207b362015-12-19 07:16:10 -050040Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000043
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050051U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
Robert P. J. Day7207b362015-12-19 07:16:10 -050061The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010062git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Simon Glass9e5616d2019-08-01 09:47:14 -060086 * ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100128 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900135 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500136 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500137 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000140 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400142 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200143 /powerpc Files generic to PowerPC architecture
Rick Chen3fafced2017-12-26 13:55:59 +0800144 /riscv Files generic to RISC-V architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500145 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500146 /sh Files generic to SH architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400147 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500148/api Machine/arch independent API for external apps
149/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800150/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500151/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500152/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500153/disk Code for disk drive partition handling
154/doc Documentation (don't expect too much)
155/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400156/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500157/examples Example code for standalone applications, etc.
158/fs Filesystem code (cramfs, ext2, jffs2, etc.)
159/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500160/lib Library routines generic to all architectures
161/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500162/net Networking code
163/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500164/scripts Various build scripts and Makefiles
165/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500166/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000167
wdenkc6097192002-11-03 00:24:07 +0000168Software Configuration:
169=======================
170
171Configuration is usually done using C preprocessor defines; the
172rationale behind that is to avoid dead code whenever possible.
173
174There are two classes of configuration variables:
175
176* Configuration _OPTIONS_:
177 These are selectable by the user and have names beginning with
178 "CONFIG_".
179
180* Configuration _SETTINGS_:
181 These depend on the hardware etc. and should not be meddled with if
182 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000184
Robert P. J. Day7207b362015-12-19 07:16:10 -0500185Previously, all configuration was done by hand, which involved creating
186symbolic links and editing configuration files manually. More recently,
187U-Boot has added the Kbuild infrastructure used by the Linux kernel,
188allowing you to use the "make menuconfig" command to configure your
189build.
wdenkc6097192002-11-03 00:24:07 +0000190
191
192Selection of Processor Architecture and Board Type:
193---------------------------------------------------
194
195For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200196configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000197
198Example: For a TQM823L module type:
199
200 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200201 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000202
Robert P. J. Day7207b362015-12-19 07:16:10 -0500203Note: If you're looking for the default configuration file for a board
204you're sure used to be there but is now missing, check the file
205doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000206
Simon Glass75b3c3a2014-03-22 17:12:59 -0600207Sandbox Environment:
208--------------------
209
210U-Boot can be built natively to run on a Linux host using the 'sandbox'
211board. This allows feature development which is not board- or architecture-
212specific to be undertaken on a native platform. The sandbox is also used to
213run some of U-Boot's tests.
214
Keerthy5917d0b2019-07-29 13:52:04 +0530215See doc/arch/index.rst for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600216
217
Simon Glassdb910352015-03-03 08:03:00 -0700218Board Initialisation Flow:
219--------------------------
220
221This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500222SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700223
Robert P. J. Day7207b362015-12-19 07:16:10 -0500224Note: "SPL" stands for "Secondary Program Loader," which is explained in
225more detail later in this file.
226
227At present, SPL mostly uses a separate code path, but the function names
228and roles of each function are the same. Some boards or architectures
229may not conform to this. At least most ARM boards which use
230CONFIG_SPL_FRAMEWORK conform to this.
231
232Execution typically starts with an architecture-specific (and possibly
233CPU-specific) start.S file, such as:
234
235 - arch/arm/cpu/armv7/start.S
236 - arch/powerpc/cpu/mpc83xx/start.S
237 - arch/mips/cpu/start.S
238
239and so on. From there, three functions are called; the purpose and
240limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700241
242lowlevel_init():
243 - purpose: essential init to permit execution to reach board_init_f()
244 - no global_data or BSS
245 - there is no stack (ARMv7 may have one but it will soon be removed)
246 - must not set up SDRAM or use console
247 - must only do the bare minimum to allow execution to continue to
248 board_init_f()
249 - this is almost never needed
250 - return normally from this function
251
252board_init_f():
253 - purpose: set up the machine ready for running board_init_r():
254 i.e. SDRAM and serial UART
255 - global_data is available
256 - stack is in SRAM
257 - BSS is not available, so you cannot use global/static variables,
258 only stack variables and global_data
259
260 Non-SPL-specific notes:
261 - dram_init() is called to set up DRAM. If already done in SPL this
262 can do nothing
263
264 SPL-specific notes:
265 - you can override the entire board_init_f() function with your own
266 version as needed.
267 - preloader_console_init() can be called here in extremis
268 - should set up SDRAM, and anything needed to make the UART work
269 - these is no need to clear BSS, it will be done by crt0.S
Andreas Dannenberg14254652019-08-08 12:54:49 -0500270 - for specific scenarios on certain architectures an early BSS *can*
271 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
272 of BSS prior to entering board_init_f()) but doing so is discouraged.
273 Instead it is strongly recommended to architect any code changes
274 or additions such to not depend on the availability of BSS during
275 board_init_f() as indicated in other sections of this README to
276 maintain compatibility and consistency across the entire code base.
Simon Glassdb910352015-03-03 08:03:00 -0700277 - must return normally from this function (don't call board_init_r()
278 directly)
279
280Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
281this point the stack and global_data are relocated to below
282CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
283memory.
284
285board_init_r():
286 - purpose: main execution, common code
287 - global_data is available
288 - SDRAM is available
289 - BSS is available, all static/global variables can be used
290 - execution eventually continues to main_loop()
291
292 Non-SPL-specific notes:
293 - U-Boot is relocated to the top of memory and is now running from
294 there.
295
296 SPL-specific notes:
297 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
298 CONFIG_SPL_STACK_R_ADDR points into SDRAM
299 - preloader_console_init() can be called here - typically this is
Ley Foon Tan0680f1b2017-05-03 17:13:32 +0800300 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
Simon Glassdb910352015-03-03 08:03:00 -0700301 spl_board_init() function containing this call
302 - loads U-Boot or (in falcon mode) Linux
303
304
305
wdenkc6097192002-11-03 00:24:07 +0000306Configuration Options:
307----------------------
308
309Configuration depends on the combination of board and CPU type; all
310such information is kept in a configuration file
311"include/configs/<board_name>.h".
312
313Example: For a TQM823L module, all configuration settings are in
314"include/configs/TQM823L.h".
315
316
wdenk7f6c2cb2002-11-10 22:06:23 +0000317Many of the options are named exactly as the corresponding Linux
318kernel configuration options. The intention is to make it easier to
319build a config tool - later.
320
Ashish Kumar63b23162017-08-11 11:09:14 +0530321- ARM Platform Bus Type(CCI):
322 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
323 provides full cache coherency between two clusters of multi-core
324 CPUs and I/O coherency for devices and I/O masters
325
326 CONFIG_SYS_FSL_HAS_CCI400
327
328 Defined For SoC that has cache coherent interconnect
329 CCN-400
wdenk7f6c2cb2002-11-10 22:06:23 +0000330
Ashish Kumarc055cee2017-08-18 10:54:36 +0530331 CONFIG_SYS_FSL_HAS_CCN504
332
333 Defined for SoC that has cache coherent interconnect CCN-504
334
wdenkc6097192002-11-03 00:24:07 +0000335The following options need to be configured:
336
Kim Phillips26281142007-08-10 13:28:25 -0500337- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000338
Kim Phillips26281142007-08-10 13:28:25 -0500339- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200340
Kumar Gala66412c62011-02-18 05:40:54 -0600341- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000342 CONFIG_SYS_PPC64
343
344 Specifies that the core is a 64-bit PowerPC implementation (implements
345 the "64" category of the Power ISA). This is necessary for ePAPR
346 compliance, among other possible reasons.
347
Kumar Gala66412c62011-02-18 05:40:54 -0600348 CONFIG_SYS_FSL_TBCLK_DIV
349
350 Defines the core time base clock divider ratio compared to the
351 system clock. On most PQ3 devices this is 8, on newer QorIQ
352 devices it can be 16 or 32. The ratio varies from SoC to Soc.
353
Kumar Gala8f290842011-05-20 00:39:21 -0500354 CONFIG_SYS_FSL_PCIE_COMPAT
355
356 Defines the string to utilize when trying to match PCIe device
357 tree nodes for the given platform.
358
Scott Wood33eee332012-08-14 10:14:53 +0000359 CONFIG_SYS_FSL_ERRATUM_A004510
360
361 Enables a workaround for erratum A004510. If set,
362 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
363 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
364
365 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
366 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
367
368 Defines one or two SoC revisions (low 8 bits of SVR)
369 for which the A004510 workaround should be applied.
370
371 The rest of SVR is either not relevant to the decision
372 of whether the erratum is present (e.g. p2040 versus
373 p2041) or is implied by the build target, which controls
374 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
375
376 See Freescale App Note 4493 for more information about
377 this erratum.
378
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530379 CONFIG_A003399_NOR_WORKAROUND
380 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800381 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530382
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530383 CONFIG_A008044_WORKAROUND
384 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800385 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530386
Scott Wood33eee332012-08-14 10:14:53 +0000387 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
388
389 This is the value to write into CCSR offset 0x18600
390 according to the A004510 workaround.
391
Priyanka Jain64501c62013-07-02 09:21:04 +0530392 CONFIG_SYS_FSL_DSP_DDR_ADDR
393 This value denotes start offset of DDR memory which is
394 connected exclusively to the DSP cores.
395
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530396 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
397 This value denotes start offset of M2 memory
398 which is directly connected to the DSP core.
399
Priyanka Jain64501c62013-07-02 09:21:04 +0530400 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
401 This value denotes start offset of M3 memory which is directly
402 connected to the DSP core.
403
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530404 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
405 This value denotes start offset of DSP CCSR space.
406
Priyanka Jainb1359912013-12-17 14:25:52 +0530407 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
408 Single Source Clock is clocking mode present in some of FSL SoC's.
409 In this mode, a single differential clock is used to supply
410 clocks to the sysclock, ddrclock and usbclock.
411
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530412 CONFIG_SYS_CPC_REINIT_F
413 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800414 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530415
Tang Yuantianaade2002014-04-17 15:33:46 +0800416 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800417 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800418 supported, core will start to execute uboot when wakes up.
419
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000420- Generic CPU options:
421 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
422
423 Defines the endianess of the CPU. Implementation of those
424 values is arch specific.
425
York Sun5614e712013-09-30 09:22:09 -0700426 CONFIG_SYS_FSL_DDR
427 Freescale DDR driver in use. This type of DDR controller is
428 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
429 SoCs.
430
431 CONFIG_SYS_FSL_DDR_ADDR
432 Freescale DDR memory-mapped register base.
433
434 CONFIG_SYS_FSL_DDR_EMU
435 Specify emulator support for DDR. Some DDR features such as
436 deskew training are not available.
437
438 CONFIG_SYS_FSL_DDRC_GEN1
439 Freescale DDR1 controller.
440
441 CONFIG_SYS_FSL_DDRC_GEN2
442 Freescale DDR2 controller.
443
444 CONFIG_SYS_FSL_DDRC_GEN3
445 Freescale DDR3 controller.
446
York Sun34e026f2014-03-27 17:54:47 -0700447 CONFIG_SYS_FSL_DDRC_GEN4
448 Freescale DDR4 controller.
449
York Sun9ac4ffb2013-09-30 14:20:51 -0700450 CONFIG_SYS_FSL_DDRC_ARM_GEN3
451 Freescale DDR3 controller for ARM-based SoCs.
452
York Sun5614e712013-09-30 09:22:09 -0700453 CONFIG_SYS_FSL_DDR1
454 Board config to use DDR1. It can be enabled for SoCs with
455 Freescale DDR1 or DDR2 controllers, depending on the board
456 implemetation.
457
458 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400459 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700460 Freescale DDR2 or DDR3 controllers, depending on the board
461 implementation.
462
463 CONFIG_SYS_FSL_DDR3
464 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700465 Freescale DDR3 or DDR3L controllers.
466
467 CONFIG_SYS_FSL_DDR3L
468 Board config to use DDR3L. It can be enabled for SoCs with
469 DDR3L controllers.
470
471 CONFIG_SYS_FSL_DDR4
472 Board config to use DDR4. It can be enabled for SoCs with
473 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700474
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530475 CONFIG_SYS_FSL_IFC_BE
476 Defines the IFC controller register space as Big Endian
477
478 CONFIG_SYS_FSL_IFC_LE
479 Defines the IFC controller register space as Little Endian
480
Prabhakar Kushwaha1c407072017-02-02 15:01:26 +0530481 CONFIG_SYS_FSL_IFC_CLK_DIV
482 Defines divider of platform clock(clock input to IFC controller).
483
Prabhakar Kushwahaadd63f92017-02-02 15:02:00 +0530484 CONFIG_SYS_FSL_LBC_CLK_DIV
485 Defines divider of platform clock(clock input to eLBC controller).
486
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530487 CONFIG_SYS_FSL_PBL_PBI
488 It enables addition of RCW (Power on reset configuration) in built image.
489 Please refer doc/README.pblimage for more details
490
491 CONFIG_SYS_FSL_PBL_RCW
492 It adds PBI(pre-boot instructions) commands in u-boot build image.
493 PBI commands can be used to configure SoC before it starts the execution.
494 Please refer doc/README.pblimage for more details
495
York Sun4e5b1bd2014-02-10 13:59:42 -0800496 CONFIG_SYS_FSL_DDR_BE
497 Defines the DDR controller register space as Big Endian
498
499 CONFIG_SYS_FSL_DDR_LE
500 Defines the DDR controller register space as Little Endian
501
York Sun6b9e3092014-02-10 13:59:43 -0800502 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
503 Physical address from the view of DDR controllers. It is the
504 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
505 it could be different for ARM SoCs.
506
York Sun6b1e1252014-02-10 13:59:44 -0800507 CONFIG_SYS_FSL_DDR_INTLV_256B
508 DDR controller interleaving on 256-byte. This is a special
509 interleaving mode, handled by Dickens for Freescale layerscape
510 SoCs with ARM core.
511
York Sun1d71efb2014-08-01 15:51:00 -0700512 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
513 Number of controllers used as main memory.
514
515 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
516 Number of controllers used for other than main memory.
517
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530518 CONFIG_SYS_FSL_HAS_DP_DDR
519 Defines the SoC has DP-DDR used for DPAA.
520
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530521 CONFIG_SYS_FSL_SEC_BE
522 Defines the SEC controller register space as Big Endian
523
524 CONFIG_SYS_FSL_SEC_LE
525 Defines the SEC controller register space as Little Endian
526
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200527- MIPS CPU options:
528 CONFIG_SYS_INIT_SP_OFFSET
529
530 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
531 pointer. This is needed for the temporary stack before
532 relocation.
533
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200534 CONFIG_XWAY_SWAP_BYTES
535
536 Enable compilation of tools/xway-swap-bytes needed for Lantiq
537 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
538 be swapped if a flash programmer is used.
539
Christian Rieschb67d8812012-02-02 00:44:39 +0000540- ARM options:
541 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
542
543 Select high exception vectors of the ARM core, e.g., do not
544 clear the V bit of the c1 register of CP15.
545
York Sun207774b2015-03-20 19:28:08 -0700546 COUNTER_FREQUENCY
547 Generic timer clock source frequency.
548
549 COUNTER_FREQUENCY_REAL
550 Generic timer clock source frequency if the real clock is
551 different from COUNTER_FREQUENCY, and can only be determined
552 at run time.
553
Stephen Warren73c38932015-01-19 16:25:52 -0700554- Tegra SoC options:
555 CONFIG_TEGRA_SUPPORT_NON_SECURE
556
557 Support executing U-Boot in non-secure (NS) mode. Certain
558 impossible actions will be skipped if the CPU is in NS mode,
559 such as ARM architectural timer initialization.
560
wdenk5da627a2003-10-09 20:09:04 +0000561- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000562 CONFIG_CLOCKS_IN_MHZ
563
564 U-Boot stores all clock information in Hz
565 internally. For binary compatibility with older Linux
566 kernels (which expect the clocks passed in the
567 bd_info data to be in MHz) the environment variable
568 "clocks_in_mhz" can be defined so that U-Boot
569 converts clock data to MHZ before passing it to the
570 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000571 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100572 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000573 default environment.
574
wdenk5da627a2003-10-09 20:09:04 +0000575 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
576
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800577 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000578 expect it to be in bytes, others in MB.
579 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
580
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400581 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200582
583 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400584 passed using flattened device trees (based on open firmware
585 concepts).
586
587 CONFIG_OF_LIBFDT
588 * New libfdt-based support
589 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500590 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400591
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200592 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600593 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200594
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200595 boards with QUICC Engines require OF_QE to set UCC MAC
596 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500597
Kumar Gala4e253132006-01-11 13:54:17 -0600598 CONFIG_OF_BOARD_SETUP
599
600 Board code has addition modification that it wants to make
601 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000602
Simon Glassc654b512014-10-23 18:58:54 -0600603 CONFIG_OF_SYSTEM_SETUP
604
605 Other code has addition modification that it wants to make
606 to the flat device tree before handing it off to the kernel.
607 This causes ft_system_setup() to be called before booting
608 the kernel.
609
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200610 CONFIG_OF_IDE_FIXUP
611
612 U-Boot can detect if an IDE device is present or not.
613 If not, and this new config option is activated, U-Boot
614 removes the ATA node from the DTS before booting Linux,
615 so the Linux IDE driver does not probe the device and
616 crash. This is needed for buggy hardware (uc101) where
617 no pull down resistor is connected to the signal IDE5V_DD7.
618
Igor Grinberg7eb29392011-07-14 05:45:07 +0000619 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
620
621 This setting is mandatory for all boards that have only one
622 machine type and must be used to specify the machine type
623 number as it appears in the ARM machine registry
624 (see http://www.arm.linux.org.uk/developer/machines/).
625 Only boards that have multiple machine types supported
626 in a single configuration file and the machine type is
627 runtime discoverable, do not have to use this setting.
628
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100629- vxWorks boot parameters:
630
631 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700632 environments variables: bootdev, bootfile, ipaddr, netmask,
633 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100634 It loads the vxWorks image pointed bootfile.
635
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100636 Note: If a "bootargs" environment is defined, it will overwride
637 the defaults discussed just above.
638
Aneesh V2c451f72011-06-16 23:30:47 +0000639- Cache Configuration:
Aneesh V2c451f72011-06-16 23:30:47 +0000640 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
641
Aneesh V93bc2192011-06-16 23:30:51 +0000642- Cache Configuration for ARM:
643 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
644 controller
645 CONFIG_SYS_PL310_BASE - Physical base address of PL310
646 controller register space
647
wdenk6705d812004-08-02 23:22:59 +0000648- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200649 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000650
651 Define this if you want support for Amba PrimeCell PL010 UARTs.
652
Andreas Engel48d01922008-09-08 14:30:53 +0200653 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000654
655 Define this if you want support for Amba PrimeCell PL011 UARTs.
656
657 CONFIG_PL011_CLOCK
658
659 If you have Amba PrimeCell PL011 UARTs, set this variable to
660 the clock speed of the UARTs.
661
662 CONFIG_PL01x_PORTS
663
664 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
665 define this to a list of base addresses for each (supported)
666 port. See e.g. include/configs/versatile.h
667
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400668 CONFIG_SERIAL_HW_FLOW_CONTROL
669
670 Define this variable to enable hw flow control in serial driver.
671 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000672
wdenkc6097192002-11-03 00:24:07 +0000673- Console Baudrate:
674 CONFIG_BAUDRATE - in bps
675 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200676 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000677
wdenkc6097192002-11-03 00:24:07 +0000678- Autoboot Command:
679 CONFIG_BOOTCOMMAND
680 Only needed when CONFIG_BOOTDELAY is enabled;
681 define a command string that is automatically executed
682 when no character is read on the console interface
683 within "Boot Delay" after reset.
684
wdenkc6097192002-11-03 00:24:07 +0000685 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000686 The value of these goes into the environment as
687 "ramboot" and "nfsboot" respectively, and can be used
688 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200689 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000690
wdenkc6097192002-11-03 00:24:07 +0000691- Serial Download Echo Mode:
692 CONFIG_LOADS_ECHO
693 If defined to 1, all characters received during a
694 serial download (using the "loads" command) are
695 echoed back. This might be needed by some terminal
696 emulations (like "cu"), but may as well just take
697 time on others. This setting #define's the initial
698 value of the "loads_echo" environment variable.
699
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500700- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000701 CONFIG_KGDB_BAUDRATE
702 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200703 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000704
Simon Glass302a6482016-03-13 19:07:28 -0600705- Removal of commands
706 If no commands are needed to boot, you can disable
707 CONFIG_CMDLINE to remove them. In this case, the command line
708 will not be available, and when U-Boot wants to execute the
709 boot command (on start-up) it will call board_run_command()
710 instead. This can reduce image size significantly for very
711 simple boot procedures.
712
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000713- Regular expression support:
714 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200715 If this variable is defined, U-Boot is linked against
716 the SLRE (Super Light Regular Expression) library,
717 which adds regex support to some commands, as for
718 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000719
Simon Glass45ba8072011-10-15 05:48:20 +0000720- Device tree:
721 CONFIG_OF_CONTROL
722 If this variable is defined, U-Boot will use a device tree
723 to configure its devices, instead of relying on statically
724 compiled #defines in the board file. This option is
725 experimental and only available on a few boards. The device
726 tree is available in the global data as gd->fdt_blob.
727
Simon Glass2c0f79e2011-10-24 19:15:31 +0000728 U-Boot needs to get its device tree from somewhere. This can
Alex Deymo82f766d2017-04-02 01:25:20 -0700729 be done using one of the three options below:
Simon Glassbbb0b122011-10-15 05:48:21 +0000730
731 CONFIG_OF_EMBED
732 If this variable is defined, U-Boot will embed a device tree
733 binary in its image. This device tree file should be in the
734 board directory and called <soc>-<board>.dts. The binary file
735 is then picked up in board_init_f() and made available through
Nobuhiro Iwamatsueb3eb602017-08-26 07:34:14 +0900736 the global data structure as gd->fdt_blob.
Simon Glass45ba8072011-10-15 05:48:20 +0000737
Simon Glass2c0f79e2011-10-24 19:15:31 +0000738 CONFIG_OF_SEPARATE
739 If this variable is defined, U-Boot will build a device tree
740 binary. It will be called u-boot.dtb. Architecture-specific
741 code will locate it at run-time. Generally this works by:
742
743 cat u-boot.bin u-boot.dtb >image.bin
744
745 and in fact, U-Boot does this for you, creating a file called
746 u-boot-dtb.bin which is useful in the common case. You can
747 still use the individual files if you need something more
748 exotic.
749
Alex Deymo82f766d2017-04-02 01:25:20 -0700750 CONFIG_OF_BOARD
751 If this variable is defined, U-Boot will use the device tree
752 provided by the board at runtime instead of embedding one with
753 the image. Only boards defining board_fdt_blob_setup() support
754 this option (see include/fdtdec.h file).
755
wdenkc6097192002-11-03 00:24:07 +0000756- Watchdog:
757 CONFIG_WATCHDOG
758 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000759 support for the SoC. There must be support in the SoC
Christophe Leroy907208c2017-07-06 10:23:22 +0200760 specific code for a watchdog. For the 8xx
761 CPUs, the SIU Watchdog feature is enabled in the SYPCR
762 register. When supported for a specific SoC is
763 available, then no further board specific code should
764 be needed to use it.
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000765
766 CONFIG_HW_WATCHDOG
767 When using a watchdog circuitry external to the used
768 SoC, then define this variable and provide board
769 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +0000770
771- Real-Time Clock:
772
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500773 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +0000774 has to be selected, too. Define exactly one of the
775 following options:
776
wdenkc6097192002-11-03 00:24:07 +0000777 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +0000778 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +0000779 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +0000780 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +0000781 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +0000782 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +0200783 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +0000784 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +0100785 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +0000786 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Chris Packham2bd3cab2017-05-30 12:03:33 +1200787 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +0200788 CONFIG_SYS_RV3029_TCR - enable trickle charger on
789 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +0000790
wdenkb37c7e52003-06-30 16:24:52 +0000791 Note that if the RTC uses I2C, then the I2C interface
792 must also be configured. See I2C Support, below.
793
Peter Tysere92739d2008-12-17 16:36:21 -0600794- GPIO Support:
795 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -0600796
Chris Packham5dec49c2010-12-19 10:12:13 +0000797 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
798 chip-ngpio pairs that tell the PCA953X driver the number of
799 pins supported by a particular chip.
800
Peter Tysere92739d2008-12-17 16:36:21 -0600801 Note that if the GPIO device uses I2C, then the I2C interface
802 must also be configured. See I2C Support, below.
803
Simon Glassaa532332014-06-11 23:29:41 -0600804- I/O tracing:
805 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
806 accesses and can checksum them or write a list of them out
807 to memory. See the 'iotrace' command for details. This is
808 useful for testing device drivers since it can confirm that
809 the driver behaves the same way before and after a code
810 change. Currently this is supported on sandbox and arm. To
811 add support for your architecture, add '#include <iotrace.h>'
812 to the bottom of arch/<arch>/include/asm/io.h and test.
813
814 Example output from the 'iotrace stats' command is below.
815 Note that if the trace buffer is exhausted, the checksum will
816 still continue to operate.
817
818 iotrace is enabled
819 Start: 10000000 (buffer start address)
820 Size: 00010000 (buffer size)
821 Offset: 00000120 (current buffer offset)
822 Output: 10000120 (start + offset)
823 Count: 00000018 (number of trace records)
824 CRC32: 9526fb66 (CRC32 of all trace records)
825
wdenkc6097192002-11-03 00:24:07 +0000826- Timestamp Support:
827
wdenk43d96162003-03-06 00:02:04 +0000828 When CONFIG_TIMESTAMP is selected, the timestamp
829 (date and time) of an image is printed by image
830 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500831 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +0000832
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000833- Partition Labels (disklabels) Supported:
834 Zero or more of the following:
835 CONFIG_MAC_PARTITION Apple's MacOS partition table.
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000836 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
837 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
838 bootloader. Note 2TB partition limit; see
839 disk/part_efi.c
Simon Glassc649e3c2016-05-01 11:36:02 -0600840 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000841 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +0000842
843- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +0000844 CONFIG_IDE_RESET_ROUTINE - this is defined in several
845 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +0000846
wdenk4d13cba2004-03-14 14:09:05 +0000847 CONFIG_IDE_RESET - is this is defined, IDE Reset will
848 be performed by calling the function
849 ide_set_reset(int reset)
850 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +0000851
852- ATAPI Support:
853 CONFIG_ATAPI
854
855 Set this to enable ATAPI support.
856
wdenkc40b2952004-03-13 23:29:43 +0000857- LBA48 Support
858 CONFIG_LBA48
859
860 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +0100861 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +0000862 Whithout these , LBA48 support uses 32bit variables and will 'only'
863 support disks up to 2.1TB.
864
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200865 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +0000866 When enabled, makes the IDE subsystem use 64bit sector addresses.
867 Default is 32bit.
868
wdenkc6097192002-11-03 00:24:07 +0000869- SCSI Support:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200870 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
871 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
872 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +0000873 maximum numbers of LUNs, SCSI ID's and target
874 devices.
wdenkc6097192002-11-03 00:24:07 +0000875
Wolfgang Denk93e14592013-10-04 17:43:24 +0200876 The environment variable 'scsidevs' is set to the number of
877 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +0000878
wdenkc6097192002-11-03 00:24:07 +0000879- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +0000880 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +0000881 Support for Intel 8254x/8257x gigabit chips.
882
883 CONFIG_E1000_SPI
884 Utility code for direct access to the SPI bus on Intel 8257x.
885 This does not do anything useful unless you set at least one
886 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
887
888 CONFIG_E1000_SPI_GENERIC
889 Allow generic access to the SPI bus on the Intel 8257x, for
890 example with the "sspi" command.
891
wdenkc6097192002-11-03 00:24:07 +0000892 CONFIG_EEPRO100
893 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200894 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +0000895 write routine for first time initialisation.
896
897 CONFIG_TULIP
898 Support for Digital 2114x chips.
899 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
900 modem chip initialisation (KS8761/QS6611).
901
902 CONFIG_NATSEMI
903 Support for National dp83815 chips.
904
905 CONFIG_NS8382X
906 Support for National dp8382[01] gigabit chips.
907
wdenk45219c42003-05-12 21:50:16 +0000908- NETWORK Support (other):
909
Jens Scharsigc041e9d2010-01-23 12:03:45 +0100910 CONFIG_DRIVER_AT91EMAC
911 Support for AT91RM9200 EMAC.
912
913 CONFIG_RMII
914 Define this to use reduced MII inteface
915
916 CONFIG_DRIVER_AT91EMAC_QUIET
917 If this defined, the driver is quiet.
918 The driver doen't show link status messages.
919
Rob Herringefdd7312011-12-15 11:15:49 +0000920 CONFIG_CALXEDA_XGMAC
921 Support for the Calxeda XGMAC device
922
Ashok3bb46d22012-10-15 06:20:47 +0000923 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +0000924 Support for SMSC's LAN91C96 chips.
925
wdenk45219c42003-05-12 21:50:16 +0000926 CONFIG_LAN91C96_USE_32_BIT
927 Define this to enable 32 bit addressing
928
Ashok3bb46d22012-10-15 06:20:47 +0000929 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +0000930 Support for SMSC's LAN91C111 chip
931
932 CONFIG_SMC91111_BASE
933 Define this to hold the physical address
934 of the device (I/O space)
935
936 CONFIG_SMC_USE_32_BIT
937 Define this if data bus is 32 bits
938
939 CONFIG_SMC_USE_IOFUNCS
940 Define this to use i/o functions instead of macros
941 (some hardware wont work with macros)
942
Heiko Schocherdc02bad2011-11-15 10:00:04 -0500943 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
944 Define this if you have more then 3 PHYs.
945
Macpaul Linb3dbf4a52010-12-21 16:59:46 +0800946 CONFIG_FTGMAC100
947 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
948
949 CONFIG_FTGMAC100_EGIGA
950 Define this to use GE link update with gigabit PHY.
951 Define this if FTGMAC100 is connected to gigabit PHY.
952 If your system has 10/100 PHY only, it might not occur
953 wrong behavior. Because PHY usually return timeout or
954 useless data when polling gigabit status and gigabit
955 control registers. This behavior won't affect the
956 correctnessof 10/100 link speed update.
957
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +0900958 CONFIG_SH_ETHER
959 Support for Renesas on-chip Ethernet controller
960
961 CONFIG_SH_ETHER_USE_PORT
962 Define the number of ports to be used
963
964 CONFIG_SH_ETHER_PHY_ADDR
965 Define the ETH PHY's address
966
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +0900967 CONFIG_SH_ETHER_CACHE_WRITEBACK
968 If this option is set, the driver enables cache flush.
969
Vadim Bendebury5e124722011-10-17 08:36:14 +0000970- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +0000971 CONFIG_TPM
972 Support TPM devices.
973
Christophe Ricard0766ad22015-10-06 22:54:41 +0200974 CONFIG_TPM_TIS_INFINEON
975 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +0000976 per system is supported at this time.
977
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +0000978 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
979 Define the burst count bytes upper limit
980
Christophe Ricard3aa74082016-01-21 23:27:13 +0100981 CONFIG_TPM_ST33ZP24
982 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
983
984 CONFIG_TPM_ST33ZP24_I2C
985 Support for STMicroelectronics ST33ZP24 I2C devices.
986 Requires TPM_ST33ZP24 and I2C.
987
Christophe Ricardb75fdc12016-01-21 23:27:14 +0100988 CONFIG_TPM_ST33ZP24_SPI
989 Support for STMicroelectronics ST33ZP24 SPI devices.
990 Requires TPM_ST33ZP24 and SPI.
991
Dirk Eibachc01939c2013-06-26 15:55:15 +0200992 CONFIG_TPM_ATMEL_TWI
993 Support for Atmel TWI TPM device. Requires I2C support.
994
Che-liang Chiou90899cc2013-04-12 11:04:34 +0000995 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +0000996 Support for generic parallel port TPM devices. Only one device
997 per system is supported at this time.
998
999 CONFIG_TPM_TIS_BASE_ADDRESS
1000 Base address where the generic TPM device is mapped
1001 to. Contemporary x86 systems usually map it at
1002 0xfed40000.
1003
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001004 CONFIG_TPM
1005 Define this to enable the TPM support library which provides
1006 functional interfaces to some TPM commands.
1007 Requires support for a TPM device.
1008
1009 CONFIG_TPM_AUTH_SESSIONS
1010 Define this to enable authorized functions in the TPM library.
1011 Requires CONFIG_TPM and CONFIG_SHA1.
1012
wdenkc6097192002-11-03 00:24:07 +00001013- USB Support:
1014 At the moment only the UHCI host controller is
Heiko Schocher064b55c2017-06-14 05:49:40 +02001015 supported (PIP405, MIP405); define
wdenkc6097192002-11-03 00:24:07 +00001016 CONFIG_USB_UHCI to enable it.
1017 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001018 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001019 storage devices.
1020 Note:
1021 Supported are USB Keyboards and USB Floppy drives
1022 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001023
Simon Glass9ab4ce22012-02-27 10:52:47 +00001024 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1025 txfilltuning field in the EHCI controller on reset.
1026
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001027 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1028 HW module registers.
1029
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001030- USB Device:
1031 Define the below if you wish to use the USB console.
1032 Once firmware is rebuilt from a serial console issue the
1033 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001034 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001035 it has found a new device. The environment variable usbtty
1036 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001037 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001038 Common Device Class Abstract Control Model serial device.
1039 If you select usbtty = gserial you should be able to enumerate
1040 a Linux host by
1041 # modprobe usbserial vendor=0xVendorID product=0xProductID
1042 else if using cdc_acm, simply setting the environment
1043 variable usbtty to be cdc_acm should suffice. The following
1044 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001045
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001046 CONFIG_USB_DEVICE
1047 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001048
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001049 CONFIG_USB_TTY
1050 Define this to have a tty type of device available to
1051 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001052
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301053 CONFIG_USBD_HS
1054 Define this to enable the high speed support for usb
1055 device and usbtty. If this feature is enabled, a routine
1056 int is_usbd_high_speed(void)
1057 also needs to be defined by the driver to dynamically poll
1058 whether the enumeration has succeded at high speed or full
1059 speed.
1060
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001061 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001062 Define this if you want stdin, stdout &/or stderr to
1063 be set to usbtty.
1064
Wolfgang Denk386eda02006-06-14 18:14:56 +02001065 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001066 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001067 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001068 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1069 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1070 should pretend to be a Linux device to it's target host.
1071
1072 CONFIG_USBD_MANUFACTURER
1073 Define this string as the name of your company for
1074 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001075
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001076 CONFIG_USBD_PRODUCT_NAME
1077 Define this string as the name of your product
1078 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1079
1080 CONFIG_USBD_VENDORID
1081 Define this as your assigned Vendor ID from the USB
1082 Implementors Forum. This *must* be a genuine Vendor ID
1083 to avoid polluting the USB namespace.
1084 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001085
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001086 CONFIG_USBD_PRODUCTID
1087 Define this as the unique Product ID
1088 for your device
1089 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001090
Igor Grinbergd70a5602011-12-12 12:08:35 +02001091- ULPI Layer Support:
1092 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1093 the generic ULPI layer. The generic layer accesses the ULPI PHY
1094 via the platform viewport, so you need both the genric layer and
1095 the viewport enabled. Currently only Chipidea/ARC based
1096 viewport is supported.
1097 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1098 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001099 If your ULPI phy needs a different reference clock than the
1100 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1101 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001102
1103- MMC Support:
1104 The MMC controller on the Intel PXA is supported. To
1105 enable this define CONFIG_MMC. The MMC can be
1106 accessed from the boot prompt by mapping the device
1107 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001108 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1109 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001110
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001111 CONFIG_SH_MMCIF
1112 Support for Renesas on-chip MMCIF controller
1113
1114 CONFIG_SH_MMCIF_ADDR
1115 Define the base address of MMCIF registers
1116
1117 CONFIG_SH_MMCIF_CLK
1118 Define the clock frequency for MMCIF
1119
Tom Rinib3ba6e92013-03-14 05:32:47 +00001120- USB Device Firmware Update (DFU) class support:
Marek Vasutbb4059a2018-02-16 16:41:18 +01001121 CONFIG_DFU_OVER_USB
Tom Rinib3ba6e92013-03-14 05:32:47 +00001122 This enables the USB portion of the DFU USB class
1123
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001124 CONFIG_DFU_NAND
1125 This enables support for exposing NAND devices via DFU.
1126
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301127 CONFIG_DFU_RAM
1128 This enables support for exposing RAM via DFU.
1129 Note: DFU spec refer to non-volatile memory usage, but
1130 allow usages beyond the scope of spec - here RAM usage,
1131 one that would help mostly the developer.
1132
Heiko Schochere7e75c72013-06-12 06:05:51 +02001133 CONFIG_SYS_DFU_DATA_BUF_SIZE
1134 Dfu transfer uses a buffer before writing data to the
1135 raw storage device. Make the size (in bytes) of this buffer
1136 configurable. The size of this buffer is also configurable
1137 through the "dfu_bufsiz" environment variable.
1138
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001139 CONFIG_SYS_DFU_MAX_FILE_SIZE
1140 When updating files rather than the raw storage device,
1141 we use a static buffer to copy the file into and then write
1142 the buffer once we've been given the whole file. Define
1143 this to the maximum filesize (in bytes) for the buffer.
1144 Default is 4 MiB if undefined.
1145
Heiko Schocher001a8312014-03-18 08:09:56 +01001146 DFU_DEFAULT_POLL_TIMEOUT
1147 Poll timeout [ms], is the timeout a device can send to the
1148 host. The host must wait for this timeout before sending
1149 a subsequent DFU_GET_STATUS request to the device.
1150
1151 DFU_MANIFEST_POLL_TIMEOUT
1152 Poll timeout [ms], which the device sends to the host when
1153 entering dfuMANIFEST state. Host waits this timeout, before
1154 sending again an USB request to the device.
1155
wdenk6705d812004-08-02 23:22:59 +00001156- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001157 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001158 Define these for a default partition on a NAND device
1159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001160 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1161 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001162 Define these for a default partition on a NOR device
1163
wdenkc6097192002-11-03 00:24:07 +00001164- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001165 See Kconfig help for available keyboard drivers.
1166
1167 CONFIG_KEYBOARD
1168
1169 Define this to enable a custom keyboard support.
1170 This simply calls drv_keyboard_init() which must be
1171 defined in your board-specific files. This option is deprecated
1172 and is only used by novena. For new boards, use driver model
1173 instead.
wdenkc6097192002-11-03 00:24:07 +00001174
1175- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001176 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001177 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001178 SOCs that have a DIU should define this macro to enable DIU
1179 support, and should also define these other macros:
1180
1181 CONFIG_SYS_DIU_ADDR
1182 CONFIG_VIDEO
Timur Tabi7d3053f2011-02-15 17:09:19 -06001183 CONFIG_CFB_CONSOLE
1184 CONFIG_VIDEO_SW_CURSOR
1185 CONFIG_VGA_AS_SINGLE_DEVICE
1186 CONFIG_VIDEO_LOGO
1187 CONFIG_VIDEO_BMP_LOGO
1188
Timur Tabiba8e76b2011-04-11 14:18:22 -05001189 The DIU driver will look for the 'video-mode' environment
1190 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001191 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001192 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001193
wdenkc6097192002-11-03 00:24:07 +00001194- LCD Support: CONFIG_LCD
1195
1196 Define this to enable LCD support (for output to LCD
1197 display); also select one of the supported displays
1198 by defining one of these:
1199
Stelian Pop39cf4802008-05-09 21:57:18 +02001200 CONFIG_ATMEL_LCD:
1201
1202 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1203
wdenkfd3103b2003-11-25 16:55:19 +00001204 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001205
wdenkfd3103b2003-11-25 16:55:19 +00001206 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001207
wdenkfd3103b2003-11-25 16:55:19 +00001208 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001209
wdenkfd3103b2003-11-25 16:55:19 +00001210 NEC NL6448BC20-08. 6.5", 640x480.
1211 Active, color, single scan.
1212
1213 CONFIG_NEC_NL6448BC33_54
1214
1215 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001216 Active, color, single scan.
1217
1218 CONFIG_SHARP_16x9
1219
1220 Sharp 320x240. Active, color, single scan.
1221 It isn't 16x9, and I am not sure what it is.
1222
1223 CONFIG_SHARP_LQ64D341
1224
1225 Sharp LQ64D341 display, 640x480.
1226 Active, color, single scan.
1227
1228 CONFIG_HLD1045
1229
1230 HLD1045 display, 640x480.
1231 Active, color, single scan.
1232
1233 CONFIG_OPTREX_BW
1234
1235 Optrex CBL50840-2 NF-FW 99 22 M5
1236 or
1237 Hitachi LMG6912RPFC-00T
1238 or
1239 Hitachi SP14Q002
1240
1241 320x240. Black & white.
1242
Simon Glass676d3192012-10-17 13:24:54 +00001243 CONFIG_LCD_ALIGNMENT
1244
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001245 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001246 defined then the LCD will be aligned to this value instead.
1247 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1248 here, since it is cheaper to change data cache settings on
1249 a per-section basis.
1250
1251
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001252 CONFIG_LCD_ROTATION
1253
1254 Sometimes, for example if the display is mounted in portrait
1255 mode or even if it's mounted landscape but rotated by 180degree,
1256 we need to rotate our content of the display relative to the
1257 framebuffer, so that user can read the messages which are
1258 printed out.
1259 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1260 initialized with a given rotation from "vl_rot" out of
1261 "vidinfo_t" which is provided by the board specific code.
1262 The value for vl_rot is coded as following (matching to
1263 fbcon=rotate:<n> linux-kernel commandline):
1264 0 = no rotation respectively 0 degree
1265 1 = 90 degree rotation
1266 2 = 180 degree rotation
1267 3 = 270 degree rotation
1268
1269 If CONFIG_LCD_ROTATION is not defined, the console will be
1270 initialized with 0degree rotation.
1271
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001272 CONFIG_LCD_BMP_RLE8
1273
1274 Support drawing of RLE8-compressed bitmaps on the LCD.
1275
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001276 CONFIG_I2C_EDID
1277
1278 Enables an 'i2c edid' command which can read EDID
1279 information over I2C from an attached LCD display.
1280
wdenk7152b1d2003-09-05 23:19:14 +00001281- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001282
wdenk8bde7f72003-06-27 21:31:46 +00001283 If this option is set, the environment is checked for
1284 a variable "splashimage". If found, the usual display
1285 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001286 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001287 specified in "splashimage" is loaded instead. The
1288 console is redirected to the "nulldev", too. This
1289 allows for a "silent" boot where a splash screen is
1290 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001291
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001292 CONFIG_SPLASHIMAGE_GUARD
1293
1294 If this option is set, then U-Boot will prevent the environment
1295 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001296 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001297 This option is useful for targets where, due to alignment
1298 restrictions, an improperly aligned BMP image will cause a data
1299 abort. If you think you will not have problems with unaligned
1300 accesses (for example because your toolchain prevents them)
1301 there is no need to set this option.
1302
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001303 CONFIG_SPLASH_SCREEN_ALIGN
1304
1305 If this option is set the splash image can be freely positioned
1306 on the screen. Environment variable "splashpos" specifies the
1307 position as "x,y". If a positive number is given it is used as
1308 number of pixel from left/top. If a negative number is given it
1309 is used as number of pixel from right/bottom. You can also
1310 specify 'm' for centering the image.
1311
1312 Example:
1313 setenv splashpos m,m
1314 => image at center of screen
1315
1316 setenv splashpos 30,20
1317 => image at x = 30 and y = 20
1318
1319 setenv splashpos -10,m
1320 => vertically centered image
1321 at x = dspWidth - bmpWidth - 9
1322
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001323- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1324
1325 If this option is set, additionally to standard BMP
1326 images, gzipped BMP images can be displayed via the
1327 splashscreen support or the bmp command.
1328
Anatolij Gustschind5011762010-03-15 14:50:25 +01001329- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1330
1331 If this option is set, 8-bit RLE compressed BMP images
1332 can be displayed via the splashscreen support or the
1333 bmp command.
1334
wdenkc29fdfc2003-08-29 20:57:53 +00001335- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001336 CONFIG_GZIP
1337
1338 Enabled by default to support gzip compressed images.
1339
wdenkc29fdfc2003-08-29 20:57:53 +00001340 CONFIG_BZIP2
1341
1342 If this option is set, support for bzip2 compressed
1343 images is included. If not, only uncompressed and gzip
1344 compressed images are supported.
1345
wdenk42d1f032003-10-15 23:53:47 +00001346 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001347 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001348 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001349
wdenk17ea1172004-06-06 21:51:03 +00001350- MII/PHY support:
wdenk17ea1172004-06-06 21:51:03 +00001351 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1352
1353 The clock frequency of the MII bus
1354
wdenk17ea1172004-06-06 21:51:03 +00001355 CONFIG_PHY_RESET_DELAY
1356
1357 Some PHY like Intel LXT971A need extra delay after
1358 reset before any MII register access is possible.
1359 For such PHY, set this option to the usec delay
1360 required. (minimum 300usec for LXT971A)
1361
1362 CONFIG_PHY_CMD_DELAY (ppc4xx)
1363
1364 Some PHY like Intel LXT971A need extra delay after
1365 command issued before MII status register can be read
1366
wdenkc6097192002-11-03 00:24:07 +00001367- IP address:
1368 CONFIG_IPADDR
1369
1370 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001371 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001372 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001373 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001374
1375- Server IP address:
1376 CONFIG_SERVERIP
1377
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001378 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001379 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001380 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001381
Robin Getz97cfe862009-07-21 12:15:28 -04001382 CONFIG_KEEP_SERVERADDR
1383
1384 Keeps the server's MAC address, in the env 'serveraddr'
1385 for passing to bootargs (like Linux's netconsole option)
1386
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001387- Gateway IP address:
1388 CONFIG_GATEWAYIP
1389
1390 Defines a default value for the IP address of the
1391 default router where packets to other networks are
1392 sent to.
1393 (Environment variable "gatewayip")
1394
1395- Subnet mask:
1396 CONFIG_NETMASK
1397
1398 Defines a default value for the subnet mask (or
1399 routing prefix) which is used to determine if an IP
1400 address belongs to the local subnet or needs to be
1401 forwarded through a router.
1402 (Environment variable "netmask")
1403
wdenkc6097192002-11-03 00:24:07 +00001404- BOOTP Recovery Mode:
1405 CONFIG_BOOTP_RANDOM_DELAY
1406
1407 If you have many targets in a network that try to
1408 boot using BOOTP, you may want to avoid that all
1409 systems send out BOOTP requests at precisely the same
1410 moment (which would happen for instance at recovery
1411 from a power failure, when all systems will try to
1412 boot, thus flooding the BOOTP server. Defining
1413 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1414 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001415 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001416
1417 1st BOOTP request: delay 0 ... 1 sec
1418 2nd BOOTP request: delay 0 ... 2 sec
1419 3rd BOOTP request: delay 0 ... 4 sec
1420 4th and following
1421 BOOTP requests: delay 0 ... 8 sec
1422
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001423 CONFIG_BOOTP_ID_CACHE_SIZE
1424
1425 BOOTP packets are uniquely identified using a 32-bit ID. The
1426 server will copy the ID from client requests to responses and
1427 U-Boot will use this to determine if it is the destination of
1428 an incoming response. Some servers will check that addresses
1429 aren't in use before handing them out (usually using an ARP
1430 ping) and therefore take up to a few hundred milliseconds to
1431 respond. Network congestion may also influence the time it
1432 takes for a response to make it back to the client. If that
1433 time is too long, U-Boot will retransmit requests. In order
1434 to allow earlier responses to still be accepted after these
1435 retransmissions, U-Boot's BOOTP client keeps a small cache of
1436 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1437 cache. The default is to keep IDs for up to four outstanding
1438 requests. Increasing this will allow U-Boot to accept offers
1439 from a BOOTP client in networks with unusually high latency.
1440
stroesefe389a82003-08-28 14:17:32 +00001441- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001442 You can fine tune the DHCP functionality by defining
1443 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001444
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001445 CONFIG_BOOTP_NISDOMAIN
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001446 CONFIG_BOOTP_BOOTFILESIZE
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001447 CONFIG_BOOTP_SEND_HOSTNAME
1448 CONFIG_BOOTP_NTPSERVER
1449 CONFIG_BOOTP_TIMEOFFSET
1450 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001451 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001452
Wilson Callan5d110f02007-07-28 10:56:13 -04001453 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1454 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001455
Joe Hershberger2c00e092012-05-23 07:59:19 +00001456 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1457 after the configured retry count, the call will fail
1458 instead of starting over. This can be used to fail over
1459 to Link-local IP address configuration if the DHCP server
1460 is not available.
1461
stroesefe389a82003-08-28 14:17:32 +00001462 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1463 to do a dynamic update of a DNS server. To do this, they
1464 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001465 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001466 of the "hostname" environment variable is passed as
1467 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001468
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001469 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1470
1471 A 32bit value in microseconds for a delay between
1472 receiving a "DHCP Offer" and sending the "DHCP Request".
1473 This fixes a problem with certain DHCP servers that don't
1474 respond 100% of the time to a "DHCP request". E.g. On an
1475 AT91RM9200 processor running at 180MHz, this delay needed
1476 to be *at least* 15,000 usec before a Windows Server 2003
1477 DHCP server would reply 100% of the time. I recommend at
1478 least 50,000 usec to be safe. The alternative is to hope
1479 that one of the retries will be successful but note that
1480 the DHCP timeout and retry process takes a longer than
1481 this delay.
1482
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001483 - Link-local IP address negotiation:
1484 Negotiate with other link-local clients on the local network
1485 for an address that doesn't require explicit configuration.
1486 This is especially useful if a DHCP server cannot be guaranteed
1487 to exist in all environments that the device must operate.
1488
1489 See doc/README.link-local for more information.
1490
Prabhakar Kushwaha24acb832017-11-23 16:51:32 +05301491 - MAC address from environment variables
1492
1493 FDT_SEQ_MACADDR_FROM_ENV
1494
1495 Fix-up device tree with MAC addresses fetched sequentially from
1496 environment variables. This config work on assumption that
1497 non-usable ethernet node of device-tree are either not present
1498 or their status has been marked as "disabled".
1499
wdenka3d991b2004-04-15 21:48:45 +00001500 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001501 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001502
1503 The device id used in CDP trigger frames.
1504
1505 CONFIG_CDP_DEVICE_ID_PREFIX
1506
1507 A two character string which is prefixed to the MAC address
1508 of the device.
1509
1510 CONFIG_CDP_PORT_ID
1511
1512 A printf format string which contains the ascii name of
1513 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001514 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00001515
1516 CONFIG_CDP_CAPABILITIES
1517
1518 A 32bit integer which indicates the device capabilities;
1519 0x00000010 for a normal host which does not forwards.
1520
1521 CONFIG_CDP_VERSION
1522
1523 An ascii string containing the version of the software.
1524
1525 CONFIG_CDP_PLATFORM
1526
1527 An ascii string containing the name of the platform.
1528
1529 CONFIG_CDP_TRIGGER
1530
1531 A 32bit integer sent on the trigger.
1532
1533 CONFIG_CDP_POWER_CONSUMPTION
1534
1535 A 16bit integer containing the power consumption of the
1536 device in .1 of milliwatts.
1537
1538 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1539
1540 A byte containing the id of the VLAN.
1541
Uri Mashiach79267ed2017-01-19 10:51:05 +02001542- Status LED: CONFIG_LED_STATUS
wdenkc6097192002-11-03 00:24:07 +00001543
1544 Several configurations allow to display the current
1545 status using a LED. For instance, the LED will blink
1546 fast while running U-Boot code, stop blinking as
1547 soon as a reply to a BOOTP request was received, and
1548 start blinking slow once the Linux kernel is running
1549 (supported by a status LED driver in the Linux
Uri Mashiach79267ed2017-01-19 10:51:05 +02001550 kernel). Defining CONFIG_LED_STATUS enables this
wdenkc6097192002-11-03 00:24:07 +00001551 feature in U-Boot.
1552
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001553 Additional options:
1554
Uri Mashiach79267ed2017-01-19 10:51:05 +02001555 CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001556 The status LED can be connected to a GPIO pin.
1557 In such cases, the gpio_led driver can be used as a
Uri Mashiach79267ed2017-01-19 10:51:05 +02001558 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001559 to include the gpio_led driver in the U-Boot binary.
1560
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02001561 CONFIG_GPIO_LED_INVERTED_TABLE
1562 Some GPIO connected LEDs may have inverted polarity in which
1563 case the GPIO high value corresponds to LED off state and
1564 GPIO low value corresponds to LED on state.
1565 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1566 with a list of GPIO LEDs that have inverted polarity.
1567
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001568- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00001569
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001570 This enable the NEW i2c subsystem, and will allow you to use
1571 i2c commands at the u-boot command line (as long as you set
1572 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
1573 based realtime clock chips or other i2c devices. See
1574 common/cmd_i2c.c for a description of the command line
1575 interface.
1576
1577 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01001578 - drivers/i2c/soft_i2c.c:
1579 - activate first bus with CONFIG_SYS_I2C_SOFT define
1580 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
1581 for defining speed and slave address
1582 - activate second bus with I2C_SOFT_DECLARATIONS2 define
1583 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
1584 for defining speed and slave address
1585 - activate third bus with I2C_SOFT_DECLARATIONS3 define
1586 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
1587 for defining speed and slave address
1588 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
1589 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
1590 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001591
Heiko Schocher00f792e2012-10-24 13:48:22 +02001592 - drivers/i2c/fsl_i2c.c:
1593 - activate i2c driver with CONFIG_SYS_I2C_FSL
1594 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
1595 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
1596 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
1597 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02001598 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02001599 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
1600 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
1601 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
1602 second bus.
1603
Simon Glass1f2ba722012-10-30 07:28:53 +00001604 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09001605 - activate this driver with CONFIG_SYS_I2C_TEGRA
1606 - This driver adds 4 i2c buses with a fix speed from
1607 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00001608
Dirk Eibach880540d2013-04-25 02:40:01 +00001609 - drivers/i2c/ppc4xx_i2c.c
1610 - activate this driver with CONFIG_SYS_I2C_PPC4XX
1611 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
1612 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
1613
tremfac96402013-09-21 18:13:35 +02001614 - drivers/i2c/i2c_mxc.c
1615 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001616 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
1617 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
1618 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
1619 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02001620 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
1621 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
1622 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
1623 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
1624 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
1625 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001626 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
1627 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001628 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02001629 for speed, and 0 for slave.
1630
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09001631 - drivers/i2c/rcar_i2c.c:
1632 - activate this driver with CONFIG_SYS_I2C_RCAR
1633 - This driver adds 4 i2c buses
1634
1635 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
1636 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
1637 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
1638 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
1639 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
1640 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
1641 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
1642 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
1643 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
1644
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001645 - drivers/i2c/sh_i2c.c:
1646 - activate this driver with CONFIG_SYS_I2C_SH
1647 - This driver adds from 2 to 5 i2c buses
1648
1649 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
1650 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
1651 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
1652 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
1653 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
1654 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
1655 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
1656 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
1657 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
1658 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001659 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001660
Heiko Schocher6789e842013-10-22 11:03:18 +02001661 - drivers/i2c/omap24xx_i2c.c
1662 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
1663 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
1664 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
1665 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
1666 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
1667 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
1668 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
1669 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
1670 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
1671 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
1672 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
1673
Naveen Krishna Che717fc62013-12-06 12:12:38 +05301674 - drivers/i2c/s3c24x0_i2c.c:
1675 - activate this driver with CONFIG_SYS_I2C_S3C24X0
1676 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
1677 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
1678 with a fix speed from 100000 and the slave addr 0!
1679
Dirk Eibachb46226b2014-07-03 09:28:18 +02001680 - drivers/i2c/ihs_i2c.c
1681 - activate this driver with CONFIG_SYS_I2C_IHS
1682 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
1683 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
1684 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
1685 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
1686 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
1687 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
1688 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
1689 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
1690 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
1691 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
1692 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
1693 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01001694 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
1695 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
1696 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
1697 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
1698 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
1699 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
1700 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
1701 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
1702 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02001703
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001704 additional defines:
1705
1706 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06001707 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001708
1709 CONFIG_SYS_I2C_DIRECT_BUS
1710 define this, if you don't use i2c muxes on your hardware.
1711 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1712 omit this define.
1713
1714 CONFIG_SYS_I2C_MAX_HOPS
1715 define how many muxes are maximal consecutively connected
1716 on one i2c bus. If you not use i2c muxes, omit this
1717 define.
1718
1719 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001720 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001721 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1722 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1723 CONFIG_SYS_NUM_I2C_BUSES = 9:
1724
1725 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1726 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1727 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1728 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1729 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1730 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1731 {1, {I2C_NULL_HOP}}, \
1732 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1733 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1734 }
1735
1736 which defines
1737 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001738 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1739 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1740 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1741 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1742 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001743 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001744 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1745 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001746
1747 If you do not have i2c muxes on your board, omit this define.
1748
Simon Glassce3b5d62017-05-12 21:10:00 -06001749- Legacy I2C Support:
Heiko Schocherea818db2013-01-29 08:53:15 +01001750 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00001751 then the following macros need to be defined (examples are
1752 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00001753
1754 I2C_INIT
1755
wdenkb37c7e52003-06-30 16:24:52 +00001756 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00001757 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00001758
wdenkba56f622004-02-06 23:19:44 +00001759 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00001760
wdenkc6097192002-11-03 00:24:07 +00001761 I2C_ACTIVE
1762
1763 The code necessary to make the I2C data line active
1764 (driven). If the data line is open collector, this
1765 define can be null.
1766
wdenkb37c7e52003-06-30 16:24:52 +00001767 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1768
wdenkc6097192002-11-03 00:24:07 +00001769 I2C_TRISTATE
1770
1771 The code necessary to make the I2C data line tri-stated
1772 (inactive). If the data line is open collector, this
1773 define can be null.
1774
wdenkb37c7e52003-06-30 16:24:52 +00001775 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1776
wdenkc6097192002-11-03 00:24:07 +00001777 I2C_READ
1778
York Sun472d5462013-04-01 11:29:11 -07001779 Code that returns true if the I2C data line is high,
1780 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00001781
wdenkb37c7e52003-06-30 16:24:52 +00001782 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1783
wdenkc6097192002-11-03 00:24:07 +00001784 I2C_SDA(bit)
1785
York Sun472d5462013-04-01 11:29:11 -07001786 If <bit> is true, sets the I2C data line high. If it
1787 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001788
wdenkb37c7e52003-06-30 16:24:52 +00001789 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00001790 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00001791 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00001792
wdenkc6097192002-11-03 00:24:07 +00001793 I2C_SCL(bit)
1794
York Sun472d5462013-04-01 11:29:11 -07001795 If <bit> is true, sets the I2C clock line high. If it
1796 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001797
wdenkb37c7e52003-06-30 16:24:52 +00001798 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00001799 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00001800 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00001801
wdenkc6097192002-11-03 00:24:07 +00001802 I2C_DELAY
1803
1804 This delay is invoked four times per clock cycle so this
1805 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00001806 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00001807 like:
1808
wdenkb37c7e52003-06-30 16:24:52 +00001809 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00001810
Mike Frysinger793b5722010-07-21 13:38:02 -04001811 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1812
1813 If your arch supports the generic GPIO framework (asm/gpio.h),
1814 then you may alternatively define the two GPIOs that are to be
1815 used as SCL / SDA. Any of the previous I2C_xxx macros will
1816 have GPIO-based defaults assigned to them as appropriate.
1817
1818 You should define these to the GPIO value as given directly to
1819 the generic GPIO functions.
1820
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001821 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00001822
wdenk8bde7f72003-06-27 21:31:46 +00001823 When a board is reset during an i2c bus transfer
1824 chips might think that the current transfer is still
1825 in progress. On some boards it is possible to access
1826 the i2c SCLK line directly, either by using the
1827 processor pin as a GPIO or by having a second pin
1828 connected to the bus. If this option is defined a
1829 custom i2c_init_board() routine in boards/xxx/board.c
1830 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00001831
Ben Warrenbb99ad62006-09-07 16:50:54 -04001832 CONFIG_I2C_MULTI_BUS
1833
1834 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001835 must have a controller. At any point in time, only one bus is
1836 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04001837 Note that bus numbering is zero-based.
1838
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001839 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04001840
1841 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001842 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05001843 is set, specify a list of bus-device pairs. Otherwise, specify
1844 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04001845
1846 e.g.
1847 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001848 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001849
1850 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1851
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001852 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06001853 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001854
1855 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1856
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001857 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06001858
1859 If defined, then this indicates the I2C bus number for DDR SPD.
1860 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1861
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001862 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01001863
1864 If defined, then this indicates the I2C bus number for the RTC.
1865 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1866
Andrew Dyer2ac69852008-12-29 17:36:01 -06001867 CONFIG_SOFT_I2C_READ_REPEATED_START
1868
1869 defining this will force the i2c_read() function in
1870 the soft_i2c driver to perform an I2C repeated start
1871 between writing the address pointer and reading the
1872 data. If this define is omitted the default behaviour
1873 of doing a stop-start sequence will be used. Most I2C
1874 devices can use either method, but some require one or
1875 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06001876
wdenkc6097192002-11-03 00:24:07 +00001877- SPI Support: CONFIG_SPI
1878
1879 Enables SPI driver (so far only tested with
1880 SPI EEPROM, also an instance works with Crystal A/D and
1881 D/As on the SACSng board)
1882
wdenkc6097192002-11-03 00:24:07 +00001883 CONFIG_SOFT_SPI
1884
wdenk43d96162003-03-06 00:02:04 +00001885 Enables a software (bit-bang) SPI driver rather than
1886 using hardware support. This is a general purpose
1887 driver that only requires three general I/O port pins
1888 (two outputs, one input) to function. If this is
1889 defined, the board configuration must define several
1890 SPI configuration items (port pins to use, etc). For
1891 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00001892
Heiko Schocherf659b572014-07-14 10:22:11 +02001893 CONFIG_SYS_SPI_MXC_WAIT
1894 Timeout for waiting until spi transfer completed.
1895 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1896
Matthias Fuchs01335022007-12-27 17:12:34 +01001897- FPGA Support: CONFIG_FPGA
1898
1899 Enables FPGA subsystem.
1900
1901 CONFIG_FPGA_<vendor>
1902
1903 Enables support for specific chip vendors.
1904 (ALTERA, XILINX)
1905
1906 CONFIG_FPGA_<family>
1907
1908 Enables support for FPGA family.
1909 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1910
1911 CONFIG_FPGA_COUNT
wdenkc6097192002-11-03 00:24:07 +00001912
wdenk43d96162003-03-06 00:02:04 +00001913 Specify the number of FPGA devices to support.
wdenkc6097192002-11-03 00:24:07 +00001914
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001915 CONFIG_SYS_FPGA_PROG_FEEDBACK
wdenkc6097192002-11-03 00:24:07 +00001916
wdenk8bde7f72003-06-27 21:31:46 +00001917 Enable printing of hash marks during FPGA configuration.
wdenkc6097192002-11-03 00:24:07 +00001918
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001919 CONFIG_SYS_FPGA_CHECK_BUSY
wdenkc6097192002-11-03 00:24:07 +00001920
wdenk43d96162003-03-06 00:02:04 +00001921 Enable checks on FPGA configuration interface busy
1922 status by the configuration function. This option
1923 will require a board or device specific function to
1924 be written.
wdenkc6097192002-11-03 00:24:07 +00001925
1926 CONFIG_FPGA_DELAY
1927
1928 If defined, a function that provides delays in the FPGA
1929 configuration driver.
1930
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001931 CONFIG_SYS_FPGA_CHECK_CTRLC
wdenkc6097192002-11-03 00:24:07 +00001932 Allow Control-C to interrupt FPGA configuration
1933
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001934 CONFIG_SYS_FPGA_CHECK_ERROR
wdenkc6097192002-11-03 00:24:07 +00001935
wdenk43d96162003-03-06 00:02:04 +00001936 Check for configuration errors during FPGA bitfile
1937 loading. For example, abort during Virtex II
1938 configuration if the INIT_B line goes low (which
1939 indicated a CRC error).
wdenkc6097192002-11-03 00:24:07 +00001940
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001941 CONFIG_SYS_FPGA_WAIT_INIT
wdenkc6097192002-11-03 00:24:07 +00001942
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001943 Maximum time to wait for the INIT_B line to de-assert
1944 after PROB_B has been de-asserted during a Virtex II
wdenk43d96162003-03-06 00:02:04 +00001945 FPGA configuration sequence. The default time is 500
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001946 ms.
wdenkc6097192002-11-03 00:24:07 +00001947
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001948 CONFIG_SYS_FPGA_WAIT_BUSY
wdenkc6097192002-11-03 00:24:07 +00001949
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001950 Maximum time to wait for BUSY to de-assert during
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001951 Virtex II FPGA configuration. The default is 5 ms.
wdenkc6097192002-11-03 00:24:07 +00001952
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001953 CONFIG_SYS_FPGA_WAIT_CONFIG
wdenkc6097192002-11-03 00:24:07 +00001954
wdenk43d96162003-03-06 00:02:04 +00001955 Time to wait after FPGA configuration. The default is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001956 200 ms.
wdenkc6097192002-11-03 00:24:07 +00001957
1958- Configuration Management:
Stefan Roeseb2b8a692014-10-22 12:13:24 +02001959
wdenkc6097192002-11-03 00:24:07 +00001960 CONFIG_IDENT_STRING
1961
wdenk43d96162003-03-06 00:02:04 +00001962 If defined, this string will be added to the U-Boot
1963 version information (U_BOOT_VERSION)
wdenkc6097192002-11-03 00:24:07 +00001964
1965- Vendor Parameter Protection:
1966
wdenk43d96162003-03-06 00:02:04 +00001967 U-Boot considers the values of the environment
1968 variables "serial#" (Board Serial Number) and
wdenk7152b1d2003-09-05 23:19:14 +00001969 "ethaddr" (Ethernet Address) to be parameters that
wdenk43d96162003-03-06 00:02:04 +00001970 are set once by the board vendor / manufacturer, and
1971 protects these variables from casual modification by
1972 the user. Once set, these variables are read-only,
1973 and write or delete attempts are rejected. You can
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001974 change this behaviour:
wdenkc6097192002-11-03 00:24:07 +00001975
1976 If CONFIG_ENV_OVERWRITE is #defined in your config
1977 file, the write protection for vendor parameters is
wdenk47cd00f2003-03-06 13:39:27 +00001978 completely disabled. Anybody can change or delete
wdenkc6097192002-11-03 00:24:07 +00001979 these parameters.
1980
Joe Hershberger92ac5202015-05-04 14:55:14 -05001981 Alternatively, if you define _both_ an ethaddr in the
1982 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001983 Ethernet address is installed in the environment,
wdenkc6097192002-11-03 00:24:07 +00001984 which can be changed exactly ONCE by the user. [The
1985 serial# is unaffected by this, i. e. it remains
1986 read-only.]
1987
Joe Hershberger25980902012-12-11 22:16:31 -06001988 The same can be accomplished in a more flexible way
1989 for any variable by configuring the type of access
1990 to allow for those variables in the ".flags" variable
1991 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1992
wdenkc6097192002-11-03 00:24:07 +00001993- Protected RAM:
1994 CONFIG_PRAM
1995
1996 Define this variable to enable the reservation of
1997 "protected RAM", i. e. RAM which is not overwritten
1998 by U-Boot. Define CONFIG_PRAM to hold the number of
1999 kB you want to reserve for pRAM. You can overwrite
2000 this default value by defining an environment
2001 variable "pram" to the number of kB you want to
2002 reserve. Note that the board info structure will
2003 still show the full amount of RAM. If pRAM is
2004 reserved, a new environment variable "mem" will
2005 automatically be defined to hold the amount of
2006 remaining RAM in a form that can be passed as boot
2007 argument to Linux, for instance like that:
2008
Wolfgang Denkfe126d82005-11-20 21:40:11 +01002009 setenv bootargs ... mem=\${mem}
wdenkc6097192002-11-03 00:24:07 +00002010 saveenv
2011
2012 This way you can tell Linux not to use this memory,
2013 either, which results in a memory region that will
2014 not be affected by reboots.
2015
2016 *WARNING* If your board configuration uses automatic
2017 detection of the RAM size, you must make sure that
2018 this memory test is non-destructive. So far, the
2019 following board configurations are known to be
2020 "pRAM-clean":
2021
Heiko Schocher5b8e76c2017-06-07 17:33:09 +02002022 IVMS8, IVML24, SPD8xx,
Wolfgang Denk1b0757e2012-10-24 02:36:15 +00002023 HERMES, IP860, RPXlite, LWMON,
Heiko Schocher2eb48ff2017-06-07 17:33:10 +02002024 FLAGADM
wdenkc6097192002-11-03 00:24:07 +00002025
Gabe Black40fef042012-12-02 04:55:18 +00002026- Access to physical memory region (> 4GB)
2027 Some basic support is provided for operations on memory not
2028 normally accessible to U-Boot - e.g. some architectures
2029 support access to more than 4GB of memory on 32-bit
2030 machines using physical address extension or similar.
2031 Define CONFIG_PHYSMEM to access this basic support, which
2032 currently only supports clearing the memory.
2033
wdenkc6097192002-11-03 00:24:07 +00002034- Error Recovery:
wdenkc6097192002-11-03 00:24:07 +00002035 CONFIG_NET_RETRY_COUNT
2036
wdenk43d96162003-03-06 00:02:04 +00002037 This variable defines the number of retries for
2038 network operations like ARP, RARP, TFTP, or BOOTP
2039 before giving up the operation. If not defined, a
2040 default value of 5 is used.
wdenkc6097192002-11-03 00:24:07 +00002041
Guennadi Liakhovetski40cb90e2008-04-03 17:04:19 +02002042 CONFIG_ARP_TIMEOUT
2043
2044 Timeout waiting for an ARP reply in milliseconds.
2045
Tetsuyuki Kobayashi48a3e992012-07-03 22:25:21 +00002046 CONFIG_NFS_TIMEOUT
2047
2048 Timeout in milliseconds used in NFS protocol.
2049 If you encounter "ERROR: Cannot umount" in nfs command,
2050 try longer timeout such as
2051 #define CONFIG_NFS_TIMEOUT 10000UL
2052
wdenkc6097192002-11-03 00:24:07 +00002053- Command Interpreter:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002054 CONFIG_SYS_PROMPT_HUSH_PS2
wdenkc6097192002-11-03 00:24:07 +00002055
2056 This defines the secondary prompt string, which is
2057 printed when the command interpreter needs more input
2058 to complete a command. Usually "> ".
2059
2060 Note:
2061
wdenk8bde7f72003-06-27 21:31:46 +00002062 In the current implementation, the local variables
2063 space and global environment variables space are
2064 separated. Local variables are those you define by
2065 simply typing `name=value'. To access a local
2066 variable later on, you have write `$name' or
2067 `${name}'; to execute the contents of a variable
2068 directly type `$name' at the command prompt.
wdenkc6097192002-11-03 00:24:07 +00002069
wdenk43d96162003-03-06 00:02:04 +00002070 Global environment variables are those you use
2071 setenv/printenv to work with. To run a command stored
2072 in such a variable, you need to use the run command,
2073 and you must not use the '$' sign to access them.
wdenkc6097192002-11-03 00:24:07 +00002074
2075 To store commands and special characters in a
2076 variable, please use double quotation marks
2077 surrounding the whole text of the variable, instead
2078 of the backslashes before semicolons and special
2079 symbols.
2080
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002081- Command Line Editing and History:
Marek Vasutf3b267b2016-01-27 04:47:55 +01002082 CONFIG_CMDLINE_PS_SUPPORT
2083
2084 Enable support for changing the command prompt string
2085 at run-time. Only static string is supported so far.
2086 The string is obtained from environment variables PS1
2087 and PS2.
2088
wdenka8c7c702003-12-06 19:49:23 +00002089- Default Environment:
wdenkc6097192002-11-03 00:24:07 +00002090 CONFIG_EXTRA_ENV_SETTINGS
2091
wdenk43d96162003-03-06 00:02:04 +00002092 Define this to contain any number of null terminated
2093 strings (variable = value pairs) that will be part of
wdenk7152b1d2003-09-05 23:19:14 +00002094 the default environment compiled into the boot image.
wdenk2262cfe2002-11-18 00:14:45 +00002095
wdenk43d96162003-03-06 00:02:04 +00002096 For example, place something like this in your
2097 board's config file:
wdenkc6097192002-11-03 00:24:07 +00002098
2099 #define CONFIG_EXTRA_ENV_SETTINGS \
2100 "myvar1=value1\0" \
2101 "myvar2=value2\0"
2102
wdenk43d96162003-03-06 00:02:04 +00002103 Warning: This method is based on knowledge about the
2104 internal format how the environment is stored by the
2105 U-Boot code. This is NOT an official, exported
2106 interface! Although it is unlikely that this format
wdenk7152b1d2003-09-05 23:19:14 +00002107 will change soon, there is no guarantee either.
wdenkc6097192002-11-03 00:24:07 +00002108 You better know what you are doing here.
2109
wdenk43d96162003-03-06 00:02:04 +00002110 Note: overly (ab)use of the default environment is
2111 discouraged. Make sure to check other ways to preset
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02002112 the environment like the "source" command or the
wdenk43d96162003-03-06 00:02:04 +00002113 boot command first.
wdenkc6097192002-11-03 00:24:07 +00002114
Simon Glass06fd8532012-11-30 13:01:17 +00002115 CONFIG_DELAY_ENVIRONMENT
2116
2117 Normally the environment is loaded when the board is
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002118 initialised so that it is available to U-Boot. This inhibits
Simon Glass06fd8532012-11-30 13:01:17 +00002119 that so that the environment is not available until
2120 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2121 this is instead controlled by the value of
2122 /config/load-environment.
2123
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002124- TFTP Fixed UDP Port:
2125 CONFIG_TFTP_PORT
2126
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002127 If this is defined, the environment variable tftpsrcp
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002128 is used to supply the TFTP UDP source port value.
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002129 If tftpsrcp isn't defined, the normal pseudo-random port
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002130 number generator is used.
2131
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002132 Also, the environment variable tftpdstp is used to supply
2133 the TFTP UDP destination port value. If tftpdstp isn't
2134 defined, the normal port 69 is used.
2135
2136 The purpose for tftpsrcp is to allow a TFTP server to
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002137 blindly start the TFTP transfer using the pre-configured
2138 target IP address and UDP port. This has the effect of
2139 "punching through" the (Windows XP) firewall, allowing
2140 the remainder of the TFTP transfer to proceed normally.
2141 A better solution is to properly configure the firewall,
2142 but sometimes that is not allowed.
2143
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002144 CONFIG_STANDALONE_LOAD_ADDR
2145
Wolfgang Denk6feff892011-10-09 21:06:34 +02002146 This option defines a board specific value for the
2147 address where standalone program gets loaded, thus
2148 overwriting the architecture dependent default
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002149 settings.
2150
2151- Frame Buffer Address:
2152 CONFIG_FB_ADDR
2153
2154 Define CONFIG_FB_ADDR if you want to use specific
Wolfgang Denk44a53b52013-01-03 00:43:59 +00002155 address for frame buffer. This is typically the case
2156 when using a graphics controller has separate video
2157 memory. U-Boot will then place the frame buffer at
2158 the given address instead of dynamically reserving it
2159 in system RAM by calling lcd_setmem(), which grabs
2160 the memory for the frame buffer depending on the
2161 configured panel size.
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002162
2163 Please see board_init_f function.
2164
Detlev Zundelcccfc2a2009-12-01 17:16:19 +01002165- Automatic software updates via TFTP server
2166 CONFIG_UPDATE_TFTP
2167 CONFIG_UPDATE_TFTP_CNT_MAX
2168 CONFIG_UPDATE_TFTP_MSEC_MAX
2169
2170 These options enable and control the auto-update feature;
2171 for a more detailed description refer to doc/README.update.
2172
2173- MTD Support (mtdparts command, UBI support)
Heiko Schocherff94bc42014-06-24 10:10:04 +02002174 CONFIG_MTD_UBI_WL_THRESHOLD
2175 This parameter defines the maximum difference between the highest
2176 erase counter value and the lowest erase counter value of eraseblocks
2177 of UBI devices. When this threshold is exceeded, UBI starts performing
2178 wear leveling by means of moving data from eraseblock with low erase
2179 counter to eraseblocks with high erase counter.
2180
2181 The default value should be OK for SLC NAND flashes, NOR flashes and
2182 other flashes which have eraseblock life-cycle 100000 or more.
2183 However, in case of MLC NAND flashes which typically have eraseblock
2184 life-cycle less than 10000, the threshold should be lessened (e.g.,
2185 to 128 or 256, although it does not have to be power of 2).
2186
2187 default: 4096
Simon Glassc654b512014-10-23 18:58:54 -06002188
Heiko Schocherff94bc42014-06-24 10:10:04 +02002189 CONFIG_MTD_UBI_BEB_LIMIT
2190 This option specifies the maximum bad physical eraseblocks UBI
2191 expects on the MTD device (per 1024 eraseblocks). If the
2192 underlying flash does not admit of bad eraseblocks (e.g. NOR
2193 flash), this value is ignored.
2194
2195 NAND datasheets often specify the minimum and maximum NVM
2196 (Number of Valid Blocks) for the flashes' endurance lifetime.
2197 The maximum expected bad eraseblocks per 1024 eraseblocks
2198 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
2199 which gives 20 for most NANDs (MaxNVB is basically the total
2200 count of eraseblocks on the chip).
2201
2202 To put it differently, if this value is 20, UBI will try to
2203 reserve about 1.9% of physical eraseblocks for bad blocks
2204 handling. And that will be 1.9% of eraseblocks on the entire
2205 NAND chip, not just the MTD partition UBI attaches. This means
2206 that if you have, say, a NAND flash chip admits maximum 40 bad
2207 eraseblocks, and it is split on two MTD partitions of the same
2208 size, UBI will reserve 40 eraseblocks when attaching a
2209 partition.
2210
2211 default: 20
2212
2213 CONFIG_MTD_UBI_FASTMAP
2214 Fastmap is a mechanism which allows attaching an UBI device
2215 in nearly constant time. Instead of scanning the whole MTD device it
2216 only has to locate a checkpoint (called fastmap) on the device.
2217 The on-flash fastmap contains all information needed to attach
2218 the device. Using fastmap makes only sense on large devices where
2219 attaching by scanning takes long. UBI will not automatically install
2220 a fastmap on old images, but you can set the UBI parameter
2221 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
2222 that fastmap-enabled images are still usable with UBI implementations
2223 without fastmap support. On typical flash devices the whole fastmap
2224 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
2225
2226 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
2227 Set this parameter to enable fastmap automatically on images
2228 without a fastmap.
2229 default: 0
2230
Heiko Schocher0195a7b2015-10-22 06:19:21 +02002231 CONFIG_MTD_UBI_FM_DEBUG
2232 Enable UBI fastmap debug
2233 default: 0
2234
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002235- SPL framework
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02002236 CONFIG_SPL
2237 Enable building of SPL globally.
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002238
Tom Rini95579792012-02-14 07:29:40 +00002239 CONFIG_SPL_LDSCRIPT
2240 LDSCRIPT for linking the SPL binary.
2241
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002242 CONFIG_SPL_MAX_FOOTPRINT
2243 Maximum size in memory allocated to the SPL, BSS included.
2244 When defined, the linker checks that the actual memory
2245 used by SPL from _start to __bss_end does not exceed it.
Albert ARIBAUD8960af82013-04-14 04:48:38 +00002246 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002247 must not be both defined at the same time.
2248
Tom Rini95579792012-02-14 07:29:40 +00002249 CONFIG_SPL_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002250 Maximum size of the SPL image (text, data, rodata, and
2251 linker lists sections), BSS excluded.
2252 When defined, the linker checks that the actual size does
2253 not exceed it.
Tom Rini95579792012-02-14 07:29:40 +00002254
Scott Wood94a45bb2012-09-20 19:05:12 -05002255 CONFIG_SPL_RELOC_TEXT_BASE
2256 Address to relocate to. If unspecified, this is equal to
2257 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
2258
Tom Rini95579792012-02-14 07:29:40 +00002259 CONFIG_SPL_BSS_START_ADDR
2260 Link address for the BSS within the SPL binary.
2261
2262 CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002263 Maximum size in memory allocated to the SPL BSS.
2264 When defined, the linker checks that the actual memory used
2265 by SPL from __bss_start to __bss_end does not exceed it.
Albert ARIBAUD8960af82013-04-14 04:48:38 +00002266 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002267 must not be both defined at the same time.
Tom Rini95579792012-02-14 07:29:40 +00002268
2269 CONFIG_SPL_STACK
2270 Adress of the start of the stack SPL will use
2271
Albert ARIBAUD \(3ADEV\)8c80eb32015-03-31 11:40:50 +02002272 CONFIG_SPL_PANIC_ON_RAW_IMAGE
2273 When defined, SPL will panic() if the image it has
2274 loaded does not have a signature.
2275 Defining this is useful when code which loads images
2276 in SPL cannot guarantee that absolutely all read errors
2277 will be caught.
2278 An example is the LPC32XX MLC NAND driver, which will
2279 consider that a completely unreadable NAND block is bad,
2280 and thus should be skipped silently.
2281
Scott Wood94a45bb2012-09-20 19:05:12 -05002282 CONFIG_SPL_RELOC_STACK
2283 Adress of the start of the stack SPL will use after
2284 relocation. If unspecified, this is equal to
2285 CONFIG_SPL_STACK.
2286
Tom Rini95579792012-02-14 07:29:40 +00002287 CONFIG_SYS_SPL_MALLOC_START
2288 Starting address of the malloc pool used in SPL.
Fabio Estevam9ac4fc82015-11-12 12:30:19 -02002289 When this option is set the full malloc is used in SPL and
2290 it is set up by spl_init() and before that, the simple malloc()
2291 can be used if CONFIG_SYS_MALLOC_F is defined.
Tom Rini95579792012-02-14 07:29:40 +00002292
2293 CONFIG_SYS_SPL_MALLOC_SIZE
2294 The size of the malloc pool used in SPL.
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002295
Tom Rini9607faf2014-03-28 12:03:39 -04002296 CONFIG_SPL_OS_BOOT
2297 Enable booting directly to an OS from SPL.
2298 See also: doc/README.falcon
2299
Tom Rini861a86f2012-08-13 11:37:56 -07002300 CONFIG_SPL_DISPLAY_PRINT
2301 For ARM, enable an optional function to print more information
2302 about the running system.
2303
Scott Wood4b919722012-09-20 16:35:21 -05002304 CONFIG_SPL_INIT_MINIMAL
2305 Arch init code should be built for a very small image
2306
Paul Kocialkowskib97300b2014-11-08 23:14:56 +01002307 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
2308 Partition on the MMC to load U-Boot from when the MMC is being
2309 used in raw mode
2310
Peter Korsgaard2b75b0a2013-05-13 08:36:29 +00002311 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
2312 Sector to load kernel uImage from when MMC is being
2313 used in raw mode (for Falcon mode)
2314
2315 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
2316 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
2317 Sector and number of sectors to load kernel argument
2318 parameters from when MMC is being used in raw mode
2319 (for falcon mode)
2320
Paul Kocialkowskie2ccdf82014-11-08 23:14:55 +01002321 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
2322 Partition on the MMC to load U-Boot from when the MMC is being
2323 used in fs mode
2324
Guillaume GARDETfae81c72014-10-15 17:53:13 +02002325 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
2326 Filename to read to load U-Boot when reading from filesystem
2327
2328 CONFIG_SPL_FS_LOAD_KERNEL_NAME
Peter Korsgaard7ad2cc72013-05-13 08:36:27 +00002329 Filename to read to load kernel uImage when reading
Guillaume GARDETfae81c72014-10-15 17:53:13 +02002330 from filesystem (for Falcon mode)
Peter Korsgaard7ad2cc72013-05-13 08:36:27 +00002331
Guillaume GARDETfae81c72014-10-15 17:53:13 +02002332 CONFIG_SPL_FS_LOAD_ARGS_NAME
Peter Korsgaard7ad2cc72013-05-13 08:36:27 +00002333 Filename to read to load kernel argument parameters
Guillaume GARDETfae81c72014-10-15 17:53:13 +02002334 when reading from filesystem (for Falcon mode)
Peter Korsgaard7ad2cc72013-05-13 08:36:27 +00002335
Scott Wood06f60ae2012-12-06 13:33:17 +00002336 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
2337 Set this for NAND SPL on PPC mpc83xx targets, so that
2338 start.S waits for the rest of the SPL to load before
2339 continuing (the hardware starts execution after just
2340 loading the first page rather than the full 4K).
2341
Prabhakar Kushwaha651fcf62014-04-08 19:12:31 +05302342 CONFIG_SPL_SKIP_RELOCATE
2343 Avoid SPL relocation
2344
Scott Wood6f2f01b2012-09-20 19:09:07 -05002345 CONFIG_SPL_NAND_BASE
2346 Include nand_base.c in the SPL. Requires
2347 CONFIG_SPL_NAND_DRIVERS.
2348
2349 CONFIG_SPL_NAND_DRIVERS
2350 SPL uses normal NAND drivers, not minimal drivers.
2351
Jörg Krause15e207f2018-01-14 19:26:38 +01002352 CONFIG_SPL_NAND_IDENT
2353 SPL uses the chip ID list to identify the NAND flash.
2354 Requires CONFIG_SPL_NAND_BASE.
2355
Scott Wood6f2f01b2012-09-20 19:09:07 -05002356 CONFIG_SPL_NAND_ECC
2357 Include standard software ECC in the SPL
2358
Tom Rini95579792012-02-14 07:29:40 +00002359 CONFIG_SPL_NAND_SIMPLE
Scott Wood7d4b7952012-09-21 18:35:27 -05002360 Support for NAND boot using simple NAND drivers that
2361 expose the cmd_ctrl() interface.
Tom Rini95579792012-02-14 07:29:40 +00002362
Thomas Gleixner6f4e7d32016-07-12 20:28:12 +02002363 CONFIG_SPL_UBI
2364 Support for a lightweight UBI (fastmap) scanner and
2365 loader
2366
Heiko Schocher0c3117b2014-10-31 08:31:00 +01002367 CONFIG_SPL_NAND_RAW_ONLY
2368 Support to boot only raw u-boot.bin images. Use this only
2369 if you need to save space.
2370
Ying Zhang7c8eea52013-08-16 15:16:12 +08002371 CONFIG_SPL_COMMON_INIT_DDR
2372 Set for common ddr init with serial presence detect in
2373 SPL binary.
2374
Tom Rini95579792012-02-14 07:29:40 +00002375 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
2376 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
2377 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
2378 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
2379 CONFIG_SYS_NAND_ECCBYTES
2380 Defines the size and behavior of the NAND that SPL uses
Scott Wood7d4b7952012-09-21 18:35:27 -05002381 to read U-Boot
Tom Rini95579792012-02-14 07:29:40 +00002382
2383 CONFIG_SYS_NAND_U_BOOT_OFFS
Scott Wood7d4b7952012-09-21 18:35:27 -05002384 Location in NAND to read U-Boot from
2385
2386 CONFIG_SYS_NAND_U_BOOT_DST
2387 Location in memory to load U-Boot to
2388
2389 CONFIG_SYS_NAND_U_BOOT_SIZE
2390 Size of image to load
Tom Rini95579792012-02-14 07:29:40 +00002391
2392 CONFIG_SYS_NAND_U_BOOT_START
Scott Wood7d4b7952012-09-21 18:35:27 -05002393 Entry point in loaded image to jump to
Tom Rini95579792012-02-14 07:29:40 +00002394
2395 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
2396 Define this if you need to first read the OOB and then the
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002397 data. This is used, for example, on davinci platforms.
Tom Rini95579792012-02-14 07:29:40 +00002398
Pavel Machekc57b9532012-08-30 22:42:11 +02002399 CONFIG_SPL_RAM_DEVICE
2400 Support for running image already present in ram, in SPL binary
2401
Scott Wood74752ba2012-12-06 13:33:16 +00002402 CONFIG_SPL_PAD_TO
Benoît Thébaudeau6113d3f2013-04-11 09:35:49 +00002403 Image offset to which the SPL should be padded before appending
2404 the SPL payload. By default, this is defined as
2405 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2406 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2407 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
Scott Wood74752ba2012-12-06 13:33:16 +00002408
Scott Woodca2fca22012-09-21 16:27:32 -05002409 CONFIG_SPL_TARGET
2410 Final target image containing SPL and payload. Some SPLs
2411 use an arch-specific makefile fragment instead, for
2412 example if more than one image needs to be produced.
2413
Marek Vasutb527b9c2018-05-13 00:22:52 +02002414 CONFIG_SPL_FIT_PRINT
Simon Glass87ebee32013-05-08 08:05:59 +00002415 Printing information about a FIT image adds quite a bit of
2416 code to SPL. So this is normally disabled in SPL. Use this
2417 option to re-enable it. This will affect the output of the
2418 bootm command when booting a FIT image.
2419
Ying Zhang3aa29de2013-08-16 15:16:15 +08002420- TPL framework
2421 CONFIG_TPL
2422 Enable building of TPL globally.
2423
2424 CONFIG_TPL_PAD_TO
2425 Image offset to which the TPL should be padded before appending
2426 the TPL payload. By default, this is defined as
Wolfgang Denk93e14592013-10-04 17:43:24 +02002427 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2428 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2429 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
Ying Zhang3aa29de2013-08-16 15:16:15 +08002430
wdenka8c7c702003-12-06 19:49:23 +00002431- Interrupt support (PPC):
2432
wdenkd4ca31c2004-01-02 14:00:00 +00002433 There are common interrupt_init() and timer_interrupt()
2434 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002435 for CPU specific initialization. interrupt_init_cpu()
wdenkd4ca31c2004-01-02 14:00:00 +00002436 should set decrementer_count to appropriate value. If
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002437 CPU resets decrementer automatically after interrupt
wdenkd4ca31c2004-01-02 14:00:00 +00002438 (ppc4xx) it should set decrementer_count to zero.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002439 timer_interrupt() calls timer_interrupt_cpu() for CPU
wdenkd4ca31c2004-01-02 14:00:00 +00002440 specific handling. If board has watchdog / status_led
2441 / other_activity_monitor it works automatically from
2442 general timer_interrupt().
wdenka8c7c702003-12-06 19:49:23 +00002443
wdenkc6097192002-11-03 00:24:07 +00002444
Helmut Raiger9660e442011-10-20 04:19:47 +00002445Board initialization settings:
2446------------------------------
2447
2448During Initialization u-boot calls a number of board specific functions
2449to allow the preparation of board specific prerequisites, e.g. pin setup
2450before drivers are initialized. To enable these callbacks the
2451following configuration macros have to be defined. Currently this is
2452architecture specific, so please check arch/your_architecture/lib/board.c
2453typically in board_init_f() and board_init_r().
2454
2455- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
2456- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
2457- CONFIG_BOARD_LATE_INIT: Call board_late_init()
2458- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
wdenkc6097192002-11-03 00:24:07 +00002459
wdenkc6097192002-11-03 00:24:07 +00002460Configuration Settings:
2461-----------------------
2462
York Sun4d1fd7f2014-02-26 17:03:19 -08002463- CONFIG_SYS_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
2464 Optionally it can be defined to support 64-bit memory commands.
2465
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002466- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
wdenkc6097192002-11-03 00:24:07 +00002467 undefine this when you're short of memory.
2468
Peter Tyser2fb26042009-01-27 18:03:12 -06002469- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
2470 width of the commands listed in the 'help' command output.
2471
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002472- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
wdenkc6097192002-11-03 00:24:07 +00002473 prompt for user input.