Yoshihiro Shimoda | 1a2621b | 2012-11-04 15:53:22 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the sh7752evb board |
| 3 | * |
| 4 | * Copyright (C) 2012 Renesas Solutions Corp. |
| 5 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Yoshihiro Shimoda | 1a2621b | 2012-11-04 15:53:22 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __SH7752EVB_H |
| 10 | #define __SH7752EVB_H |
| 11 | |
| 12 | #undef DEBUG |
| 13 | #define CONFIG_SH 1 |
| 14 | #define CONFIG_SH4A 1 |
| 15 | #define CONFIG_SH_32BIT 1 |
| 16 | #define CONFIG_CPU_SH7752 1 |
| 17 | #define CONFIG_SH7752EVB 1 |
| 18 | |
| 19 | #define CONFIG_SYS_TEXT_BASE 0x5ff80000 |
| 20 | #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds" |
| 21 | |
| 22 | #define CONFIG_CMD_MEMORY |
| 23 | #define CONFIG_CMD_NET |
| 24 | #define CONFIG_CMD_MII |
| 25 | #define CONFIG_CMD_PING |
| 26 | #define CONFIG_CMD_NFS |
| 27 | #define CONFIG_CMD_DFL |
| 28 | #define CONFIG_CMD_SDRAM |
| 29 | #define CONFIG_CMD_SF |
| 30 | #define CONFIG_CMD_RUN |
| 31 | #define CONFIG_CMD_SAVEENV |
| 32 | #define CONFIG_CMD_MD5SUM |
| 33 | #define CONFIG_MD5 |
| 34 | #define CONFIG_CMD_LOADS |
| 35 | #define CONFIG_CMD_MMC |
| 36 | #define CONFIG_CMD_EXT2 |
| 37 | #define CONFIG_DOS_PARTITION |
| 38 | #define CONFIG_MAC_PARTITION |
| 39 | |
| 40 | #define CONFIG_BAUDRATE 115200 |
| 41 | #define CONFIG_BOOTDELAY 3 |
| 42 | #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" |
| 43 | |
| 44 | #define CONFIG_VERSION_VARIABLE |
| 45 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 46 | #define CONFIG_CMDLINE_EDITING |
| 47 | #define CONFIG_AUTO_COMPLETE |
| 48 | |
| 49 | /* MEMORY */ |
| 50 | #define SH7752EVB_SDRAM_BASE (0x40000000) |
| 51 | #define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024) |
| 52 | |
| 53 | #define CONFIG_SYS_LONGHELP |
| 54 | #define CONFIG_SYS_PROMPT "=> " |
| 55 | #define CONFIG_SYS_CBSIZE 256 |
| 56 | #define CONFIG_SYS_PBSIZE 256 |
| 57 | #define CONFIG_SYS_MAXARGS 16 |
| 58 | #define CONFIG_SYS_BARGSIZE 512 |
| 59 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } |
| 60 | |
| 61 | /* SCIF */ |
| 62 | #define CONFIG_SCIF_CONSOLE 1 |
| 63 | #define CONFIG_CONS_SCIF2 1 |
| 64 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET |
| 65 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| 66 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE |
| 67 | |
| 68 | #define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE) |
| 69 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ |
| 70 | 480 * 1024 * 1024) |
| 71 | #undef CONFIG_SYS_ALT_MEMTEST |
| 72 | #undef CONFIG_SYS_MEMTEST_SCRATCH |
| 73 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE |
| 74 | |
| 75 | #define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE) |
| 76 | #define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE) |
| 77 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
| 78 | 128 * 1024 * 1024) |
| 79 | |
| 80 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
| 81 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
| 82 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) |
| 83 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
| 84 | |
| 85 | /* FLASH */ |
| 86 | #define CONFIG_SYS_NO_FLASH |
| 87 | |
| 88 | /* Ether */ |
| 89 | #define CONFIG_SH_ETHER 1 |
| 90 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 91 | #define CONFIG_SH_ETHER_PHY_ADDR 18 |
| 92 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 |
| 93 | #define CONFIG_SH_ETHER_USE_GETHER 1 |
| 94 | #define CONFIG_PHYLIB |
| 95 | #define CONFIG_BITBANGMII |
| 96 | #define CONFIG_BITBANGMII_MULTI |
| 97 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII |
| 98 | #define CONFIG_PHY_VITESSE |
| 99 | |
| 100 | #define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000 |
| 101 | #define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024) |
| 102 | #define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI |
| 103 | #define SH7752EVB_ETHERNET_MAC_SIZE 17 |
| 104 | #define SH7752EVB_ETHERNET_NUM_CH 2 |
| 105 | #define CONFIG_BOARD_LATE_INIT |
| 106 | |
| 107 | /* SPI */ |
| 108 | #define CONFIG_SH_SPI 1 |
| 109 | #define CONFIG_SH_SPI_BASE 0xfe002000 |
| 110 | #define CONFIG_SPI_FLASH |
| 111 | #define CONFIG_SPI_FLASH_STMICRO 1 |
| 112 | #define CONFIG_SPI_FLASH_MACRONIX 1 |
| 113 | |
| 114 | /* MMCIF */ |
| 115 | #define CONFIG_MMC 1 |
| 116 | #define CONFIG_GENERIC_MMC 1 |
| 117 | #define CONFIG_SH_MMCIF 1 |
| 118 | #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 |
| 119 | #define CONFIG_SH_MMCIF_CLK 48000000 |
| 120 | |
| 121 | /* ENV setting */ |
| 122 | #define CONFIG_ENV_IS_EMBEDDED |
| 123 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 124 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 125 | #define CONFIG_ENV_ADDR (0x00080000) |
| 126 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) |
| 127 | #define CONFIG_ENV_OVERWRITE 1 |
| 128 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
| 129 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
| 130 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 131 | "netboot=bootp; bootm\0" |
| 132 | |
| 133 | /* Board Clock */ |
| 134 | #define CONFIG_SYS_CLK_FREQ 48000000 |
| 135 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
| 136 | #define CONFIG_SYS_HZ 1000 |
| 137 | #endif /* __SH7752EVB_H */ |