blob: dca1ed455d3e111dbff1ddf7d01cf8309dc611a1 [file] [log] [blame]
wdenk43c377f2002-07-20 10:56:28 +00001/*
2 * Memory Setup stuff - taken from ???
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23
24
25#include <config.h>
26#include <version.h>
27
28
29/* some parameters for the board */
30
31SYSCON1: .long 0x80000100
32SYSCON2: .long 0x80001100
33SYSCON3: .long 0x80002200
34MEMCFG1: .long 0x80000180
35MEMCFG2: .long 0x800001C0
36SDCONF: .long 0x80002300
37SDRFPR: .long 0x80002340
38
39syscon1_val: .long 0x00040100
40syscon2_val: .long 0x00000102
41syscon3_val: .long 0x0000020E
42memcfg1_val: .long 0x1f101710
43memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
44memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6
45sdrfpr_val: .long 0x00000240
46sdconf_val: .long 0x00000522
47/* setting up the memory */
48
49.globl memsetup
50memsetup:
51 /*
52 * SYSCON1-3
53 */
54 ldr r0, SYSCON1
55 ldr r1, syscon1_val
56 str r1, [r0]
57
58 ldr r0, SYSCON2
59 ldr r1, syscon2_val
60 str r1, [r0]
61
62 ldr r0, SYSCON3
63 ldr r1, syscon3_val
64 str r1, [r0]
65
66 /*
67 * MEMCFG1
68 */
69 ldr r0, MEMCFG1
70 ldr r1, memcfg1_val
71 str r1, [r0]
72
73 /*
74 * MEMCFG2
75 */
76 ldr r0, MEMCFG2
77 ldr r2, [r0]
78 ldr r1, memcfg2_mask
79 bic r2, r2, r1
80 ldr r1, memcfg2_val
81 orr r2, r2, r1
82 str r2, [r0]
83
84 /*
85 * SDRFPR,SDCONF
86 */
87 ldr r0, SDCONF
88 ldr r1, sdconf_val
89 str r1, [r0]
90
91 ldr r0, SDRFPR
92 ldr r1, sdrfpr_val
93 str r1, [r0]
94
95 /* everything is fine now */
96 mov pc, lr
97