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Wu, Josh9e336902013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh9e336902013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh9e336902013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
30#define CONFIG_BOARD_EARLY_INIT_F
31#define CONFIG_DISPLAY_CPUINFO
32
Wu, Josh9e336902013-04-16 23:42:44 +000033/* general purpose I/O */
34#define CONFIG_AT91_GPIO
35
36/* serial console */
37#define CONFIG_ATMEL_USART
38#define CONFIG_USART_BASE ATMEL_BASE_DBGU
39#define CONFIG_USART_ID ATMEL_ID_SYS
40#define CONFIG_BAUDRATE 115200
41
42/* LCD */
43#define CONFIG_LCD
44#define LCD_BPP LCD_COLOR16
45#define LCD_OUTPUT_BPP 24
46#define CONFIG_LCD_LOGO
47#define CONFIG_LCD_INFO
48#define CONFIG_LCD_INFO_BELOW_LOGO
49#define CONFIG_SYS_WHITE_ON_BLACK
50#define CONFIG_ATMEL_HLCD
51#define CONFIG_ATMEL_LCD_RGB565
52#define CONFIG_SYS_CONSOLE_IS_IN_ENV
53
54#define CONFIG_BOOTDELAY 3
55
56/*
57 * BOOTP options
58 */
59#define CONFIG_BOOTP_BOOTFILESIZE
60#define CONFIG_BOOTP_BOOTPATH
61#define CONFIG_BOOTP_GATEWAY
62#define CONFIG_BOOTP_HOSTNAME
63
64/* NOR flash - no real flash on this board */
65#define CONFIG_SYS_NO_FLASH
66
67/*
68 * Command line configuration.
69 */
Wu, Josh9e336902013-04-16 23:42:44 +000070#define CONFIG_CMD_NAND
Wu, Josh9e336902013-04-16 23:42:44 +000071
72#define CONFIG_NR_DRAM_BANKS 1
73#define CONFIG_SYS_SDRAM_BASE 0x20000000
74#define CONFIG_SYS_SDRAM_SIZE 0x08000000
75
76/*
77 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
78 * leaving the correct space for initial global data structure above
79 * that address while providing maximum stack area below.
80 */
81# define CONFIG_SYS_INIT_SP_ADDR \
82 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
83
84/* DataFlash */
85#ifdef CONFIG_CMD_SF
86#define CONFIG_ATMEL_SPI
Wu, Josh9e336902013-04-16 23:42:44 +000087#define CONFIG_SF_DEFAULT_SPEED 30000000
88#define CONFIG_ENV_SPI_MODE SPI_MODE_3
89#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
90#endif
91
92/* NAND flash */
93#ifdef CONFIG_CMD_NAND
94#define CONFIG_NAND_ATMEL
95#define CONFIG_SYS_MAX_NAND_DEVICE 1
96#define CONFIG_SYS_NAND_BASE 0x40000000
97#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
98#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +010099#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
100#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh9e336902013-04-16 23:42:44 +0000101
102/* PMECC & PMERRLOC */
103#define CONFIG_ATMEL_NAND_HWECC
104#define CONFIG_ATMEL_NAND_HW_PMECC
105#define CONFIG_PMECC_CAP 2
106#define CONFIG_PMECC_SECTOR_SIZE 512
107#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shence76f0a2013-06-26 10:48:53 +0800108
109#define CONFIG_CMD_NAND_TRIMFFS
110
Wu, Josh9e336902013-04-16 23:42:44 +0000111#endif
112
113#define CONFIG_MTD_PARTITIONS
114#define CONFIG_MTD_DEVICE
115#define CONFIG_CMD_MTDPARTS
116#define MTDIDS_DEFAULT "nand0=atmel_nand"
117#define MTDPARTS_DEFAULT \
118 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
119 "256k(env),256k(env_redundant),256k(spare)," \
120 "512k(dtb),6M(kernel)ro,-(rootfs)"
121
122#define CONFIG_EXTRA_ENV_SETTINGS \
123 "console=console=ttyS0,115200\0" \
124 "mtdparts="MTDPARTS_DEFAULT"\0" \
125 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
126 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
127
128/* MMC */
129#ifdef CONFIG_CMD_MMC
130#define CONFIG_MMC
131#define CONFIG_GENERIC_MMC
132#define CONFIG_GENERIC_ATMEL_MCI
133#endif
134
135/* FAT */
136#ifdef CONFIG_CMD_FAT
137#define CONFIG_DOS_PARTITION
138#endif
139
Bo Shen16276222013-04-24 10:46:18 +0800140/* Ethernet */
141#define CONFIG_KS8851_MLL
142#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
143
Wu, Josh9e336902013-04-16 23:42:44 +0000144#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
145
146#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
147#define CONFIG_SYS_MEMTEST_END 0x26e00000
148
Bo Shend9bef0a2013-10-21 16:13:59 +0800149/* USB host */
150#ifdef CONFIG_CMD_USB
151#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800152#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +0800153#define CONFIG_USB_OHCI_NEW
154#define CONFIG_SYS_USB_OHCI_CPU_INIT
155#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
156#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
157#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
158#define CONFIG_USB_STORAGE
159#endif
160
Wu, Josh9e336902013-04-16 23:42:44 +0000161#ifdef CONFIG_SYS_USE_SPIFLASH
162
163/* bootstrap + u-boot + env + linux in dataflash on CS0 */
164#define CONFIG_ENV_IS_IN_SPI_FLASH
165#define CONFIG_ENV_OFFSET 0x5000
166#define CONFIG_ENV_SIZE 0x3000
167#define CONFIG_ENV_SECT_SIZE 0x1000
168#define CONFIG_BOOTCOMMAND \
169 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
170 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
171 "bootm 0x22000000"
172
173#elif defined(CONFIG_SYS_USE_NANDFLASH)
174
175/* bootstrap + u-boot + env + linux in nandflash */
176#define CONFIG_ENV_IS_IN_NAND
177#define CONFIG_ENV_OFFSET 0xc0000
178#define CONFIG_ENV_OFFSET_REDUND 0x100000
179#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
180#define CONFIG_BOOTCOMMAND \
181 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
182 "nand read 0x21000000 0x180000 0x080000;" \
183 "nand read 0x22000000 0x200000 0x400000;" \
184 "bootm 0x22000000 - 0x21000000"
185
186#else /* CONFIG_SYS_USE_MMC */
187
188/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800189
190#ifdef CONFIG_ENV_IS_IN_MMC
191/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000192#define CONFIG_ENV_OFFSET 0x2000
193#define CONFIG_ENV_SIZE 0x1000
194#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800195#else
196/* Use file in FAT file to save environment */
197#define CONFIG_ENV_IS_IN_FAT
198#define CONFIG_FAT_WRITE
199#define FAT_ENV_INTERFACE "mmc"
200#define FAT_ENV_FILE "uboot.env"
201#define FAT_ENV_DEVICE_AND_PART "0"
202#define CONFIG_ENV_SIZE 0x4000
203#endif
204
Wu, Josh9e336902013-04-16 23:42:44 +0000205#define CONFIG_BOOTCOMMAND \
206 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
207 "fatload mmc 0:1 0x21000000 dtb;" \
208 "fatload mmc 0:1 0x22000000 uImage;" \
209 "bootm 0x22000000 - 0x21000000"
210
211#endif
212
Wu, Josh9e336902013-04-16 23:42:44 +0000213#define CONFIG_SYS_CBSIZE 256
214#define CONFIG_SYS_MAXARGS 16
Wu, Josh9e336902013-04-16 23:42:44 +0000215#define CONFIG_SYS_LONGHELP
216#define CONFIG_CMDLINE_EDITING
217#define CONFIG_AUTO_COMPLETE
Wu, Josh9e336902013-04-16 23:42:44 +0000218
219/*
220 * Size of malloc() pool
221 */
222#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800223
224/* SPL */
225#define CONFIG_SPL_FRAMEWORK
226#define CONFIG_SPL_TEXT_BASE 0x300000
227#define CONFIG_SPL_MAX_SIZE 0x6000
228#define CONFIG_SPL_STACK 0x308000
229
230#define CONFIG_SPL_BSS_START_ADDR 0x20000000
231#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
232#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
233#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
234
235#define CONFIG_SPL_LIBCOMMON_SUPPORT
236#define CONFIG_SPL_LIBGENERIC_SUPPORT
237#define CONFIG_SPL_GPIO_SUPPORT
238#define CONFIG_SPL_SERIAL_SUPPORT
239
240#define CONFIG_SPL_BOARD_INIT
241#define CONFIG_SYS_MONITOR_LEN (512 << 10)
242
243#define CONFIG_SYS_MASTER_CLOCK 132096000
244#define CONFIG_SYS_AT91_PLLA 0x20953f03
245#define CONFIG_SYS_MCKR 0x1301
246#define CONFIG_SYS_MCKR_CSS 0x1302
247
Bo Shenff255e82015-03-27 14:23:36 +0800248#ifdef CONFIG_SYS_USE_MMC
249#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
250#define CONFIG_SPL_MMC_SUPPORT
251#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
252#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
253#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
254#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
255#define CONFIG_SPL_FAT_SUPPORT
256#define CONFIG_SPL_LIBDISK_SUPPORT
257
258#elif CONFIG_SYS_USE_NANDFLASH
259#define CONFIG_SPL_NAND_SUPPORT
260#define CONFIG_SPL_NAND_DRIVERS
261#define CONFIG_SPL_NAND_BASE
262#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
263#define CONFIG_SYS_NAND_5_ADDR_CYCLE
264#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
265#define CONFIG_SYS_NAND_PAGE_COUNT 64
266#define CONFIG_SYS_NAND_OOBSIZE 64
267#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
268#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
269#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
270
271#elif CONFIG_SYS_USE_SPIFLASH
272#define CONFIG_SPL_SPI_SUPPORT
273#define CONFIG_SPL_SPI_FLASH_SUPPORT
274#define CONFIG_SPL_SPI_LOAD
275#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
276
277#endif
Wu, Josh9e336902013-04-16 23:42:44 +0000278
279#endif