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Hans de Goede28a15ef2015-01-11 20:34:48 +01001/*
2 * Allwinner SUNXI "glue layer"
3 *
4 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
6 *
7 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9 * javen <javen@allwinnertech.com>
10 *
11 * Based on the DA8xx "glue layer" code.
12 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13 * Copyright (C) 2005-2006 by Texas Instruments
14 *
15 * This file is part of the Inventra Controller Driver for Linux.
16 *
17 * The Inventra Controller Driver for Linux is free software; you
18 * can redistribute it and/or modify it under the terms of the GNU
19 * General Public License version 2 as published by the Free Software
20 * Foundation.
21 *
22 */
23#include <common.h>
24#include <asm/arch/cpu.h>
Hans de Goede375de012015-04-27 11:44:22 +020025#include <asm/arch/clock.h>
Hans de Goede52defe82015-02-16 22:13:43 +010026#include <asm/arch/gpio.h>
Hans de Goede2aacc422015-04-27 15:05:10 +020027#include <asm/arch/usb_phy.h>
Hans de Goede52defe82015-02-16 22:13:43 +010028#include <asm-generic/gpio.h>
Hans de Goede28a15ef2015-01-11 20:34:48 +010029#include "linux-compat.h"
30#include "musb_core.h"
Chen-Yu Tsaie42add52015-03-09 15:44:16 +080031#ifdef CONFIG_AXP152_POWER
32#include <axp152.h>
33#endif
34#ifdef CONFIG_AXP209_POWER
35#include <axp209.h>
36#endif
37#ifdef CONFIG_AXP221_POWER
38#include <axp221.h>
39#endif
Hans de Goede28a15ef2015-01-11 20:34:48 +010040
41/******************************************************************************
42 ******************************************************************************
43 * From the Allwinner driver
44 ******************************************************************************
45 ******************************************************************************/
46
47/******************************************************************************
48 * From include/sunxi_usb_bsp.h
49 ******************************************************************************/
50
51/* reg offsets */
52#define USBC_REG_o_ISCR 0x0400
53#define USBC_REG_o_PHYCTL 0x0404
54#define USBC_REG_o_PHYBIST 0x0408
55#define USBC_REG_o_PHYTUNE 0x040c
56
57#define USBC_REG_o_VEND0 0x0043
58
59/* Interface Status and Control */
60#define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
61#define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
62#define USBC_BP_ISCR_EXT_ID_STATUS 28
63#define USBC_BP_ISCR_EXT_DM_STATUS 27
64#define USBC_BP_ISCR_EXT_DP_STATUS 26
65#define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
66#define USBC_BP_ISCR_MERGED_ID_STATUS 24
67
68#define USBC_BP_ISCR_ID_PULLUP_EN 17
69#define USBC_BP_ISCR_DPDM_PULLUP_EN 16
70#define USBC_BP_ISCR_FORCE_ID 14
71#define USBC_BP_ISCR_FORCE_VBUS_VALID 12
72#define USBC_BP_ISCR_VBUS_VALID_SRC 10
73
74#define USBC_BP_ISCR_HOSC_EN 7
75#define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
76#define USBC_BP_ISCR_ID_CHANGE_DETECT 5
77#define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
78#define USBC_BP_ISCR_IRQ_ENABLE 3
79#define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
80#define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
81#define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
82
83/******************************************************************************
84 * From usbc/usbc.c
85 ******************************************************************************/
86
87static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
88{
89 u32 temp = reg_val;
90
91 temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
92 temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
93 temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
94
95 return temp;
96}
97
98static void USBC_EnableIdPullUp(__iomem void *base)
99{
100 u32 reg_val;
101
102 reg_val = musb_readl(base, USBC_REG_o_ISCR);
103 reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
104 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
105 musb_writel(base, USBC_REG_o_ISCR, reg_val);
106}
107
108static void USBC_DisableIdPullUp(__iomem void *base)
109{
110 u32 reg_val;
111
112 reg_val = musb_readl(base, USBC_REG_o_ISCR);
113 reg_val &= ~(1 << USBC_BP_ISCR_ID_PULLUP_EN);
114 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
115 musb_writel(base, USBC_REG_o_ISCR, reg_val);
116}
117
118static void USBC_EnableDpDmPullUp(__iomem void *base)
119{
120 u32 reg_val;
121
122 reg_val = musb_readl(base, USBC_REG_o_ISCR);
123 reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
124 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
125 musb_writel(base, USBC_REG_o_ISCR, reg_val);
126}
127
128static void USBC_DisableDpDmPullUp(__iomem void *base)
129{
130 u32 reg_val;
131
132 reg_val = musb_readl(base, USBC_REG_o_ISCR);
133 reg_val &= ~(1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
134 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
135 musb_writel(base, USBC_REG_o_ISCR, reg_val);
136}
137
138static void USBC_ForceIdToLow(__iomem void *base)
139{
140 u32 reg_val;
141
142 reg_val = musb_readl(base, USBC_REG_o_ISCR);
143 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
144 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
145 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
146 musb_writel(base, USBC_REG_o_ISCR, reg_val);
147}
148
149static void USBC_ForceIdToHigh(__iomem void *base)
150{
151 u32 reg_val;
152
153 reg_val = musb_readl(base, USBC_REG_o_ISCR);
154 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
155 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
156 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
157 musb_writel(base, USBC_REG_o_ISCR, reg_val);
158}
159
Hans de Goedee1abfa42015-06-14 11:55:28 +0200160static void USBC_ForceVbusValidToLow(__iomem void *base)
161{
162 u32 reg_val;
163
164 reg_val = musb_readl(base, USBC_REG_o_ISCR);
165 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
166 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
167 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
168 musb_writel(base, USBC_REG_o_ISCR, reg_val);
169}
170
Hans de Goede28a15ef2015-01-11 20:34:48 +0100171static void USBC_ForceVbusValidToHigh(__iomem void *base)
172{
173 u32 reg_val;
174
175 reg_val = musb_readl(base, USBC_REG_o_ISCR);
176 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
177 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
178 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
179 musb_writel(base, USBC_REG_o_ISCR, reg_val);
180}
181
182static void USBC_ConfigFIFO_Base(void)
183{
184 u32 reg_value;
185
186 /* config usb fifo, 8kb mode */
187 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
188 reg_value &= ~(0x03 << 0);
189 reg_value |= (1 << 0);
190 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
191}
192
193/******************************************************************************
194 * MUSB Glue code
195 ******************************************************************************/
196
197static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
198{
199 struct musb *musb = __hci;
200 irqreturn_t retval = IRQ_NONE;
201
202 /* read and flush interrupts */
203 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
204 if (musb->int_usb)
205 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
206 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
207 if (musb->int_tx)
208 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
209 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
210 if (musb->int_rx)
211 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
212
213 if (musb->int_usb || musb->int_tx || musb->int_rx)
214 retval |= musb_interrupt(musb);
215
216 return retval;
217}
218
Hans de Goedee1abfa42015-06-14 11:55:28 +0200219/* musb_core does not call enable / disable in a balanced manner <sigh> */
220static bool enabled = false;
221
Hans de Goede28a15ef2015-01-11 20:34:48 +0100222static void sunxi_musb_enable(struct musb *musb)
223{
224 pr_debug("%s():\n", __func__);
225
Hans de Goedee1abfa42015-06-14 11:55:28 +0200226 if (enabled)
227 return;
228
Hans de Goede28a15ef2015-01-11 20:34:48 +0100229 /* select PIO mode */
230 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
231
Hans de Goedee1abfa42015-06-14 11:55:28 +0200232 if (is_host_enabled(musb))
233 sunxi_usb_phy_power_on(0); /* port power on */
234
235 USBC_ForceVbusValidToHigh(musb->mregs);
236
237 enabled = true;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100238}
239
240static void sunxi_musb_disable(struct musb *musb)
241{
242 pr_debug("%s():\n", __func__);
243
Hans de Goedee1abfa42015-06-14 11:55:28 +0200244 if (!enabled)
245 return;
Hans de Goede375de012015-04-27 11:44:22 +0200246
Hans de Goedee1abfa42015-06-14 11:55:28 +0200247 if (is_host_enabled(musb))
248 sunxi_usb_phy_power_off(0); /* port power off */
Hans de Goede375de012015-04-27 11:44:22 +0200249
Hans de Goedee1abfa42015-06-14 11:55:28 +0200250 USBC_ForceVbusValidToLow(musb->mregs);
251 mdelay(200); /* Wait for the current session to timeout */
252
253 enabled = false;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100254}
255
256static int sunxi_musb_init(struct musb *musb)
257{
Hans de Goede375de012015-04-27 11:44:22 +0200258 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100259 int err;
260
261 pr_debug("%s():\n", __func__);
262
Paul Kocialkowskiebd468b2015-03-22 18:07:12 +0100263 if (is_host_enabled(musb)) {
Hans de Goede7b798652015-04-27 14:54:47 +0200264 err = sunxi_usb_phy_vbus_detect(0);
Paul Kocialkowskiebd468b2015-03-22 18:07:12 +0100265 if (err) {
266 eprintf("Error: A charger is plugged into the OTG\n");
Paul Kocialkowskiebd468b2015-03-22 18:07:12 +0100267 return -EIO;
268 }
269 }
270
Hans de Goede28a15ef2015-01-11 20:34:48 +0100271 musb->isr = sunxi_musb_interrupt;
Hans de Goede375de012015-04-27 11:44:22 +0200272
273 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
274#ifdef CONFIG_SUNXI_GEN_SUN6I
275 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
276#endif
Hans de Goede7b798652015-04-27 14:54:47 +0200277 sunxi_usb_phy_init(0);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100278
279 USBC_ConfigFIFO_Base();
280 USBC_EnableDpDmPullUp(musb->mregs);
281 USBC_EnableIdPullUp(musb->mregs);
282
283 if (is_host_enabled(musb)) {
284 /* Host mode */
285 USBC_ForceIdToLow(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100286 } else {
287 /* Peripheral mode */
288 USBC_ForceIdToHigh(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100289 }
Hans de Goedeb1b912d2015-02-11 09:05:18 +0100290 USBC_ForceVbusValidToHigh(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100291
292 return 0;
293}
294
295static int sunxi_musb_exit(struct musb *musb)
296{
297 pr_debug("%s():\n", __func__);
298
299 USBC_DisableDpDmPullUp(musb->mregs);
300 USBC_DisableIdPullUp(musb->mregs);
Hans de Goede7b798652015-04-27 14:54:47 +0200301 sunxi_usb_phy_power_off(0);
302 sunxi_usb_phy_exit(0);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100303
Hans de Goedee13afee2015-04-27 16:50:04 +0200304 return 0;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100305}
306
307const struct musb_platform_ops sunxi_musb_ops = {
308 .init = sunxi_musb_init,
309 .exit = sunxi_musb_exit,
310
311 .enable = sunxi_musb_enable,
312 .disable = sunxi_musb_disable,
313};