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Enric Balletbò i Serrac7964f82013-12-06 21:30:23 +01001/*
2 * ti_omap3_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * For more details, please see the technical documents listed at
9 * http://www.ti.com/product/omap3530
10 * http://www.ti.com/product/omap3630
11 * http://www.ti.com/product/dm3730
12 */
13
14#ifndef __CONFIG_TI_OMAP3_COMMON_H__
15#define __CONFIG_TI_OMAP3_COMMON_H__
16
Enric Balletbò i Serrac7964f82013-12-06 21:30:23 +010017
18#include <asm/arch/cpu.h>
19#include <asm/arch/omap3.h>
20
21/* The chip has SDRC controller */
22#define CONFIG_SDRC
23
24/* Clock Defines */
25#define V_OSCK 26000000 /* Clock output from T2 */
26#define V_SCLK (V_OSCK >> 1)
27
28/* NS16550 Configuration */
29#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
30#define CONFIG_SYS_NS16550
31#define CONFIG_SYS_NS16550_SERIAL
32#define CONFIG_SYS_NS16550_REG_SIZE (-4)
33#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
34#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
35 115200}
36
37/* Select serial console configuration */
38#define CONFIG_CONS_INDEX 3
39#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
40#define CONFIG_SERIAL3 3
41
42/* Physical Memory Map */
43#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
44#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
45
46/*
47 * OMAP3 has 12 GP timers, they can be driven by the system clock
48 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
49 * This rate is divided by a local divisor.
50 */
51#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
52
53#define CONFIG_SYS_MONITOR_LEN (256 << 10)
54
55/* TWL4030 */
56#define CONFIG_TWL4030_POWER 1
57
58/* SPL */
59#define CONFIG_SPL_TEXT_BASE 0x40200800
60#define CONFIG_SPL_MAX_SIZE (54 * 1024)
61#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
62#define CONFIG_SPL_POWER_SUPPORT
Tom Rinid3289aa2014-04-03 07:52:53 -040063#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
64 (64 << 20))
65
Enric Balletbò i Serrac7964f82013-12-06 21:30:23 +010066
67#ifdef CONFIG_NAND
68#define CONFIG_SPL_NAND_SUPPORT
69#define CONFIG_SPL_NAND_SIMPLE
Tom Rinidf4dbb52014-04-03 15:17:15 -040070#define CONFIG_SYS_NAND_BASE 0x30000000
Enric Balletbò i Serrac7964f82013-12-06 21:30:23 +010071#endif
72
73/* Now bring in the rest of the common code. */
74#include <configs/ti_armv7_common.h>
75
76#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */