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Mingkai Hu273feaf2011-04-26 16:31:16 +08001/*
2 * eSPI controller driver.
3 *
4 * Copyright 2010-2011 Freescale Semiconductor, Inc.
5 * Author: Mingkai Hu (Mingkai.hu@freescale.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24
25#include <malloc.h>
26#include <spi.h>
27#include <asm/immap_85xx.h>
28
29struct fsl_spi_slave {
30 struct spi_slave slave;
31 unsigned int div16;
32 unsigned int pm;
33 unsigned int mode;
34 size_t cmd_len;
35 u8 cmd_buf[16];
36 size_t data_len;
37 unsigned int max_transfer_length;
38};
39
40#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
41
42#define ESPI_MAX_CS_NUM 4
43
44#define ESPI_EV_RNE (1 << 9)
45#define ESPI_EV_TNF (1 << 8)
46
47#define ESPI_MODE_EN (1 << 31) /* Enable interface */
48#define ESPI_MODE_TXTHR(x) ((x) << 8) /* Tx FIFO threshold */
49#define ESPI_MODE_RXTHR(x) ((x) << 0) /* Rx FIFO threshold */
50
51#define ESPI_COM_CS(x) ((x) << 30)
52#define ESPI_COM_TRANLEN(x) ((x) << 0)
53
54#define ESPI_CSMODE_CI_INACTIVEHIGH (1 << 31)
55#define ESPI_CSMODE_CP_BEGIN_EDGCLK (1 << 30)
56#define ESPI_CSMODE_REV_MSB_FIRST (1 << 29)
57#define ESPI_CSMODE_DIV16 (1 << 28)
58#define ESPI_CSMODE_PM(x) ((x) << 24)
59#define ESPI_CSMODE_POL_ASSERTED_LOW (1 << 20)
60#define ESPI_CSMODE_LEN(x) ((x) << 16)
61#define ESPI_CSMODE_CSBEF(x) ((x) << 12)
62#define ESPI_CSMODE_CSAFT(x) ((x) << 8)
63#define ESPI_CSMODE_CSCG(x) ((x) << 3)
64
65#define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \
66 ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \
67 ESPI_CSMODE_CSCG(1))
68
69#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
70
71struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
72 unsigned int max_hz, unsigned int mode)
73{
74 struct fsl_spi_slave *fsl;
75 sys_info_t sysinfo;
76 unsigned long spibrg = 0;
77 unsigned char pm = 0;
78
79 if (!spi_cs_is_valid(bus, cs))
80 return NULL;
81
Simon Glassd3504fe2013-03-18 19:23:40 +000082 fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
Mingkai Hu273feaf2011-04-26 16:31:16 +080083 if (!fsl)
84 return NULL;
85
Mingkai Hu273feaf2011-04-26 16:31:16 +080086 fsl->mode = mode;
87 fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
88
89 /* Set eSPI BRG clock source */
90 get_sys_info(&sysinfo);
91 spibrg = sysinfo.freqSystemBus / 2;
92 fsl->div16 = 0;
93 if ((spibrg / max_hz) > 32) {
94 fsl->div16 = ESPI_CSMODE_DIV16;
95 pm = spibrg / (max_hz * 16 * 2);
96 if (pm > 16) {
97 pm = 16;
Marek Vasut5cc08a12011-10-21 14:17:20 +000098 debug("Requested speed is too low: %d Hz, %ld Hz "
99 "is used.\n", max_hz, spibrg / (32 * 16));
Mingkai Hu273feaf2011-04-26 16:31:16 +0800100 }
101 } else
102 pm = spibrg / (max_hz * 2);
103 if (pm)
104 pm--;
105 fsl->pm = pm;
106
107 return &fsl->slave;
108}
109
110void spi_free_slave(struct spi_slave *slave)
111{
112 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
113 free(fsl);
114}
115
116void spi_init(void)
117{
118
119}
120
121int spi_claim_bus(struct spi_slave *slave)
122{
123 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
124 ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
125 unsigned char pm = fsl->pm;
126 unsigned int cs = slave->cs;
127 unsigned int mode = fsl->mode;
128 unsigned int div16 = fsl->div16;
129 int i;
130
131 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
132
133 /* Enable eSPI interface */
134 out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
135 | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
136
137 out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
138 out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */
139
140 /* Init CS mode interface */
141 for (i = 0; i < ESPI_MAX_CS_NUM; i++)
142 out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
143
144 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
145 ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
146 | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
147 | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
148
149 /* Set eSPI BRG clock source */
150 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
151 | ESPI_CSMODE_PM(pm) | div16);
152
153 /* Set eSPI mode */
154 if (mode & SPI_CPHA)
155 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
156 | ESPI_CSMODE_CP_BEGIN_EDGCLK);
157 if (mode & SPI_CPOL)
158 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
159 | ESPI_CSMODE_CI_INACTIVEHIGH);
160
161 /* Character bit order: msb first */
162 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
163 | ESPI_CSMODE_REV_MSB_FIRST);
164
165 /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
166 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
167 | ESPI_CSMODE_LEN(7));
168
169 return 0;
170}
171
172void spi_release_bus(struct spi_slave *slave)
173{
174
175}
176
177int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
178 void *data_in, unsigned long flags)
179{
180 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
181 ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
182 unsigned int tmpdout, tmpdin, event;
183 const void *dout = NULL;
184 void *din = NULL;
185 int len = 0;
186 int num_blks, num_chunks, max_tran_len, tran_len;
187 int num_bytes;
188 unsigned char *ch;
189 unsigned char *buffer = NULL;
190 size_t buf_len;
191 u8 *cmd_buf = fsl->cmd_buf;
192 size_t cmd_len = fsl->cmd_len;
193 size_t data_len = bitlen / 8;
194 size_t rx_offset = 0;
195
196 max_tran_len = fsl->max_transfer_length;
197 switch (flags) {
198 case SPI_XFER_BEGIN:
199 cmd_len = fsl->cmd_len = data_len;
200 memcpy(cmd_buf, data_out, cmd_len);
201 return 0;
202 case 0:
203 case SPI_XFER_END:
204 if (bitlen == 0) {
205 spi_cs_deactivate(slave);
206 return 0;
207 }
208 buf_len = 2 * cmd_len + min(data_len, max_tran_len);
209 len = cmd_len + data_len;
210 rx_offset = cmd_len;
211 buffer = (unsigned char *)malloc(buf_len);
212 if (!buffer) {
213 debug("SF: Failed to malloc memory.\n");
214 return 1;
215 }
216 memcpy(buffer, cmd_buf, cmd_len);
Shaohui Xie99057572012-10-11 20:31:46 +0000217 if (data_in == NULL)
218 memcpy(buffer + cmd_len, data_out, data_len);
Mingkai Hu273feaf2011-04-26 16:31:16 +0800219 break;
220 case SPI_XFER_BEGIN | SPI_XFER_END:
221 len = data_len;
222 buffer = (unsigned char *)malloc(len * 2);
223 if (!buffer) {
224 debug("SF: Failed to malloc memory.\n");
225 return 1;
226 }
227 memcpy(buffer, data_out, len);
228 rx_offset = len;
229 cmd_len = 0;
230 break;
231 }
232
Marek Vasut5cc08a12011-10-21 14:17:20 +0000233 debug("spi_xfer: slave %u:%u dout %08X(%p) din %08X(%p) len %u\n",
Mingkai Hu273feaf2011-04-26 16:31:16 +0800234 slave->bus, slave->cs, *(uint *) dout,
235 dout, *(uint *) din, din, len);
236
237 num_chunks = data_len / max_tran_len +
238 (data_len % max_tran_len ? 1 : 0);
239 while (num_chunks--) {
240 if (data_in)
241 din = buffer + rx_offset;
242 dout = buffer;
243 tran_len = min(data_len , max_tran_len);
244 num_blks = (tran_len + cmd_len) / 4 +
245 ((tran_len + cmd_len) % 4 ? 1 : 0);
246 num_bytes = (tran_len + cmd_len) % 4;
247 fsl->data_len = tran_len + cmd_len;
248 spi_cs_activate(slave);
249
250 /* Clear all eSPI events */
251 out_be32(&espi->event , 0xffffffff);
252 /* handle data in 32-bit chunks */
253 while (num_blks--) {
254
255 event = in_be32(&espi->event);
256 if (event & ESPI_EV_TNF) {
257 tmpdout = *(u32 *)dout;
258
259 /* Set up the next iteration */
260 if (len > 4) {
261 len -= 4;
262 dout += 4;
263 }
264
265 out_be32(&espi->tx, tmpdout);
266 out_be32(&espi->event, ESPI_EV_TNF);
267 debug("***spi_xfer:...%08x written\n", tmpdout);
268 }
269
270 /* Wait for eSPI transmit to get out */
271 udelay(80);
272
273 event = in_be32(&espi->event);
274 if (event & ESPI_EV_RNE) {
275 tmpdin = in_be32(&espi->rx);
276 if (num_blks == 0 && num_bytes != 0) {
277 ch = (unsigned char *)&tmpdin;
278 while (num_bytes--)
279 *(unsigned char *)din++ = *ch++;
280 } else {
281 *(u32 *) din = tmpdin;
282 din += 4;
283 }
284
285 out_be32(&espi->event, in_be32(&espi->event)
286 | ESPI_EV_RNE);
287 debug("***spi_xfer:...%08x readed\n", tmpdin);
288 }
289 }
290 if (data_in) {
291 memcpy(data_in, buffer + 2 * cmd_len, tran_len);
292 if (*buffer == 0x0b) {
293 data_in += tran_len;
294 data_len -= tran_len;
295 *(int *)buffer += tran_len;
296 }
297 }
298 spi_cs_deactivate(slave);
299 }
300
301 free(buffer);
302 return 0;
303}
304
305int spi_cs_is_valid(unsigned int bus, unsigned int cs)
306{
307 return bus == 0 && cs < ESPI_MAX_CS_NUM;
308}
309
310void spi_cs_activate(struct spi_slave *slave)
311{
312 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
313 ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
314 unsigned int com = 0;
315 size_t data_len = fsl->data_len;
316
317 com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
318 com |= ESPI_COM_CS(slave->cs);
319 com |= ESPI_COM_TRANLEN(data_len - 1);
320 out_be32(&espi->com, com);
321}
322
323void spi_cs_deactivate(struct spi_slave *slave)
324{
325 ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
326
327 /* clear the RXCNT and TXCNT */
328 out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
329 out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
330}