blob: 8e4a0ce99790bf3709e73b3484b60f8c4f7c8bec [file] [log] [blame]
Tim Harvey5db93ab2021-03-02 14:00:20 -08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2020 Gateworks Corporation
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/leds/common.h>
8
9/ {
10 aliases {
11 usb0 = &usbotg1;
12 usb1 = &usbotg2;
13 };
14
15 led-controller {
16 compatible = "gpio-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_gpio_leds>;
19
20 led-0 {
21 function = LED_FUNCTION_STATUS;
22 color = <LED_COLOR_ID_GREEN>;
23 gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
24 default-state = "on";
25 linux,default-trigger = "heartbeat";
26 };
27
28 led-1 {
29 function = LED_FUNCTION_STATUS;
30 color = <LED_COLOR_ID_RED>;
31 gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
32 default-state = "off";
33 };
34 };
35
36 pps {
37 compatible = "pps-gpio";
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_pps>;
40 gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
41 status = "okay";
42 };
43
44 reg_usb_otg1_vbus: regulator-usb-otg1 {
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_reg_usb1_en>;
47 compatible = "regulator-fixed";
48 regulator-name = "usb_otg1_vbus";
Tim Harvey98559e02021-07-27 15:19:34 -070049 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
Tim Harvey5db93ab2021-03-02 14:00:20 -080050 enable-active-high;
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 };
54};
55
56/* off-board header */
57&ecspi2 {
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_spi2>;
60 cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
61 status = "okay";
62};
63
64&i2c2 {
65 clock-frequency = <400000>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_i2c2>;
68 status = "okay";
69
70 accelerometer@19 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_accel>;
73 compatible = "st,lis2de12";
74 reg = <0x19>;
75 st,drdy-int-pin = <1>;
76 interrupt-parent = <&gpio4>;
77 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
78 interrupt-names = "INT1";
79 };
80};
81
82/* off-board header */
83&i2c3 {
84 clock-frequency = <400000>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_i2c3>;
87 status = "okay";
88};
89
90/* GPS */
91&uart1 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_uart1>;
94 status = "okay";
95};
96
97/* off-board header */
98&uart3 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_uart3>;
101 status = "okay";
102};
103
104&usbotg1 {
105 dr_mode = "otg";
106 vbus-supply = <&reg_usb_otg1_vbus>;
107 status = "okay";
108};
109
110&usbotg2 {
111 dr_mode = "host";
112 status = "okay";
113};
114
115&iomuxc {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_hog>;
118
119 pinctrl_hog: hoggrp {
120 fsl,pins = <
121 MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
122 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
123 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
124 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
125 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
126 MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000041 /* DIO2 */
127 MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIO2 */
128 >;
129 };
130
131 pinctrl_accel: accelgrp {
132 fsl,pins = <
133 MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
134 >;
135 };
136
137 pinctrl_gpio_leds: gpioledgrp {
138 fsl,pins = <
139 MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
140 MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
141 >;
142 };
143
144 pinctrl_i2c3: i2c3grp {
145 fsl,pins = <
146 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
147 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
148 >;
149 };
150
151 pinctrl_pps: ppsgrp {
152 fsl,pins = <
153 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
154 >;
155 };
156
157 pinctrl_reg_usb1_en: regusb1grp {
158 fsl,pins = <
Tim Harvey98559e02021-07-27 15:19:34 -0700159 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x41
160 MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141
Tim Harvey5db93ab2021-03-02 14:00:20 -0800161 MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
162 >;
163 };
164
165 pinctrl_spi2: spi2grp {
166 fsl,pins = <
167 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
168 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
169 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
170 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
171 >;
172 };
173
174 pinctrl_uart1: uart1grp {
175 fsl,pins = <
176 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
177 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
178 >;
179 };
180
181 pinctrl_uart3: uart3grp {
182 fsl,pins = <
183 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
184 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
185 >;
186 };
187};