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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Valentin Longchampb7373372012-08-16 01:17:26 +00002/*
3 * (C) Copyright 2012
4 * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
Valentin Longchampb7373372012-08-16 01:17:26 +00005 */
6
7#ifndef __MV886352_H
8#define __MV886352_H
9
10#include <common.h>
11
12/* PHY registers */
13#define PHY(itf) (itf)
14
15#define PHY_CTRL 0x00
16#define PHY_100_MBPS 0x2000
17#define PHY_1_GBPS 0x0040
18#define AUTONEG_EN 0x1000
19#define AUTONEG_RST 0x0200
20#define FULL_DUPLEX 0x0100
21#define PHY_PWR_DOWN 0x0800
22
23#define PHY_STATUS 0x01
24#define AN1000FIX 0x0001
25
26#define PHY_SPEC_CTRL 0x10
27#define SPEC_PWR_DOWN 0x0004
28#define AUTO_MDIX_EN 0x0060
29
30#define PHY_1000_CTRL 0x9
31
32#define NO_ADV 0x0000
33#define ADV_1000_FDPX 0x0200
34#define ADV_1000_HDPX 0x0100
35
36#define PHY_PAGE 0x16
37
38#define AN1000FIX_PAGE 0x00fc
39
40/* PORT or MAC registers */
41#define PORT(itf) (itf+0x10)
42
43#define PORT_STATUS 0x00
44#define NO_PHY_DETECT 0x0000
45
46#define PORT_PHY 0x01
47#define RX_RGMII_TIM 0x8000
48#define TX_RGMII_TIM 0x4000
49#define FLOW_CTRL_EN 0x0080
50#define FLOW_CTRL_FOR 0x0040
51#define LINK_VAL 0x0020
52#define LINK_FOR 0x0010
53#define FULL_DPX 0x0008
54#define FULL_DPX_FOR 0x0004
55#define NO_SPEED_FOR 0x0003
56#define SPEED_1000_FOR 0x0002
57#define SPEED_100_FOR 0x0001
58#define SPEED_10_FOR 0x0000
59
60#define PORT_CTRL 0x04
61#define FORWARDING 0x0003
62#define EGRS_FLD_ALL 0x000c
63#define PORT_DIS 0x0000
64
65struct mv88e_sw_reg {
66 u8 port;
67 u8 reg;
68 u16 value;
69};
70
71int mv88e_sw_reset(const char *devname, u8 phy_addr);
72int mv88e_sw_program(const char *devname, u8 phy_addr,
73 struct mv88e_sw_reg *regs, int regs_nb);
74
75#endif