Blame - include/configs/dra7xx_evm.h - platform/external/u-boot

blob: 291c538a3466908e58423747a1bfde651048eb8b [file] [log] [blame]

Lokesh Vutla	3ef5ebe	2013-02-17 23:34:35 +0000	[diff] [blame]	1	/*
				2	* (C) Copyright 2013
				3	* Texas Instruments Incorporated.
				4	* Lokesh Vutla <lokeshvutla@ti.com>
				5	*
				6	* Configuration settings for the TI DRA7XX board.
Enric Balletbò i Serra	3d657a0	2013-12-06 21:30:19 +0100	[diff] [blame]	7	* See ti_omap5_common.h for omap5 common settings.
Lokesh Vutla	3ef5ebe	2013-02-17 23:34:35 +0000	[diff] [blame]	8	*
Wolfgang Denk	3765b3e	2013-10-07 13:07:26 +0200	[diff] [blame]	9	* SPDX-License-Identifier: GPL-2.0+
Lokesh Vutla	3ef5ebe	2013-02-17 23:34:35 +0000	[diff] [blame]	10	*/
				11
				12	#ifndef __CONFIG_DRA7XX_EVM_H
				13	#define __CONFIG_DRA7XX_EVM_H
				14
Tom Rini	a801757	2013-08-09 11:22:18 -0400	[diff] [blame]	15	#define CONFIG_DRA7XX
				16
Lokesh Vutla	d3d33da	2013-08-23 17:27:04 +0530	[diff] [blame]	17	/* MMC ENV related defines */
				18	#define CONFIG_ENV_IS_IN_MMC
				19	#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
				20	#define CONFIG_ENV_OFFSET 0xE0000
				21	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
				22	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
				23	#define CONFIG_CMD_SAVEENV
Tom Rini	9552ee3	2013-04-05 06:21:45 +0000	[diff] [blame]	24
Minal Shah	a13cbf5	2013-10-04 14:52:02 -0400	[diff] [blame]	25	#if (CONFIG_CONS_INDEX == 1)
Tom Rini	a801757	2013-08-09 11:22:18 -0400	[diff] [blame]	26	#define CONSOLEDEV "ttyO0"
Minal Shah	a13cbf5	2013-10-04 14:52:02 -0400	[diff] [blame]	27	#elif (CONFIG_CONS_INDEX == 3)
				28	#define CONSOLEDEV "ttyO2"
				29	#endif
				30	#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
				31	#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
				32	#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Sricharan R	378bd1f	2013-05-30 03:19:33 +0000	[diff] [blame]	33	#define CONFIG_BAUDRATE 115200
Lokesh Vutla	97405d8	2013-05-30 03:19:38 +0000	[diff] [blame]	34
				35	#define CONFIG_SYS_OMAP_ABE_SYSCK
Dan Murphy	45dbbf2	2013-06-11 11:22:30 -0500	[diff] [blame]	36
Tom Rini	2efa79a	2014-01-21 17:15:08 -0500	[diff] [blame]	37	/* Define the default GPT table for eMMC */
				38	#define PARTS_DEFAULT \
				39	"uuid_disk=${uuid_gpt_disk};" \
				40	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
				41
Enric Balletbò i Serra	3d657a0	2013-12-06 21:30:19 +0100	[diff] [blame]	42	#include <configs/ti_omap5_common.h>
Dan Murphy	45dbbf2	2013-06-11 11:22:30 -0500	[diff] [blame]	43
Tom Rini	2efa79a	2014-01-21 17:15:08 -0500	[diff] [blame]	44	/* Enhance our eMMC support / experience. */
				45	#define CONFIG_CMD_GPT
				46	#define CONFIG_EFI_PARTITION
				47	#define CONFIG_PARTITION_UUIDS
				48	#define CONFIG_CMD_PART
				49
Mugunthan V N	c9be62c	2013-07-08 16:04:43 +0530	[diff] [blame]	50	/* CPSW Ethernet */
Tom Rini	457bb50	2013-08-20 08:53:54 -0400	[diff] [blame]	51	#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
Mugunthan V N	c9be62c	2013-07-08 16:04:43 +0530	[diff] [blame]	52	#define CONFIG_CMD_DHCP
Tom Rini	457bb50	2013-08-20 08:53:54 -0400	[diff] [blame]	53	#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
Mugunthan V N	c9be62c	2013-07-08 16:04:43 +0530	[diff] [blame]	54	#define CONFIG_BOOTP_DNS2
				55	#define CONFIG_BOOTP_SEND_HOSTNAME
				56	#define CONFIG_BOOTP_GATEWAY
				57	#define CONFIG_BOOTP_SUBNETMASK
Tom Rini	457bb50	2013-08-20 08:53:54 -0400	[diff] [blame]	58	#define CONFIG_NET_RETRY_COUNT 10
				59	#define CONFIG_CMD_PING
				60	#define CONFIG_CMD_MII
				61	#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
				62	#define CONFIG_MII /* Required in net/eth.c */
				63	#define CONFIG_PHY_GIGE /* per-board part of CPSW */
Mugunthan V N	c9be62c	2013-07-08 16:04:43 +0530	[diff] [blame]	64	#define CONFIG_PHYLIB
Mugunthan V N	c9be62c	2013-07-08 16:04:43 +0530	[diff] [blame]	65
Matt Porter	247cdf0	2013-10-07 15:53:03 +0530	[diff] [blame]	66	/* SPI */
				67	#undef CONFIG_OMAP3_SPI
				68	#define CONFIG_TI_QSPI
				69	#define CONFIG_SPI_FLASH
				70	#define CONFIG_SPI_FLASH_SPANSION
				71	#define CONFIG_CMD_SF
				72	#define CONFIG_CMD_SPI
Poddar, Sourav	2c57b03	2013-11-14 21:01:14 +0530	[diff] [blame]	73	#define CONFIG_SPI_FLASH_BAR
Matt Porter	247cdf0	2013-10-07 15:53:03 +0530	[diff] [blame]	74	#define CONFIG_TI_SPI_MMAP
				75	#define CONFIG_SF_DEFAULT_SPEED 48000000
				76	#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
				77
				78	/* SPI SPL */
				79	#define CONFIG_SPL_SPI_SUPPORT
				80	#define CONFIG_SPL_SPI_LOAD
				81	#define CONFIG_SPL_SPI_FLASH_SUPPORT
				82	#define CONFIG_SPL_SPI_BUS 0
				83	#define CONFIG_SPL_SPI_CS 0
				84	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
				85
Tom Rini	b818d9a	2014-02-05 10:24:25 -0500	[diff] [blame]	86	#define CONFIG_SUPPORT_EMMC_BOOT
				87
Dan Murphy	834e91a	2013-10-11 12:28:17 -0500	[diff] [blame]	88	/* USB xHCI HOST */
				89	#define CONFIG_CMD_USB
				90	#define CONFIG_USB_HOST
				91	#define CONFIG_USB_XHCI
				92	#define CONFIG_USB_XHCI_OMAP
				93	#define CONFIG_USB_STORAGE
				94	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
				95
				96	#define CONFIG_OMAP_USB_PHY
				97	#define CONFIG_OMAP_USB2PHY2_HOST
				98
Roger Quadros	21914ee	2013-11-11 16:56:44 +0200	[diff] [blame]	99	/* SATA */
				100	#define CONFIG_BOARD_LATE_INIT
				101	#define CONFIG_CMD_SCSI
				102	#define CONFIG_LIBATA
				103	#define CONFIG_SCSI_AHCI
				104	#define CONFIG_SCSI_AHCI_PLAT
				105	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
				106	#define CONFIG_SYS_SCSI_MAX_LUN 1
				107	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
				108	CONFIG_SYS_SCSI_MAX_LUN)
				109
Lokesh Vutla	3ef5ebe	2013-02-17 23:34:35 +0000	[diff] [blame]	110	#endif /* __CONFIG_DRA7XX_EVM_H */