blob: 9081f416605ef3492f9ef7ee39ec06b4718cc62a [file] [log] [blame]
Chris Packham0e316662019-01-10 21:01:00 +13001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Allied Telesis Labs
4 */
5
6#ifndef _CONFIG_X530_H
7#define _CONFIG_X530_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
12
13#define CONFIG_DISPLAY_BOARDINFO_LATE
14
15#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
16
17/*
18 * NS16550 Configuration
19 */
20#define CONFIG_SYS_NS16550_SERIAL
21#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
22#if !defined(CONFIG_DM_SERIAL)
23#define CONFIG_SYS_NS16550_REG_SIZE (-4)
24#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
25#endif
26
27/*
28 * Serial Port configuration
29 * The following definitions let you select what serial you want to use
30 * for your console driver.
31 */
32
33#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
34
35/*
36 * Commands configuration
37 */
38#define CONFIG_CMD_PCI
39
40/* NAND */
41#define CONFIG_SYS_NAND_ONFI_DETECTION
Chris Packham0e316662019-01-10 21:01:00 +130042#define CONFIG_SYS_MAX_NAND_DEVICE 1
43
44#define BBT_CUSTOM_SCAN
45#define BBT_CUSTOM_SCAN_PAGE 0
46#define BBT_CUSTOM_SCAN_POSITION 2048
47
48/* SPI NOR flash default params, used by sf commands */
Chris Packham0e316662019-01-10 21:01:00 +130049
50#define MTDIDS_DEFAULT "nand0=nand"
51#define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)"
52#define MTDPARTS_MTDOOPS "errlog"
53
54/* Partition support */
55
56/* Additional FS support/configuration */
57
58/* USB/EHCI configuration */
59#define CONFIG_EHCI_IS_TDI
60
61/* Environment in SPI NOR flash */
Chris Packham0e316662019-01-10 21:01:00 +130062
Chris Packham0e316662019-01-10 21:01:00 +130063#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
64
65/* PCIe support */
66#ifndef CONFIG_SPL_BUILD
Chris Packham0e316662019-01-10 21:01:00 +130067#define CONFIG_PCI_SCAN_SHOW
68#endif
69
70/* NAND */
Chris Packham0e316662019-01-10 21:01:00 +130071#define CONFIG_SYS_NAND_ONFI_DETECTION
72#define CONFIG_CMD_UBI
73#define CONFIG_CMD_UBIFS
74#define CONFIG_LZO
Chris Packham0e316662019-01-10 21:01:00 +130075#define CONFIG_CMD_MTDPARTS
76
77#define CONFIG_SYS_MALLOC_LEN (4 << 20)
78
79#include <asm/arch/config.h>
80
81/*
82 * Other required minimal configurations
83 */
Chris Packham0e316662019-01-10 21:01:00 +130084#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
85
Chris Packham0e316662019-01-10 21:01:00 +130086/* Keep device tree and initrd in low memory so the kernel can access them */
87#define CONFIG_EXTRA_ENV_SETTINGS \
88 "fdt_high=0x10000000\0" \
89 "initrd_high=0x10000000\0"
90
91#define CONFIG_SYS_LOAD_ADDR 0x1000000
92#define CONFIG_UBI_PART user
93#define CONFIG_UBIFS_VOLUME user
94
95/* SPL */
96
97/* Defines for SPL */
98#define CONFIG_SPL_SIZE (140 << 10)
Chris Packham0e316662019-01-10 21:01:00 +130099#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
100
101#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
102#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
103
104#ifdef CONFIG_SPL_BUILD
105#define CONFIG_SYS_MALLOC_SIMPLE
106#endif
107
108#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
109#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
110
111/* SPL related SPI defines */
Chris Packham0e316662019-01-10 21:01:00 +1300112#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
113
114#endif /* _CONFIG_X530_H */