blob: 86add36ce11b9a7a154e0070bb8964e9e5987f4e [file] [log] [blame]
Kuo-Jung Sue82a3162013-05-15 15:29:23 +08001/*
2 * Faraday USB 2.0 EHCI Controller
3 *
4 * (C) Copyright 2010 Faraday Technology
5 * Dante Su <dantesu@faraday-tech.com>
6 *
7 * This file is released under the terms of GPL v2 and any later version.
8 * See the file COPYING in the root directory of the source tree for details.
9 */
10
11#include <common.h>
12#include <asm/io.h>
13#include <usb.h>
14#include <usb/fusbh200.h>
15#include <usb/fotg210.h>
16
17#include "ehci.h"
18
19#ifndef CONFIG_USB_EHCI_BASE_LIST
20#define CONFIG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE }
21#endif
22
23union ehci_faraday_regs {
24 struct fusbh200_regs usb;
25 struct fotg210_regs otg;
26};
27
28static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs)
29{
30 return !readl(&regs->usb.easstr);
31}
32
33/*
34 * Create the appropriate control structures to manage
35 * a new EHCI host controller.
36 */
37int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
38 struct ehci_hcor **ret_hcor)
39{
40 struct ehci_hccr *hccr;
41 struct ehci_hcor *hcor;
42 union ehci_faraday_regs *regs;
43 uint32_t base_list[] = CONFIG_USB_EHCI_BASE_LIST;
44
45 if (index < 0 || index >= ARRAY_SIZE(base_list))
46 return -1;
47 regs = (void __iomem *)base_list[index];
48 hccr = (struct ehci_hccr *)&regs->usb.hccr;
49 hcor = (struct ehci_hcor *)&regs->usb.hcor;
50
51 if (ehci_is_fotg2xx(regs)) {
52 /* A-device bus reset */
53 /* ... Power off A-device */
54 setbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSDROP);
55 /* ... Drop vbus and bus traffic */
56 clrbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSREQ);
57 mdelay(1);
58 /* ... Power on A-device */
59 clrbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSDROP);
60 /* ... Drive vbus and bus traffic */
61 setbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSREQ);
62 mdelay(1);
63 /* Disable OTG & DEV interrupts, triggered at level-high */
64 writel(IMR_IRQLH | IMR_OTG | IMR_DEV, &regs->otg.imr);
65 /* Clear all interrupt status */
66 writel(ISR_HOST | ISR_OTG | ISR_DEV, &regs->otg.isr);
67 } else {
68 /* Interrupt=level-high */
69 setbits_le32(&regs->usb.bmcsr, BMCSR_IRQLH);
70 /* VBUS on */
71 clrbits_le32(&regs->usb.bmcsr, BMCSR_VBUS_OFF);
72 /* Disable all interrupts */
73 writel(0x00, &regs->usb.bmier);
74 writel(0x1f, &regs->usb.bmisr);
75 }
76
77 *ret_hccr = hccr;
78 *ret_hcor = hcor;
79
80 return 0;
81}
82
83/*
84 * Destroy the appropriate control structures corresponding
85 * the the EHCI host controller.
86 */
87int ehci_hcd_stop(int index)
88{
89 return 0;
90}
91
92/*
93 * This ehci_set_usbmode() overrides the weak function
94 * in "ehci-hcd.c".
95 */
96void ehci_set_usbmode(int index)
97{
98 /* nothing needs to be done */
99}
100
101/*
102 * This ehci_get_port_speed() overrides the weak function
103 * in "ehci-hcd.c".
104 */
105int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
106{
107 int spd, ret = PORTSC_PSPD_HS;
108 union ehci_faraday_regs *regs = (void __iomem *)((ulong)hcor - 0x10);
109
110 if (ehci_is_fotg2xx(regs))
111 spd = OTGCSR_SPD(readl(&regs->otg.otgcsr));
112 else
113 spd = BMCSR_SPD(readl(&regs->usb.bmcsr));
114
115 switch (spd) {
116 case 0: /* full speed */
117 ret = PORTSC_PSPD_FS;
118 break;
119 case 1: /* low speed */
120 ret = PORTSC_PSPD_LS;
121 break;
122 case 2: /* high speed */
123 ret = PORTSC_PSPD_HS;
124 break;
125 default:
126 printf("ehci-faraday: invalid device speed\n");
127 break;
128 }
129
130 return ret;
131}
132
133/*
134 * This ehci_get_portsc_register() overrides the weak function
135 * in "ehci-hcd.c".
136 */
137uint32_t *ehci_get_portsc_register(struct ehci_hcor *hcor, int port)
138{
139 /* Faraday EHCI has one and only one portsc register */
140 if (port) {
141 /* Printing the message would cause a scan failure! */
142 debug("The request port(%d) is not configured\n", port);
143 return NULL;
144 }
145
146 /* Faraday EHCI PORTSC register offset is 0x20 from hcor */
147 return (uint32_t *)((uint8_t *)hcor + 0x20);
148}