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wdenk121cb962002-10-07 19:37:29 +00001/*
Stefan Roesea47a12b2010-04-15 16:07:28 +02002 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
wdenk121cb962002-10-07 19:37:29 +00003 * copyright notice:
4 *
5 * General Purpose functions for the global management of the
6 * 8260 Communication Processor Module.
7 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
8 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
9 * 2.3.99 Updates
10 *
11 * In addition to the individual control of the communication
12 * channels, there are a few functions that globally affect the
13 * communication processor.
14 *
15 * Buffer descriptors must be allocated from the dual ported memory
16 * space. The allocator for that is here. When the communication
17 * process is reset, we reclaim the memory available. There is
18 * currently no deallocator for this memory.
19 */
20#include <common.h>
21#include <asm/cpm_8260.h>
22
Wolfgang Denkd87080b2006-03-31 18:32:53 +020023DECLARE_GLOBAL_DATA_PTR;
24
wdenk121cb962002-10-07 19:37:29 +000025void
26m8260_cpm_reset(void)
27{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +000029 volatile ulong count;
30
31 /* Reclaim the DP memory for our use.
32 */
Simon Glass6bb9ba72012-12-13 20:48:58 +000033 gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
34 gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;
wdenk121cb962002-10-07 19:37:29 +000035
36 /*
37 * Reset CPM
38 */
39 immr->im_cpm.cp_cpcr = CPM_CR_RST;
40 count = 0;
41 do { /* Spin until command processed */
42 __asm__ __volatile__ ("eieio");
43 } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000);
44
45#ifdef CONFIG_HARD_I2C
46 *((unsigned short*)(&immr->im_dprambase[PROFF_I2C_BASE])) = 0;
47#endif
48}
49
50/* Allocate some memory from the dual ported ram.
51 * To help protocols with object alignment restrictions, we do that
52 * if they ask.
53 */
54uint
55m8260_cpm_dpalloc(uint size, uint align)
56{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +000058 uint retloc;
59 uint align_mask, off;
60 uint savebase;
61
62 align_mask = align - 1;
Simon Glass6bb9ba72012-12-13 20:48:58 +000063 savebase = gd->arch.dp_alloc_base;
wdenk121cb962002-10-07 19:37:29 +000064
Simon Glass6bb9ba72012-12-13 20:48:58 +000065 off = gd->arch.dp_alloc_base & align_mask;
66 if (off != 0)
67 gd->arch.dp_alloc_base += (align - off);
wdenk121cb962002-10-07 19:37:29 +000068
69 if ((off = size & align_mask) != 0)
70 size += align - off;
71
Simon Glass6bb9ba72012-12-13 20:48:58 +000072 if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {
73 gd->arch.dp_alloc_base = savebase;
wdenk121cb962002-10-07 19:37:29 +000074 panic("m8260_cpm_dpalloc: ran out of dual port ram!");
75 }
76
Simon Glass6bb9ba72012-12-13 20:48:58 +000077 retloc = gd->arch.dp_alloc_base;
78 gd->arch.dp_alloc_base += size;
wdenk121cb962002-10-07 19:37:29 +000079
80 memset((void *)&immr->im_dprambase[retloc], 0, size);
81
82 return(retloc);
83}
84
85/* We also own one page of host buffer space for the allocation of
86 * UART "fifos" and the like.
87 */
88uint
89m8260_cpm_hostalloc(uint size, uint align)
90{
91 /* the host might not even have RAM yet - just use dual port RAM */
92 return (m8260_cpm_dpalloc(size, align));
93}
94
95/* Set a baud rate generator. This needs lots of work. There are
96 * eight BRGs, which can be connected to the CPM channels or output
97 * as clocks. The BRGs are in two different block of internal
98 * memory mapped space.
99 * The baud rate clock is the system clock divided by something.
100 * It was set up long ago during the initial boot phase and is
101 * is given to us.
102 * Baud rate clocks are zero-based in the driver code (as that maps
103 * to port numbers). Documentation uses 1-based numbering.
104 */
Simon Glass1206c182012-12-13 20:48:44 +0000105#define BRG_INT_CLK gd->arch.brg_clk
wdenk8564acf2003-07-14 22:13:32 +0000106#define BRG_UART_CLK (BRG_INT_CLK / 16)
wdenk121cb962002-10-07 19:37:29 +0000107
wdenk8564acf2003-07-14 22:13:32 +0000108/* This function is used by UARTs, or anything else that uses a 16x
wdenk121cb962002-10-07 19:37:29 +0000109 * oversampled clock.
110 */
111void
112m8260_cpm_setbrg(uint brg, uint rate)
113{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000115 volatile uint *bp;
wdenk8564acf2003-07-14 22:13:32 +0000116 uint cd = BRG_UART_CLK / rate;
wdenk121cb962002-10-07 19:37:29 +0000117
wdenk8564acf2003-07-14 22:13:32 +0000118 if ((BRG_UART_CLK % rate) < (rate / 2))
119 cd--;
wdenk121cb962002-10-07 19:37:29 +0000120 if (brg < 4) {
121 bp = (uint *)&immr->im_brgc1;
122 }
123 else {
124 bp = (uint *)&immr->im_brgc5;
125 brg -= 4;
126 }
127 bp += brg;
wdenk8564acf2003-07-14 22:13:32 +0000128 *bp = (cd << 1) | CPM_BRG_EN;
wdenk121cb962002-10-07 19:37:29 +0000129}
130
131/* This function is used to set high speed synchronous baud rate
132 * clocks.
133 */
134void
135m8260_cpm_fastbrg(uint brg, uint rate, int div16)
136{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000138 volatile uint *bp;
139
140 /* This is good enough to get SMCs running.....
141 */
142 if (brg < 4) {
143 bp = (uint *)&immr->im_brgc1;
144 }
145 else {
146 bp = (uint *)&immr->im_brgc5;
147 brg -= 4;
148 }
149 bp += brg;
150 *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
151 if (div16)
152 *bp |= CPM_BRG_DIV16;
153}
154
155/* This function is used to set baud rate generators using an external
156 * clock source and 16x oversampling.
157 */
158
159void
160m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
161{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000163 volatile uint *bp;
164
165 if (brg < 4) {
166 bp = (uint *)&immr->im_brgc1;
167 }
168 else {
169 bp = (uint *)&immr->im_brgc5;
170 brg -= 4;
171 }
172 bp += brg;
173 *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
174 if (pinsel == 0)
175 *bp |= CPM_BRG_EXTC_CLK3_9;
176 else
177 *bp |= CPM_BRG_EXTC_CLK5_15;
178}