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Bin Menga65b25d2015-05-07 21:34:08 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8
Bin Meng5c564222015-06-03 09:20:06 +08009#include <dt-bindings/interrupt-router/intel-irq.h>
10
Bin Menga65b25d2015-05-07 21:34:08 +080011/include/ "skeleton.dtsi"
12/include/ "serial.dtsi"
Bin Mengb6ff6ce2015-11-12 05:33:06 -080013/include/ "keyboard.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +080014/include/ "rtc.dtsi"
Bin Meng80af3982015-11-13 00:11:22 -080015/include/ "tsc_timer.dtsi"
Bin Menga65b25d2015-05-07 21:34:08 +080016
17/ {
Bin Meng683b09d2015-06-03 09:20:04 +080018 model = "QEMU x86 (I440FX)";
Bin Menga65b25d2015-05-07 21:34:08 +080019 compatible = "qemu,x86";
20
21 config {
22 silent_console = <0>;
23 };
24
25 chosen {
26 stdout-path = "/serial";
27 };
28
Bin Menga8ebf282015-07-22 01:21:13 -070029 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 cpu@0 {
34 device_type = "cpu";
Miao Yan5a694052016-01-07 01:32:01 -080035 compatible = "cpu-qemu";
Bin Menga8ebf282015-07-22 01:21:13 -070036 reg = <0>;
37 intel,apic-id = <0>;
38 };
39 };
40
Bin Meng80af3982015-11-13 00:11:22 -080041 tsc-timer {
42 clock-frequency = <1000000000>;
43 };
44
Bin Menga65b25d2015-05-07 21:34:08 +080045 pci {
46 compatible = "pci-x86";
47 #address-cells = <3>;
48 #size-cells = <2>;
49 u-boot,dm-pre-reloc;
50 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
51 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
52 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
Bin Meng5c564222015-06-03 09:20:06 +080053
Simon Glassf2b85ab2016-01-18 20:19:21 -070054 pch@1,0 {
Bin Meng5c564222015-06-03 09:20:06 +080055 reg = <0x00000800 0 0 0 0>;
Simon Glassf2b85ab2016-01-18 20:19:21 -070056 compatible = "intel,pch7";
57
58 irq-router {
59 compatible = "intel,irq-router";
60 intel,pirq-config = "pci";
61 intel,pirq-link = <0x60 4>;
62 intel,pirq-mask = <0x0e40>;
63 intel,pirq-routing = <
64 /* PIIX UHCI */
65 PCI_BDF(0, 1, 2) INTD PIRQD
66 /* e1000 NIC */
67 PCI_BDF(0, 3, 0) INTA PIRQC
68 >;
69 };
Bin Meng5c564222015-06-03 09:20:06 +080070 };
Bin Menga65b25d2015-05-07 21:34:08 +080071 };
72
73};