blob: b63f9c0dde67ab9da93903e78782858cf498f859 [file] [log] [blame]
Jacob Chenf48f2b72016-09-19 18:46:27 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <clk.h>
9#include <dm.h>
10#include <ram.h>
11#include <asm/io.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/periph.h>
14#include <asm/gpio.h>
15#include <dm/pinctrl.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19int board_init(void)
20{
21 return 0;
22}
23
24int dram_init(void)
25{
26 gd->ram_size = sdram_size();
27
28 return 0;
29}
30
31#ifndef CONFIG_SYS_DCACHE_OFF
32void enable_caches(void)
33{
34 /* Enable D-cache. I-cache is already enabled in start.S */
35 dcache_enable();
36}
37#endif
38
39#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
40#include <usb.h>
41#include <usb/dwc2_udc.h>
42
43static struct dwc2_plat_otg_data rk3036_otg_data = {
44 .rx_fifo_sz = 512,
45 .np_tx_fifo_sz = 16,
46 .tx_fifo_sz = 128,
47};
48
49int board_usb_init(int index, enum usb_init_type init)
50{
51 int node;
52 const char *mode;
53 bool matched = false;
54 const void *blob = gd->fdt_blob;
55
56 /* find the usb_otg node */
57 node = fdt_node_offset_by_compatible(blob, -1,
58 "rockchip,rk3288-usb");
59
60 while (node > 0) {
61 mode = fdt_getprop(blob, node, "dr_mode", NULL);
62 if (mode && strcmp(mode, "otg") == 0) {
63 matched = true;
64 break;
65 }
66
67 node = fdt_node_offset_by_compatible(blob, node,
68 "rockchip,rk3288-usb");
69 }
70 if (!matched) {
71 debug("Not found usb_otg device\n");
72 return -ENODEV;
73 }
74 rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
75
76 return dwc2_udc_probe(&rk3036_otg_data);
77}
78
79int board_usb_cleanup(int index, enum usb_init_type init)
80{
81 return 0;
82}
83#endif