blob: cadbb43b9e0d5d93b2ae9596523eb89bcfd50a64 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassecc2ed52014-12-10 08:55:55 -07002/*
3 * Copyright (C) 2013 Google, Inc
4 *
Simon Glassecc2ed52014-12-10 08:55:55 -07005 * Note: Test coverage does not include 10-bit addressing
6 */
7
8#include <common.h>
9#include <dm.h>
10#include <fdtdec.h>
11#include <i2c.h>
Joe Hershbergere721b882015-05-20 14:27:27 -050012#include <asm/state.h>
13#include <asm/test.h>
Simon Glassecc2ed52014-12-10 08:55:55 -070014#include <dm/device-internal.h>
15#include <dm/test.h>
16#include <dm/uclass-internal.h>
Simon Glassecc2ed52014-12-10 08:55:55 -070017#include <dm/util.h>
Robert Beckett22e93512019-10-28 17:44:58 +000018#include <hexdump.h>
Joe Hershbergere721b882015-05-20 14:27:27 -050019#include <test/ut.h>
Simon Glassecc2ed52014-12-10 08:55:55 -070020
21static const int busnum;
22static const int chip = 0x2c;
23
24/* Test that we can find buses and chips */
Joe Hershbergere721b882015-05-20 14:27:27 -050025static int dm_test_i2c_find(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -070026{
27 struct udevice *bus, *dev;
28 const int no_chip = 0x10;
29
30 ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
31 false, &bus));
32
33 /*
Simon Glass91195482016-07-05 17:10:10 -060034 * The post_bind() method will bind devices to chip selects. Check
35 * this then remove the emulation and the slave device.
Simon Glassecc2ed52014-12-10 08:55:55 -070036 */
37 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070038 ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
Simon Glass031a6502018-11-18 08:14:34 -070039 ut_asserteq(-ENOENT, dm_i2c_probe(bus, no_chip, 0, &dev));
Simon Glassecc2ed52014-12-10 08:55:55 -070040 ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
41
42 return 0;
43}
44DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
45
Joe Hershbergere721b882015-05-20 14:27:27 -050046static int dm_test_i2c_read_write(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -070047{
48 struct udevice *bus, *dev;
49 uint8_t buf[5];
50
51 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glass25ab4b02015-01-25 08:26:55 -070052 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070053 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -070054 ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070055 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
56 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -070057 ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
58
59 return 0;
60}
61DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
62
Joe Hershbergere721b882015-05-20 14:27:27 -050063static int dm_test_i2c_speed(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -070064{
65 struct udevice *bus, *dev;
66 uint8_t buf[5];
67
68 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glass182bf922015-04-20 12:37:15 -060069
70 /* Use test mode so we create the required errors for invalid speeds */
71 sandbox_i2c_set_test_mode(bus, true);
Simon Glass25ab4b02015-01-25 08:26:55 -070072 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
Simon Glassca88b9b2015-02-05 21:41:32 -070073 ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070074 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassca88b9b2015-02-05 21:41:32 -070075 ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
76 ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070077 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
78 ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
Simon Glass182bf922015-04-20 12:37:15 -060079 sandbox_i2c_set_test_mode(bus, false);
Simon Glassecc2ed52014-12-10 08:55:55 -070080
81 return 0;
82}
83DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
84
Joe Hershbergere721b882015-05-20 14:27:27 -050085static int dm_test_i2c_offset_len(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -070086{
87 struct udevice *bus, *dev;
88 uint8_t buf[5];
89
90 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glass25ab4b02015-01-25 08:26:55 -070091 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
Simon Glassecc2ed52014-12-10 08:55:55 -070092 ut_assertok(i2c_set_chip_offset_len(dev, 1));
Simon Glassf9a4c2d2015-01-12 18:02:07 -070093 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -070094
95 /* This is not supported by the uclass */
96 ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
97
98 return 0;
99}
100DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
101
Joe Hershbergere721b882015-05-20 14:27:27 -0500102static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -0700103{
104 struct udevice *bus, *dev;
105
106 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glass182bf922015-04-20 12:37:15 -0600107
108 /* Use test mode so that this chip address will always probe */
109 sandbox_i2c_set_test_mode(bus, true);
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700110 ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
Simon Glass182bf922015-04-20 12:37:15 -0600111 sandbox_i2c_set_test_mode(bus, false);
Simon Glassecc2ed52014-12-10 08:55:55 -0700112
113 return 0;
114}
115DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
116
Joe Hershbergere721b882015-05-20 14:27:27 -0500117static int dm_test_i2c_bytewise(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -0700118{
119 struct udevice *bus, *dev;
120 struct udevice *eeprom;
121 uint8_t buf[5];
122
123 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
Simon Glass25ab4b02015-01-25 08:26:55 -0700124 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700125 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700126 ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
127
128 /* Tell the EEPROM to only read/write one register at a time */
129 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
130 ut_assertnonnull(eeprom);
131 sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
132
133 /* Now we only get the first byte - the rest will be 0xff */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700134 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700135 ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
136
137 /* If we do a separate transaction for each byte, it works */
138 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700139 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700140 ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
141
142 /* This will only write A */
143 ut_assertok(i2c_set_chip_flags(dev, 0));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700144 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
145 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700146 ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
147
148 /* Check that the B was ignored */
149 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700150 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700151 ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
152
153 /* Now write it again with the new flags, it should work */
154 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700155 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
156 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700157 ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
158
159 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
160 DM_I2C_CHIP_RD_ADDRESS));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700161 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700162 ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
163
164 /* Restore defaults */
165 sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
166 ut_assertok(i2c_set_chip_flags(dev, 0));
167
168 return 0;
169}
170DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
171
Joe Hershbergere721b882015-05-20 14:27:27 -0500172static int dm_test_i2c_offset(struct unit_test_state *uts)
Simon Glassecc2ed52014-12-10 08:55:55 -0700173{
174 struct udevice *eeprom;
175 struct udevice *dev;
176 uint8_t buf[5];
177
Simon Glass25ab4b02015-01-25 08:26:55 -0700178 ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
Simon Glassecc2ed52014-12-10 08:55:55 -0700179
180 /* Do a transfer so we can find the emulator */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700181 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Simon Glassecc2ed52014-12-10 08:55:55 -0700182 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
183
184 /* Offset length 0 */
185 sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
186 ut_assertok(i2c_set_chip_offset_len(dev, 0));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700187 ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
188 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Robert Beckett22e93512019-10-28 17:44:58 +0000189 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
190 ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassecc2ed52014-12-10 08:55:55 -0700191
192 /* Offset length 1 */
193 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
194 ut_assertok(i2c_set_chip_offset_len(dev, 1));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700195 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
Robert Beckett22e93512019-10-28 17:44:58 +0000196 ut_asserteq(2, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700197 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
Robert Beckett22e93512019-10-28 17:44:58 +0000198 ut_asserteq_mem("ABAB\0", buf, sizeof(buf));
199 ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
200
201 /* Offset length 2 boundary - check model wrapping */
202 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
203 ut_assertok(i2c_set_chip_offset_len(dev, 2));
204 ut_assertok(dm_i2c_write(dev, 0xFF, (uint8_t *)"A", 1));
205 ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
206 ut_assertok(dm_i2c_write(dev, 0x100, (uint8_t *)"B", 1));
207 ut_asserteq(0x100, sanbox_i2c_eeprom_get_prev_offset(eeprom));
208 ut_assertok(dm_i2c_write(dev, 0x101, (uint8_t *)"C", 1));
209 ut_asserteq(0x101, sanbox_i2c_eeprom_get_prev_offset(eeprom));
210 ut_assertok(dm_i2c_read(dev, 0xFF, buf, 5));
211 ut_asserteq_mem("ABCAB", buf, sizeof(buf));
212 ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassecc2ed52014-12-10 08:55:55 -0700213
214 /* Offset length 2 */
215 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
216 ut_assertok(i2c_set_chip_offset_len(dev, 2));
Robert Beckett22e93512019-10-28 17:44:58 +0000217 ut_assertok(dm_i2c_write(dev, 0x2020, (uint8_t *)"AB", 2));
218 ut_assertok(dm_i2c_read(dev, 0x2020, buf, 5));
219 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
220 ut_asserteq(0x2020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassecc2ed52014-12-10 08:55:55 -0700221
222 /* Offset length 3 */
Robert Beckett22e93512019-10-28 17:44:58 +0000223 sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
224 ut_assertok(i2c_set_chip_offset_len(dev, 3));
225 ut_assertok(dm_i2c_write(dev, 0x303030, (uint8_t *)"AB", 2));
226 ut_assertok(dm_i2c_read(dev, 0x303030, buf, 5));
227 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
228 ut_asserteq(0x303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassecc2ed52014-12-10 08:55:55 -0700229
230 /* Offset length 4 */
Robert Beckett22e93512019-10-28 17:44:58 +0000231 sandbox_i2c_eeprom_set_offset_len(eeprom, 4);
232 ut_assertok(i2c_set_chip_offset_len(dev, 4));
233 ut_assertok(dm_i2c_write(dev, 0x40404040, (uint8_t *)"AB", 2));
234 ut_assertok(dm_i2c_read(dev, 0x40404040, buf, 5));
235 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
236 ut_asserteq(0x40404040, sanbox_i2c_eeprom_get_prev_offset(eeprom));
Simon Glassecc2ed52014-12-10 08:55:55 -0700237
238 /* Restore defaults */
239 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
240
241 return 0;
242}
243DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Robert Beckett951674a2019-10-28 17:44:59 +0000244
245static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
246{
247 struct udevice *eeprom;
248 struct udevice *dev;
249 u8 buf[5];
250
251 ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
252
253 /* Do a transfer so we can find the emulator */
254 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
255 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
256
257 /* Offset length 0 */
258 sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
259 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
260 ut_assertok(i2c_set_chip_offset_len(dev, 0));
261 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
262 ut_assertok(dm_i2c_write(dev, 0x3, (uint8_t *)"AB", 2));
263 ut_assertok(dm_i2c_read(dev, 0x3, buf, 5));
264 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
265 ut_asserteq(0x3, sanbox_i2c_eeprom_get_prev_offset(eeprom));
266 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
267
268 /* Offset length 1 */
269 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
270 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
271 ut_assertok(i2c_set_chip_offset_len(dev, 1));
272 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
273 ut_assertok(dm_i2c_write(dev, 0x310, (uint8_t *)"AB", 2));
274 ut_assertok(dm_i2c_read(dev, 0x310, buf, 5));
275 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
276 ut_asserteq(0x310, sanbox_i2c_eeprom_get_prev_offset(eeprom));
277 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
278
279 /* Offset length 2 */
280 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
281 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
282 ut_assertok(i2c_set_chip_offset_len(dev, 2));
283 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
284 ut_assertok(dm_i2c_write(dev, 0x32020, (uint8_t *)"AB", 2));
285 ut_assertok(dm_i2c_read(dev, 0x32020, buf, 5));
286 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
287 ut_asserteq(0x32020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
288 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
289
290 /* Offset length 3 */
291 sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
292 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
293 ut_assertok(i2c_set_chip_offset_len(dev, 3));
294 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
295 ut_assertok(dm_i2c_write(dev, 0x3303030, (uint8_t *)"AB", 2));
296 ut_assertok(dm_i2c_read(dev, 0x3303030, buf, 5));
297 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
298 ut_asserteq(0x3303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
299 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
300
301 /* Restore defaults */
302 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
303 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0);
304
305 return 0;
306}
307
308DM_TEST(dm_test_i2c_addr_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);