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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warren73dd5c42016-08-08 09:41:34 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren73dd5c42016-08-08 09:41:34 -06004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -06008#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -07009#include <malloc.h>
Simon Glass10453152019-11-14 12:57:30 -070010#include <time.h>
Stephen Warren73dd5c42016-08-08 09:41:34 -060011#include <dm/lists.h>
12#include <dm/root.h>
13#include <mailbox.h>
14#include <misc.h>
15#include <asm/arch-tegra/bpmp_abi.h>
16#include <asm/arch-tegra/ivc.h>
Simon Glass61b29b82020-02-03 07:36:15 -070017#include <linux/err.h>
Stephen Warren73dd5c42016-08-08 09:41:34 -060018
19#define BPMP_IVC_FRAME_COUNT 1
20#define BPMP_IVC_FRAME_SIZE 128
21
22#define BPMP_FLAG_DO_ACK BIT(0)
23#define BPMP_FLAG_RING_DOORBELL BIT(1)
24
25DECLARE_GLOBAL_DATA_PTR;
26
27struct tegra186_bpmp {
28 struct mbox_chan mbox;
29 struct tegra_ivc ivc;
30};
31
32static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
33 int tx_size, void *rx_msg, int rx_size)
34{
35 struct tegra186_bpmp *priv = dev_get_priv(dev);
36 int ret, err;
37 void *ivc_frame;
38 struct mrq_request *req;
39 struct mrq_response *resp;
40 ulong start_time;
41
42 debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
43 __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv);
44
45 if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE))
46 return -EINVAL;
47
48 ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
49 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090050 pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -060051 return ret;
52 }
53
54 req = ivc_frame;
55 req->mrq = mrq;
56 req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL;
57 memcpy(req + 1, tx_msg, tx_size);
58
59 ret = tegra_ivc_write_advance(&priv->ivc);
60 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090061 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -060062 return ret;
63 }
64
65 start_time = timer_get_us();
66 for (;;) {
67 ret = tegra_ivc_channel_notified(&priv->ivc);
68 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090069 pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -060070 return ret;
71 }
72
73 ret = tegra_ivc_read_get_next_frame(&priv->ivc, &ivc_frame);
74 if (!ret)
75 break;
76
77 /* Timeout 20ms; roughly 10x current max observed duration */
78 if ((timer_get_us() - start_time) > 20 * 1000) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090079 pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
Stephen Warren73dd5c42016-08-08 09:41:34 -060080 ret);
81 return -ETIMEDOUT;
82 }
83 }
84
85 resp = ivc_frame;
86 err = resp->err;
87 if (!err && rx_msg && rx_size)
88 memcpy(rx_msg, resp + 1, rx_size);
89
90 ret = tegra_ivc_read_advance(&priv->ivc);
91 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090092 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -060093 return ret;
94 }
95
96 if (err) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090097 pr_err("BPMP responded with error %d\n", err);
Stephen Warren73dd5c42016-08-08 09:41:34 -060098 /* err isn't a U-Boot error code, so don't that */
99 return -EIO;
100 }
101
102 return rx_size;
103}
104
105/**
106 * The BPMP exposes multiple different services. We create a sub-device for
107 * each separate type of service, since each device must be of the appropriate
108 * UCLASS.
109 */
110static int tegra186_bpmp_bind(struct udevice *dev)
111{
112 int ret;
113 struct udevice *child;
114
115 debug("%s(dev=%p)\n", __func__, dev);
116
117 ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk",
Simon Glass45a26862017-05-18 20:09:07 -0600118 dev_ofnode(dev), &child);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600119 if (ret)
120 return ret;
121
122 ret = device_bind_driver_to_node(dev, "tegra186_reset",
Simon Glass45a26862017-05-18 20:09:07 -0600123 "tegra186_reset", dev_ofnode(dev),
Stephen Warren73dd5c42016-08-08 09:41:34 -0600124 &child);
125 if (ret)
126 return ret;
127
128 ret = device_bind_driver_to_node(dev, "tegra186_power_domain",
129 "tegra186_power_domain",
Simon Glass45a26862017-05-18 20:09:07 -0600130 dev_ofnode(dev), &child);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600131 if (ret)
132 return ret;
133
134 ret = dm_scan_fdt_dev(dev);
135 if (ret)
136 return ret;
137
138 return 0;
139}
140
141static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
142{
143 int ret;
144 struct fdtdec_phandle_args args;
145 fdt_addr_t reg;
146
Simon Glasse160f7d2017-01-17 16:52:55 -0700147 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
Stephen Warren73dd5c42016-08-08 09:41:34 -0600148 "shmem", NULL, 0, index, &args);
149 if (ret < 0) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900150 pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600151 return ret;
152 }
153
154 reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
155 "reg", 0, NULL, true);
156 if (reg == FDT_ADDR_T_NONE) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900157 pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
Stephen Warren73dd5c42016-08-08 09:41:34 -0600158 return -ENODEV;
159 }
160
161 return reg;
162}
163
164static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
165{
166 struct tegra186_bpmp *priv =
167 container_of(ivc, struct tegra186_bpmp, ivc);
168 int ret;
169
170 ret = mbox_send(&priv->mbox, NULL);
171 if (ret)
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900172 pr_err("mbox_send() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600173}
174
175static int tegra186_bpmp_probe(struct udevice *dev)
176{
177 struct tegra186_bpmp *priv = dev_get_priv(dev);
178 int ret;
179 ulong tx_base, rx_base, start_time;
180
181 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
182
183 ret = mbox_get_by_index(dev, 0, &priv->mbox);
184 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900185 pr_err("mbox_get_by_index() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600186 return ret;
187 }
188
189 tx_base = tegra186_bpmp_get_shmem(dev, 0);
190 if (IS_ERR_VALUE(tx_base)) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900191 pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
Stephen Warren73dd5c42016-08-08 09:41:34 -0600192 return tx_base;
193 }
194 rx_base = tegra186_bpmp_get_shmem(dev, 1);
195 if (IS_ERR_VALUE(rx_base)) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900196 pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
Stephen Warren73dd5c42016-08-08 09:41:34 -0600197 return rx_base;
198 }
199 debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
200
201 ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
202 BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
203 if (ret) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900204 pr_err("tegra_ivc_init() failed: %d\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600205 return ret;
206 }
207
208 tegra_ivc_channel_reset(&priv->ivc);
209 start_time = timer_get_us();
210 for (;;) {
211 ret = tegra_ivc_channel_notified(&priv->ivc);
212 if (!ret)
213 break;
214
215 /* Timeout 100ms */
216 if ((timer_get_us() - start_time) > 100 * 1000) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900217 pr_err("Initial IVC reset timed out (%d)\n", ret);
Stephen Warren73dd5c42016-08-08 09:41:34 -0600218 ret = -ETIMEDOUT;
219 goto err_free_mbox;
220 }
221 }
222
223 return 0;
224
225err_free_mbox:
226 mbox_free(&priv->mbox);
227
228 return ret;
229}
230
231static int tegra186_bpmp_remove(struct udevice *dev)
232{
233 struct tegra186_bpmp *priv = dev_get_priv(dev);
234
235 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
236
237 mbox_free(&priv->mbox);
238
239 return 0;
240}
241
242static struct misc_ops tegra186_bpmp_ops = {
243 .call = tegra186_bpmp_call,
244};
245
246static const struct udevice_id tegra186_bpmp_ids[] = {
247 { .compatible = "nvidia,tegra186-bpmp" },
248 { }
249};
250
251U_BOOT_DRIVER(tegra186_bpmp) = {
252 .name = "tegra186_bpmp",
253 .id = UCLASS_MISC,
254 .of_match = tegra186_bpmp_ids,
255 .bind = tegra186_bpmp_bind,
256 .probe = tegra186_bpmp_probe,
257 .remove = tegra186_bpmp_remove,
258 .ops = &tegra186_bpmp_ops,
259 .priv_auto_alloc_size = sizeof(struct tegra186_bpmp),
260};