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wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
wdenk24ee89b2002-11-03 17:56:27 +000037In case of problems see the CHANGELOG and CREDITS files to find out
Albert ARIBAUD27af9302013-09-11 15:52:51 +020038who contributed the specific port. The boards.cfg file lists board
Wolfgang Denk218ca722008-03-26 10:40:12 +010039maintainers.
wdenkc6097192002-11-03 00:24:07 +000040
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000041Note: There is no CHANGELOG file in the actual U-Boot source tree;
42it can be created dynamically from the Git log using:
43
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
51U-Boot you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
61The U-Boot source code is maintained in the git repository at
62git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020086 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
128 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
135 /arm Files generic to ARM architecture
136 /cpu CPU specific files
137 /arm720t Files specific to ARM 720 CPUs
138 /arm920t Files specific to ARM 920 CPUs
Andreas Bießmann6eb09212011-07-18 09:41:08 +0000139 /at91 Files specific to Atmel AT91RM9200 CPU
Wolfgang Denka9046b92010-06-13 17:48:15 +0200140 /imx Files specific to Freescale MC9328 i.MX CPUs
141 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500142 /arm926ejs Files specific to ARM 926 CPUs
143 /arm1136 Files specific to ARM 1136 CPUs
144 /ixp Files specific to Intel XScale IXP CPUs
145 /pxa Files specific to Intel XScale PXA CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500146 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
147 /lib Architecture specific library files
148 /avr32 Files generic to AVR32 architecture
149 /cpu CPU specific files
150 /lib Architecture specific library files
151 /blackfin Files generic to Analog Devices Blackfin architecture
152 /cpu CPU specific files
153 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500154 /m68k Files generic to m68k architecture
155 /cpu CPU specific files
156 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
157 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
158 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
159 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
160 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
161 /lib Architecture specific library files
162 /microblaze Files generic to microblaze architecture
163 /cpu CPU specific files
164 /lib Architecture specific library files
165 /mips Files generic to MIPS architecture
166 /cpu CPU specific files
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200167 /mips32 Files specific to MIPS32 CPUs
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800168 /xburst Files specific to Ingenic XBurst CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500169 /lib Architecture specific library files
Macpaul Linafc1ce82011-10-19 20:41:11 +0000170 /nds32 Files generic to NDS32 architecture
171 /cpu CPU specific files
172 /n1213 Files specific to Andes Technology N1213 CPUs
173 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500174 /nios2 Files generic to Altera NIOS2 architecture
175 /cpu CPU specific files
176 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400177 /openrisc Files generic to OpenRISC architecture
178 /cpu CPU specific files
179 /lib Architecture specific library files
Stefan Roesea47a12b2010-04-15 16:07:28 +0200180 /powerpc Files generic to PowerPC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500181 /cpu CPU specific files
182 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
183 /mpc5xx Files specific to Freescale MPC5xx CPUs
184 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
185 /mpc8xx Files specific to Freescale MPC8xx CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500186 /mpc824x Files specific to Freescale MPC824x CPUs
187 /mpc8260 Files specific to Freescale MPC8260 CPUs
188 /mpc85xx Files specific to Freescale MPC85xx CPUs
189 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
190 /lib Architecture specific library files
191 /sh Files generic to SH architecture
192 /cpu CPU specific files
193 /sh2 Files specific to sh2 CPUs
194 /sh3 Files specific to sh3 CPUs
195 /sh4 Files specific to sh4 CPUs
196 /lib Architecture specific library files
197 /sparc Files generic to SPARC architecture
198 /cpu CPU specific files
199 /leon2 Files specific to Gaisler LEON2 SPARC CPU
200 /leon3 Files specific to Gaisler LEON3 SPARC CPU
201 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400202 /x86 Files generic to x86 architecture
203 /cpu CPU specific files
204 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500205/api Machine/arch independent API for external apps
206/board Board dependent files
207/common Misc architecture independent functions
208/disk Code for disk drive partition handling
209/doc Documentation (don't expect too much)
210/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400211/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500212/examples Example code for standalone applications, etc.
213/fs Filesystem code (cramfs, ext2, jffs2, etc.)
214/include Header Files
215/lib Files generic to all architectures
216 /libfdt Library files to support flattened device trees
217 /lzma Library files to support LZMA decompression
218 /lzo Library files to support LZO decompression
219/net Networking code
220/post Power On Self Test
Robert P. J. Day33c77312013-09-15 18:34:15 -0400221/spl Secondary Program Loader framework
Peter Tyser8d321b82010-04-12 22:28:21 -0500222/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000223
wdenkc6097192002-11-03 00:24:07 +0000224Software Configuration:
225=======================
226
227Configuration is usually done using C preprocessor defines; the
228rationale behind that is to avoid dead code whenever possible.
229
230There are two classes of configuration variables:
231
232* Configuration _OPTIONS_:
233 These are selectable by the user and have names beginning with
234 "CONFIG_".
235
236* Configuration _SETTINGS_:
237 These depend on the hardware etc. and should not be meddled with if
238 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000240
241Later we will add a configuration tool - probably similar to or even
242identical to what's used for the Linux kernel. Right now, we have to
243do the configuration by hand, which means creating some symbolic
244links and editing some configuration files. We use the TQM8xxL boards
245as an example here.
246
247
248Selection of Processor Architecture and Board Type:
249---------------------------------------------------
250
251For all supported boards there are ready-to-use default
252configurations available; just type "make <board_name>_config".
253
254Example: For a TQM823L module type:
255
256 cd u-boot
257 make TQM823L_config
258
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200259For the Cogent platform, you need to specify the CPU type as well;
wdenkc6097192002-11-03 00:24:07 +0000260e.g. "make cogent_mpc8xx_config". And also configure the cogent
261directory according to the instructions in cogent/README.
262
263
264Configuration Options:
265----------------------
266
267Configuration depends on the combination of board and CPU type; all
268such information is kept in a configuration file
269"include/configs/<board_name>.h".
270
271Example: For a TQM823L module, all configuration settings are in
272"include/configs/TQM823L.h".
273
274
wdenk7f6c2cb2002-11-10 22:06:23 +0000275Many of the options are named exactly as the corresponding Linux
276kernel configuration options. The intention is to make it easier to
277build a config tool - later.
278
279
wdenkc6097192002-11-03 00:24:07 +0000280The following options need to be configured:
281
Kim Phillips26281142007-08-10 13:28:25 -0500282- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000283
Kim Phillips26281142007-08-10 13:28:25 -0500284- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200285
286- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100287 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000288
289- CPU Module Type: (if CONFIG_COGENT is defined)
290 Define exactly one of
291 CONFIG_CMA286_60_OLD
292--- FIXME --- not tested yet:
293 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
294 CONFIG_CMA287_23, CONFIG_CMA287_50
295
296- Motherboard Type: (if CONFIG_COGENT is defined)
297 Define exactly one of
298 CONFIG_CMA101, CONFIG_CMA102
299
300- Motherboard I/O Modules: (if CONFIG_COGENT is defined)
301 Define one or more of
302 CONFIG_CMA302
303
304- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
305 Define one or more of
306 CONFIG_LCD_HEARTBEAT - update a character position on
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200307 the LCD display every second with
wdenkc6097192002-11-03 00:24:07 +0000308 a "rotator" |\-/|\-/
309
wdenk2535d602003-07-17 23:16:40 +0000310- Board flavour: (if CONFIG_MPC8260ADS is defined)
311 CONFIG_ADSTYPE
312 Possible values are:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200313 CONFIG_SYS_8260ADS - original MPC8260ADS
314 CONFIG_SYS_8266ADS - MPC8266ADS
315 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
316 CONFIG_SYS_8272ADS - MPC8272ADS
wdenk2535d602003-07-17 23:16:40 +0000317
Lei Wencf946c62011-02-09 18:06:58 +0530318- Marvell Family Member
319 CONFIG_SYS_MVFS - define it if you want to enable
320 multiple fs option at one time
321 for marvell soc family
322
wdenkc6097192002-11-03 00:24:07 +0000323- MPC824X Family Member (if CONFIG_MPC824X is defined)
wdenk5da627a2003-10-09 20:09:04 +0000324 Define exactly one of
325 CONFIG_MPC8240, CONFIG_MPC8245
wdenkc6097192002-11-03 00:24:07 +0000326
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200327- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000328 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
329 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000330 e.g. if there is no 32KHz
331 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000332 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
333 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000334
wdenk66ca92a2004-09-28 17:59:53 +0000335- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200336 CONFIG_SYS_8xx_CPUCLK_MIN
337 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000338 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000339 See doc/README.MPC866
340
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200341 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000342
wdenkba56f622004-02-06 23:19:44 +0000343 Define this to measure the actual CPU clock instead
344 of relying on the correctness of the configured
345 values. Mostly useful for board bringup to make sure
346 the PLL is locked at the intended frequency. Note
347 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200348 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000349
Heiko Schocher506f3912009-03-12 07:37:15 +0100350 CONFIG_SYS_DELAYED_ICACHE
351
352 Define this option if you want to enable the
353 ICache only when Code runs from RAM.
354
Kumar Gala66412c62011-02-18 05:40:54 -0600355- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000356 CONFIG_SYS_PPC64
357
358 Specifies that the core is a 64-bit PowerPC implementation (implements
359 the "64" category of the Power ISA). This is necessary for ePAPR
360 compliance, among other possible reasons.
361
Kumar Gala66412c62011-02-18 05:40:54 -0600362 CONFIG_SYS_FSL_TBCLK_DIV
363
364 Defines the core time base clock divider ratio compared to the
365 system clock. On most PQ3 devices this is 8, on newer QorIQ
366 devices it can be 16 or 32. The ratio varies from SoC to Soc.
367
Kumar Gala8f290842011-05-20 00:39:21 -0500368 CONFIG_SYS_FSL_PCIE_COMPAT
369
370 Defines the string to utilize when trying to match PCIe device
371 tree nodes for the given platform.
372
Prabhakar Kushwahaafa6b552012-04-29 23:56:13 +0000373 CONFIG_SYS_PPC_E500_DEBUG_TLB
374
375 Enables a temporary TLB entry to be used during boot to work
376 around limitations in e500v1 and e500v2 external debugger
377 support. This reduces the portions of the boot code where
378 breakpoints and single stepping do not work. The value of this
379 symbol should be set to the TLB1 entry to be used for this
380 purpose.
381
Scott Wood33eee332012-08-14 10:14:53 +0000382 CONFIG_SYS_FSL_ERRATUM_A004510
383
384 Enables a workaround for erratum A004510. If set,
385 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
386 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
387
388 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
389 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
390
391 Defines one or two SoC revisions (low 8 bits of SVR)
392 for which the A004510 workaround should be applied.
393
394 The rest of SVR is either not relevant to the decision
395 of whether the erratum is present (e.g. p2040 versus
396 p2041) or is implied by the build target, which controls
397 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
398
399 See Freescale App Note 4493 for more information about
400 this erratum.
401
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530402 CONFIG_A003399_NOR_WORKAROUND
403 Enables a workaround for IFC erratum A003399. It is only
404 requred during NOR boot.
405
Scott Wood33eee332012-08-14 10:14:53 +0000406 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
407
408 This is the value to write into CCSR offset 0x18600
409 according to the A004510 workaround.
410
Priyanka Jain64501c62013-07-02 09:21:04 +0530411 CONFIG_SYS_FSL_DSP_DDR_ADDR
412 This value denotes start offset of DDR memory which is
413 connected exclusively to the DSP cores.
414
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530415 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
416 This value denotes start offset of M2 memory
417 which is directly connected to the DSP core.
418
Priyanka Jain64501c62013-07-02 09:21:04 +0530419 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
420 This value denotes start offset of M3 memory which is directly
421 connected to the DSP core.
422
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530423 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
424 This value denotes start offset of DSP CCSR space.
425
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000426- Generic CPU options:
427 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
428
429 Defines the endianess of the CPU. Implementation of those
430 values is arch specific.
431
York Sun5614e712013-09-30 09:22:09 -0700432 CONFIG_SYS_FSL_DDR
433 Freescale DDR driver in use. This type of DDR controller is
434 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
435 SoCs.
436
437 CONFIG_SYS_FSL_DDR_ADDR
438 Freescale DDR memory-mapped register base.
439
440 CONFIG_SYS_FSL_DDR_EMU
441 Specify emulator support for DDR. Some DDR features such as
442 deskew training are not available.
443
444 CONFIG_SYS_FSL_DDRC_GEN1
445 Freescale DDR1 controller.
446
447 CONFIG_SYS_FSL_DDRC_GEN2
448 Freescale DDR2 controller.
449
450 CONFIG_SYS_FSL_DDRC_GEN3
451 Freescale DDR3 controller.
452
York Sun9ac4ffb2013-09-30 14:20:51 -0700453 CONFIG_SYS_FSL_DDRC_ARM_GEN3
454 Freescale DDR3 controller for ARM-based SoCs.
455
York Sun5614e712013-09-30 09:22:09 -0700456 CONFIG_SYS_FSL_DDR1
457 Board config to use DDR1. It can be enabled for SoCs with
458 Freescale DDR1 or DDR2 controllers, depending on the board
459 implemetation.
460
461 CONFIG_SYS_FSL_DDR2
462 Board config to use DDR2. It can be eanbeld for SoCs with
463 Freescale DDR2 or DDR3 controllers, depending on the board
464 implementation.
465
466 CONFIG_SYS_FSL_DDR3
467 Board config to use DDR3. It can be enabled for SoCs with
468 Freescale DDR3 controllers.
469
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100470- Intel Monahans options:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200471 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100472
473 Defines the Monahans run mode to oscillator
474 ratio. Valid values are 8, 16, 24, 31. The core
475 frequency is this value multiplied by 13 MHz.
476
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200477 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200478
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100479 Defines the Monahans turbo mode to oscillator
480 ratio. Valid values are 1 (default if undefined) and
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200481 2. The core frequency as calculated above is multiplied
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100482 by this value.
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200483
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200484- MIPS CPU options:
485 CONFIG_SYS_INIT_SP_OFFSET
486
487 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
488 pointer. This is needed for the temporary stack before
489 relocation.
490
491 CONFIG_SYS_MIPS_CACHE_MODE
492
493 Cache operation mode for the MIPS CPU.
494 See also arch/mips/include/asm/mipsregs.h.
495 Possible values are:
496 CONF_CM_CACHABLE_NO_WA
497 CONF_CM_CACHABLE_WA
498 CONF_CM_UNCACHED
499 CONF_CM_CACHABLE_NONCOHERENT
500 CONF_CM_CACHABLE_CE
501 CONF_CM_CACHABLE_COW
502 CONF_CM_CACHABLE_CUW
503 CONF_CM_CACHABLE_ACCELERATED
504
505 CONFIG_SYS_XWAY_EBU_BOOTCFG
506
507 Special option for Lantiq XWAY SoCs for booting from NOR flash.
508 See also arch/mips/cpu/mips32/start.S.
509
510 CONFIG_XWAY_SWAP_BYTES
511
512 Enable compilation of tools/xway-swap-bytes needed for Lantiq
513 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
514 be swapped if a flash programmer is used.
515
Christian Rieschb67d8812012-02-02 00:44:39 +0000516- ARM options:
517 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
518
519 Select high exception vectors of the ARM core, e.g., do not
520 clear the V bit of the c1 register of CP15.
521
Aneesh V5356f542012-03-08 07:20:19 +0000522 CONFIG_SYS_THUMB_BUILD
523
524 Use this flag to build U-Boot using the Thumb instruction
525 set for ARM architectures. Thumb instruction set provides
526 better code density. For ARM architectures that support
527 Thumb2 this flag will result in Thumb2 code generated by
528 GCC.
529
Stephen Warrenc5d47522013-03-04 13:29:40 +0000530 CONFIG_ARM_ERRATA_716044
Stephen Warren06785872013-02-26 12:28:27 +0000531 CONFIG_ARM_ERRATA_742230
532 CONFIG_ARM_ERRATA_743622
533 CONFIG_ARM_ERRATA_751472
534
535 If set, the workarounds for these ARM errata are applied early
536 during U-Boot startup. Note that these options force the
537 workarounds to be applied; no CPU-type/version detection
538 exists, unlike the similar options in the Linux kernel. Do not
539 set these options unless they apply!
540
Stephen Warren795659d2013-03-27 17:06:41 +0000541- CPU timer options:
542 CONFIG_SYS_HZ
543
544 The frequency of the timer returned by get_timer().
545 get_timer() must operate in milliseconds and this CONFIG
546 option must be set to 1000.
547
wdenk5da627a2003-10-09 20:09:04 +0000548- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000549 CONFIG_CLOCKS_IN_MHZ
550
551 U-Boot stores all clock information in Hz
552 internally. For binary compatibility with older Linux
553 kernels (which expect the clocks passed in the
554 bd_info data to be in MHz) the environment variable
555 "clocks_in_mhz" can be defined so that U-Boot
556 converts clock data to MHZ before passing it to the
557 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000558 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100559 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000560 default environment.
561
wdenk5da627a2003-10-09 20:09:04 +0000562 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
563
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200564 When transferring memsize parameter to linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000565 expect it to be in bytes, others in MB.
566 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
567
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400568 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200569
570 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400571 passed using flattened device trees (based on open firmware
572 concepts).
573
574 CONFIG_OF_LIBFDT
575 * New libfdt-based support
576 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500577 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400578
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200579 OF_CPU - The proper name of the cpus node (only required for
580 MPC512X and MPC5xxx based boards).
581 OF_SOC - The proper name of the soc node (only required for
582 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200583 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600584 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200585
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200586 boards with QUICC Engines require OF_QE to set UCC MAC
587 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500588
Kumar Gala4e253132006-01-11 13:54:17 -0600589 CONFIG_OF_BOARD_SETUP
590
591 Board code has addition modification that it wants to make
592 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000593
Matthew McClintock02677682006-06-28 10:41:37 -0500594 CONFIG_OF_BOOT_CPU
595
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200596 This define fills in the correct boot CPU in the boot
Matthew McClintock02677682006-06-28 10:41:37 -0500597 param header, the default value is zero if undefined.
598
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200599 CONFIG_OF_IDE_FIXUP
600
601 U-Boot can detect if an IDE device is present or not.
602 If not, and this new config option is activated, U-Boot
603 removes the ATA node from the DTS before booting Linux,
604 so the Linux IDE driver does not probe the device and
605 crash. This is needed for buggy hardware (uc101) where
606 no pull down resistor is connected to the signal IDE5V_DD7.
607
Igor Grinberg7eb29392011-07-14 05:45:07 +0000608 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
609
610 This setting is mandatory for all boards that have only one
611 machine type and must be used to specify the machine type
612 number as it appears in the ARM machine registry
613 (see http://www.arm.linux.org.uk/developer/machines/).
614 Only boards that have multiple machine types supported
615 in a single configuration file and the machine type is
616 runtime discoverable, do not have to use this setting.
617
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100618- vxWorks boot parameters:
619
620 bootvx constructs a valid bootline using the following
621 environments variables: bootfile, ipaddr, serverip, hostname.
622 It loads the vxWorks image pointed bootfile.
623
624 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
625 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
626 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
627 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
628
629 CONFIG_SYS_VXWORKS_ADD_PARAMS
630
631 Add it at the end of the bootline. E.g "u=username pw=secret"
632
633 Note: If a "bootargs" environment is defined, it will overwride
634 the defaults discussed just above.
635
Aneesh V2c451f72011-06-16 23:30:47 +0000636- Cache Configuration:
637 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
638 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
639 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
640
Aneesh V93bc2192011-06-16 23:30:51 +0000641- Cache Configuration for ARM:
642 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
643 controller
644 CONFIG_SYS_PL310_BASE - Physical base address of PL310
645 controller register space
646
wdenk6705d812004-08-02 23:22:59 +0000647- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200648 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000649
650 Define this if you want support for Amba PrimeCell PL010 UARTs.
651
Andreas Engel48d01922008-09-08 14:30:53 +0200652 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000653
654 Define this if you want support for Amba PrimeCell PL011 UARTs.
655
656 CONFIG_PL011_CLOCK
657
658 If you have Amba PrimeCell PL011 UARTs, set this variable to
659 the clock speed of the UARTs.
660
661 CONFIG_PL01x_PORTS
662
663 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
664 define this to a list of base addresses for each (supported)
665 port. See e.g. include/configs/versatile.h
666
John Rigby910f1ae2011-04-19 10:42:39 +0000667 CONFIG_PL011_SERIAL_RLCR
668
669 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
670 have separate receive and transmit line control registers. Set
671 this variable to initialize the extra register.
672
673 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
674
675 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
676 boot loader that has already initialized the UART. Define this
677 variable to flush the UART at init time.
678
wdenk6705d812004-08-02 23:22:59 +0000679
wdenkc6097192002-11-03 00:24:07 +0000680- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000681 Depending on board, define exactly one serial port
682 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
683 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
684 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000685
686 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
687 port routines must be defined elsewhere
688 (i.e. serial_init(), serial_getc(), ...)
689
690 CONFIG_CFB_CONSOLE
691 Enables console device for a color framebuffer. Needs following
Wolfgang Denkc53043b2011-12-07 12:19:20 +0000692 defines (cf. smiLynxEM, i8042)
wdenkc6097192002-11-03 00:24:07 +0000693 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
694 (default big endian)
695 VIDEO_HW_RECTFILL graphic chip supports
696 rectangle fill
697 (cf. smiLynxEM)
698 VIDEO_HW_BITBLT graphic chip supports
699 bit-blit (cf. smiLynxEM)
700 VIDEO_VISIBLE_COLS visible pixel columns
701 (cols=pitch)
wdenkba56f622004-02-06 23:19:44 +0000702 VIDEO_VISIBLE_ROWS visible pixel rows
703 VIDEO_PIXEL_SIZE bytes per pixel
wdenkc6097192002-11-03 00:24:07 +0000704 VIDEO_DATA_FORMAT graphic data format
705 (0-5, cf. cfb_console.c)
wdenkba56f622004-02-06 23:19:44 +0000706 VIDEO_FB_ADRS framebuffer address
wdenkc6097192002-11-03 00:24:07 +0000707 VIDEO_KBD_INIT_FCT keyboard int fct
708 (i.e. i8042_kbd_init())
709 VIDEO_TSTC_FCT test char fct
710 (i.e. i8042_tstc)
711 VIDEO_GETC_FCT get char fct
712 (i.e. i8042_getc)
713 CONFIG_CONSOLE_CURSOR cursor drawing on/off
714 (requires blink timer
715 cf. i8042.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200716 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
wdenkc6097192002-11-03 00:24:07 +0000717 CONFIG_CONSOLE_TIME display time/date info in
718 upper right corner
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500719 (requires CONFIG_CMD_DATE)
wdenkc6097192002-11-03 00:24:07 +0000720 CONFIG_VIDEO_LOGO display Linux logo in
721 upper left corner
wdenka6c7ad22002-12-03 21:28:10 +0000722 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
723 linux_logo.h for logo.
724 Requires CONFIG_VIDEO_LOGO
wdenkc6097192002-11-03 00:24:07 +0000725 CONFIG_CONSOLE_EXTRA_INFO
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200726 additional board info beside
wdenkc6097192002-11-03 00:24:07 +0000727 the logo
728
Pali Rohár33a35bb2012-10-19 13:30:09 +0000729 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
730 a limited number of ANSI escape sequences (cursor control,
731 erase functions and limited graphics rendition control).
732
wdenk43d96162003-03-06 00:02:04 +0000733 When CONFIG_CFB_CONSOLE is defined, video console is
734 default i/o. Serial console can be forced with
735 environment 'console=serial'.
wdenkc6097192002-11-03 00:24:07 +0000736
wdenkd4ca31c2004-01-02 14:00:00 +0000737 When CONFIG_SILENT_CONSOLE is defined, all console
738 messages (by U-Boot and Linux!) can be silenced with
739 the "silent" environment variable. See
740 doc/README.silent for more information.
wdenka3ad8e22003-10-19 23:22:11 +0000741
Heiko Schocher45ae2542013-10-22 11:06:06 +0200742 CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
743 is 0x00.
744 CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
745 is 0xa0.
746
wdenkc6097192002-11-03 00:24:07 +0000747- Console Baudrate:
748 CONFIG_BAUDRATE - in bps
749 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200750 CONFIG_SYS_BAUDRATE_TABLE, see below.
751 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000752
Heiko Schocherc92fac92009-01-30 12:55:38 +0100753- Console Rx buffer length
754 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
755 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100756 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100757 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
758 must be defined, to setup the maximum idle timeout for
759 the SMC.
760
Graeme Russ9558b482011-09-01 00:48:27 +0000761- Pre-Console Buffer:
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200762 Prior to the console being initialised (i.e. serial UART
763 initialised etc) all console output is silently discarded.
764 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
765 buffer any console messages prior to the console being
766 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
767 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
768 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
Wolfgang Denk6feff892011-10-09 21:06:34 +0200769 bytes are output before the console is initialised, the
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200770 earlier bytes are discarded.
Graeme Russ9558b482011-09-01 00:48:27 +0000771
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200772 'Sane' compilers will generate smaller code if
773 CONFIG_PRE_CON_BUF_SZ is a power of 2
Graeme Russ9558b482011-09-01 00:48:27 +0000774
Sonny Rao046a37b2011-11-02 09:52:08 +0000775- Safe printf() functions
776 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
777 the printf() functions. These are defined in
778 include/vsprintf.h and include snprintf(), vsnprintf() and
779 so on. Code size increase is approximately 300-500 bytes.
780 If this option is not given then these functions will
781 silently discard their buffer size argument - this means
782 you are not getting any overflow checking in this case.
783
wdenkc6097192002-11-03 00:24:07 +0000784- Boot Delay: CONFIG_BOOTDELAY - in seconds
785 Delay before automatically booting the default image;
786 set to -1 to disable autoboot.
Joe Hershberger93d72122012-08-17 10:53:12 +0000787 set to -2 to autoboot with no delay and not check for abort
788 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
wdenkc6097192002-11-03 00:24:07 +0000789
790 See doc/README.autoboot for these options that
791 work with CONFIG_BOOTDELAY. None are required.
792 CONFIG_BOOT_RETRY_TIME
793 CONFIG_BOOT_RETRY_MIN
794 CONFIG_AUTOBOOT_KEYED
795 CONFIG_AUTOBOOT_PROMPT
796 CONFIG_AUTOBOOT_DELAY_STR
797 CONFIG_AUTOBOOT_STOP_STR
798 CONFIG_AUTOBOOT_DELAY_STR2
799 CONFIG_AUTOBOOT_STOP_STR2
800 CONFIG_ZERO_BOOTDELAY_CHECK
801 CONFIG_RESET_TO_RETRY
802
803- Autoboot Command:
804 CONFIG_BOOTCOMMAND
805 Only needed when CONFIG_BOOTDELAY is enabled;
806 define a command string that is automatically executed
807 when no character is read on the console interface
808 within "Boot Delay" after reset.
809
810 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000811 This can be used to pass arguments to the bootm
812 command. The value of CONFIG_BOOTARGS goes into the
813 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000814
815 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000816 The value of these goes into the environment as
817 "ramboot" and "nfsboot" respectively, and can be used
818 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200819 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000820
Heiko Schochereda0ba32013-11-04 14:04:59 +0100821- Bootcount:
822 CONFIG_BOOTCOUNT_LIMIT
823 Implements a mechanism for detecting a repeating reboot
824 cycle, see:
825 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
826
827 CONFIG_BOOTCOUNT_ENV
828 If no softreset save registers are found on the hardware
829 "bootcount" is stored in the environment. To prevent a
830 saveenv on all reboots, the environment variable
831 "upgrade_available" is used. If "upgrade_available" is
832 0, "bootcount" is always 0, if "upgrade_available" is
833 1 "bootcount" is incremented in the environment.
834 So the Userspace Applikation must set the "upgrade_available"
835 and "bootcount" variable to 0, if a boot was successfully.
836
wdenkc6097192002-11-03 00:24:07 +0000837- Pre-Boot Commands:
838 CONFIG_PREBOOT
839
840 When this option is #defined, the existence of the
841 environment variable "preboot" will be checked
842 immediately before starting the CONFIG_BOOTDELAY
843 countdown and/or running the auto-boot command resp.
844 entering interactive mode.
845
846 This feature is especially useful when "preboot" is
847 automatically generated or modified. For an example
848 see the LWMON board specific code: here "preboot" is
849 modified when the user holds down a certain
850 combination of keys on the (special) keyboard when
851 booting the systems
852
853- Serial Download Echo Mode:
854 CONFIG_LOADS_ECHO
855 If defined to 1, all characters received during a
856 serial download (using the "loads" command) are
857 echoed back. This might be needed by some terminal
858 emulations (like "cu"), but may as well just take
859 time on others. This setting #define's the initial
860 value of the "loads_echo" environment variable.
861
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500862- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000863 CONFIG_KGDB_BAUDRATE
864 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200865 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000866
867- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500868 Monitor commands can be included or excluded
869 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000870 <config_cmd_all.h> and #undef'ing unwanted
871 commands, or using <config_cmd_default.h>
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500872 and augmenting with additional #define's
873 for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000874
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500875 The default command configuration includes all commands
876 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000877
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500878 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500879 CONFIG_CMD_BDI bdinfo
880 CONFIG_CMD_BEDBUG * Include BedBug Debugger
881 CONFIG_CMD_BMP * BMP support
882 CONFIG_CMD_BSP * Board specific commands
883 CONFIG_CMD_BOOTD bootd
884 CONFIG_CMD_CACHE * icache, dcache
885 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500886 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500887 CONFIG_CMD_DATE * support for RTC, date/time...
888 CONFIG_CMD_DHCP * DHCP support
889 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600890 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
891 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
892 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
893 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500894 CONFIG_CMD_DTT * Digital Therm and Thermostat
895 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500896 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500897 CONFIG_CMD_EEPROM * EEPROM read/write support
898 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600899 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600900 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500901 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500902 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000903 CONFIG_CMD_EXT2 * ext2 command support
904 CONFIG_CMD_EXT4 * ext4 command support
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500905 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500906 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000907 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500908 CONFIG_CMD_FDOS * Dos diskette Support
909 CONFIG_CMD_FLASH flinfo, erase, protect
910 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200911 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000912 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500913 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +0000914 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +0000915 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500916 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
917 CONFIG_CMD_I2C * I2C serial bus support
918 CONFIG_CMD_IDE * IDE harddisk support
919 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +0000920 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200921 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500922 CONFIG_CMD_IMMAP * IMMR dump support
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500923 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +0000924 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500925 CONFIG_CMD_IRQ * irqinfo
926 CONFIG_CMD_ITEST Integer/string test of 2 values
927 CONFIG_CMD_JFFS2 * JFFS2 Support
928 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200929 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +0000930 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
931 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500932 CONFIG_CMD_LOADB loadb
933 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200934 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400935 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +0000936 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500937 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +0000938 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200939 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500940 CONFIG_CMD_MISC Misc functions like sleep etc
941 CONFIG_CMD_MMC * MMC memory mapped support
942 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +0100943 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500944 CONFIG_CMD_NAND * NAND support
945 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200946 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -0600947 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000948 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500949 CONFIG_CMD_PCI * pciinfo
950 CONFIG_CMD_PCMCIA * PCMCIA support
951 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
952 host
953 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +0000954 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500955 CONFIG_CMD_REGINFO * Register dump
956 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +0000957 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500958 CONFIG_CMD_SAVES * save S record dump
959 CONFIG_CMD_SCSI * SCSI Support
960 CONFIG_CMD_SDRAM * print SDRAM configuration information
961 (requires CONFIG_CMD_I2C)
962 CONFIG_CMD_SETGETDCR Support for DCR Register access
963 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -0700964 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200965 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400966 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +0800967 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200968 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500969 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +0000970 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +0000971 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +0000972 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
973 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500974 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500975 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +0000976 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200977 CONFIG_CMD_XIMG Load part of Multi Image
wdenkc6097192002-11-03 00:24:07 +0000978
wdenkc6097192002-11-03 00:24:07 +0000979
980 EXAMPLE: If you want all functions except of network
981 support you can write:
982
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500983 #include "config_cmd_all.h"
984 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +0000985
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400986 Other Commands:
987 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +0000988
989 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500990 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +0000991 what you (and your U-Boot users) are doing. Data
992 cache cannot be enabled on systems like the 8xx or
993 8260 (where accesses to the IMMR region must be
994 uncached), and it cannot be disabled on all other
995 systems where we (mis-) use the data cache to hold an
996 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +0000997
998
999 XXX - this list needs to get updated!
1000
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001001- Regular expression support:
1002 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +02001003 If this variable is defined, U-Boot is linked against
1004 the SLRE (Super Light Regular Expression) library,
1005 which adds regex support to some commands, as for
1006 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001007
Simon Glass45ba8072011-10-15 05:48:20 +00001008- Device tree:
1009 CONFIG_OF_CONTROL
1010 If this variable is defined, U-Boot will use a device tree
1011 to configure its devices, instead of relying on statically
1012 compiled #defines in the board file. This option is
1013 experimental and only available on a few boards. The device
1014 tree is available in the global data as gd->fdt_blob.
1015
Simon Glass2c0f79e2011-10-24 19:15:31 +00001016 U-Boot needs to get its device tree from somewhere. This can
1017 be done using one of the two options below:
Simon Glassbbb0b122011-10-15 05:48:21 +00001018
1019 CONFIG_OF_EMBED
1020 If this variable is defined, U-Boot will embed a device tree
1021 binary in its image. This device tree file should be in the
1022 board directory and called <soc>-<board>.dts. The binary file
1023 is then picked up in board_init_f() and made available through
1024 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +00001025
Simon Glass2c0f79e2011-10-24 19:15:31 +00001026 CONFIG_OF_SEPARATE
1027 If this variable is defined, U-Boot will build a device tree
1028 binary. It will be called u-boot.dtb. Architecture-specific
1029 code will locate it at run-time. Generally this works by:
1030
1031 cat u-boot.bin u-boot.dtb >image.bin
1032
1033 and in fact, U-Boot does this for you, creating a file called
1034 u-boot-dtb.bin which is useful in the common case. You can
1035 still use the individual files if you need something more
1036 exotic.
1037
wdenkc6097192002-11-03 00:24:07 +00001038- Watchdog:
1039 CONFIG_WATCHDOG
1040 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001041 support for the SoC. There must be support in the SoC
1042 specific code for a watchdog. For the 8xx and 8260
1043 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1044 register. When supported for a specific SoC is
1045 available, then no further board specific code should
1046 be needed to use it.
1047
1048 CONFIG_HW_WATCHDOG
1049 When using a watchdog circuitry external to the used
1050 SoC, then define this variable and provide board
1051 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001052
stroesec1551ea2003-04-04 15:53:41 +00001053- U-Boot Version:
1054 CONFIG_VERSION_VARIABLE
1055 If this variable is defined, an environment variable
1056 named "ver" is created by U-Boot showing the U-Boot
1057 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001058 Any change to this variable will be reverted at the
1059 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001060
wdenkc6097192002-11-03 00:24:07 +00001061- Real-Time Clock:
1062
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001063 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001064 has to be selected, too. Define exactly one of the
1065 following options:
1066
1067 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1068 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001069 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001070 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001071 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001072 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001073 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
wdenk3bac3512003-03-12 10:41:04 +00001074 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001075 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001076 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001077 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001078 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1079 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001080
wdenkb37c7e52003-06-30 16:24:52 +00001081 Note that if the RTC uses I2C, then the I2C interface
1082 must also be configured. See I2C Support, below.
1083
Peter Tysere92739d2008-12-17 16:36:21 -06001084- GPIO Support:
1085 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001086
Chris Packham5dec49c2010-12-19 10:12:13 +00001087 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1088 chip-ngpio pairs that tell the PCA953X driver the number of
1089 pins supported by a particular chip.
1090
Peter Tysere92739d2008-12-17 16:36:21 -06001091 Note that if the GPIO device uses I2C, then the I2C interface
1092 must also be configured. See I2C Support, below.
1093
wdenkc6097192002-11-03 00:24:07 +00001094- Timestamp Support:
1095
wdenk43d96162003-03-06 00:02:04 +00001096 When CONFIG_TIMESTAMP is selected, the timestamp
1097 (date and time) of an image is printed by image
1098 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001099 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001100
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001101- Partition Labels (disklabels) Supported:
1102 Zero or more of the following:
1103 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1104 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1105 Intel architecture, USB sticks, etc.
1106 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1107 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1108 bootloader. Note 2TB partition limit; see
1109 disk/part_efi.c
1110 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001111
Wolfgang Denk218ca722008-03-26 10:40:12 +01001112 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1113 CONFIG_CMD_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001114 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001115
1116- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001117 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1118 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001119
wdenk4d13cba2004-03-14 14:09:05 +00001120 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1121 be performed by calling the function
1122 ide_set_reset(int reset)
1123 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001124
1125- ATAPI Support:
1126 CONFIG_ATAPI
1127
1128 Set this to enable ATAPI support.
1129
wdenkc40b2952004-03-13 23:29:43 +00001130- LBA48 Support
1131 CONFIG_LBA48
1132
1133 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001134 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001135 Whithout these , LBA48 support uses 32bit variables and will 'only'
1136 support disks up to 2.1TB.
1137
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001138 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001139 When enabled, makes the IDE subsystem use 64bit sector addresses.
1140 Default is 32bit.
1141
wdenkc6097192002-11-03 00:24:07 +00001142- SCSI Support:
1143 At the moment only there is only support for the
1144 SYM53C8XX SCSI controller; define
1145 CONFIG_SCSI_SYM53C8XX to enable it.
1146
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001147 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1148 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1149 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001150 maximum numbers of LUNs, SCSI ID's and target
1151 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001152 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001153
Wolfgang Denk93e14592013-10-04 17:43:24 +02001154 The environment variable 'scsidevs' is set to the number of
1155 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001156
wdenkc6097192002-11-03 00:24:07 +00001157- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001158 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001159 Support for Intel 8254x/8257x gigabit chips.
1160
1161 CONFIG_E1000_SPI
1162 Utility code for direct access to the SPI bus on Intel 8257x.
1163 This does not do anything useful unless you set at least one
1164 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1165
1166 CONFIG_E1000_SPI_GENERIC
1167 Allow generic access to the SPI bus on the Intel 8257x, for
1168 example with the "sspi" command.
1169
1170 CONFIG_CMD_E1000
1171 Management command for E1000 devices. When used on devices
1172 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001173
Andre Schwarzac3315c2008-03-06 16:45:44 +01001174 CONFIG_E1000_FALLBACK_MAC
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001175 default MAC for empty EEPROM after production.
Andre Schwarzac3315c2008-03-06 16:45:44 +01001176
wdenkc6097192002-11-03 00:24:07 +00001177 CONFIG_EEPRO100
1178 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001179 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001180 write routine for first time initialisation.
1181
1182 CONFIG_TULIP
1183 Support for Digital 2114x chips.
1184 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1185 modem chip initialisation (KS8761/QS6611).
1186
1187 CONFIG_NATSEMI
1188 Support for National dp83815 chips.
1189
1190 CONFIG_NS8382X
1191 Support for National dp8382[01] gigabit chips.
1192
wdenk45219c42003-05-12 21:50:16 +00001193- NETWORK Support (other):
1194
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001195 CONFIG_DRIVER_AT91EMAC
1196 Support for AT91RM9200 EMAC.
1197
1198 CONFIG_RMII
1199 Define this to use reduced MII inteface
1200
1201 CONFIG_DRIVER_AT91EMAC_QUIET
1202 If this defined, the driver is quiet.
1203 The driver doen't show link status messages.
1204
Rob Herringefdd7312011-12-15 11:15:49 +00001205 CONFIG_CALXEDA_XGMAC
1206 Support for the Calxeda XGMAC device
1207
Ashok3bb46d22012-10-15 06:20:47 +00001208 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001209 Support for SMSC's LAN91C96 chips.
1210
1211 CONFIG_LAN91C96_BASE
1212 Define this to hold the physical address
1213 of the LAN91C96's I/O space
1214
1215 CONFIG_LAN91C96_USE_32_BIT
1216 Define this to enable 32 bit addressing
1217
Ashok3bb46d22012-10-15 06:20:47 +00001218 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001219 Support for SMSC's LAN91C111 chip
1220
1221 CONFIG_SMC91111_BASE
1222 Define this to hold the physical address
1223 of the device (I/O space)
1224
1225 CONFIG_SMC_USE_32_BIT
1226 Define this if data bus is 32 bits
1227
1228 CONFIG_SMC_USE_IOFUNCS
1229 Define this to use i/o functions instead of macros
1230 (some hardware wont work with macros)
1231
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001232 CONFIG_DRIVER_TI_EMAC
1233 Support for davinci emac
1234
1235 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1236 Define this if you have more then 3 PHYs.
1237
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001238 CONFIG_FTGMAC100
1239 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1240
1241 CONFIG_FTGMAC100_EGIGA
1242 Define this to use GE link update with gigabit PHY.
1243 Define this if FTGMAC100 is connected to gigabit PHY.
1244 If your system has 10/100 PHY only, it might not occur
1245 wrong behavior. Because PHY usually return timeout or
1246 useless data when polling gigabit status and gigabit
1247 control registers. This behavior won't affect the
1248 correctnessof 10/100 link speed update.
1249
Mike Rapoportc2fff332009-11-11 10:03:03 +02001250 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001251 Support for SMSC's LAN911x and LAN921x chips
1252
Mike Rapoportc2fff332009-11-11 10:03:03 +02001253 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001254 Define this to hold the physical address
1255 of the device (I/O space)
1256
Mike Rapoportc2fff332009-11-11 10:03:03 +02001257 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001258 Define this if data bus is 32 bits
1259
Mike Rapoportc2fff332009-11-11 10:03:03 +02001260 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001261 Define this if data bus is 16 bits. If your processor
1262 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001263 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001264
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001265 CONFIG_SH_ETHER
1266 Support for Renesas on-chip Ethernet controller
1267
1268 CONFIG_SH_ETHER_USE_PORT
1269 Define the number of ports to be used
1270
1271 CONFIG_SH_ETHER_PHY_ADDR
1272 Define the ETH PHY's address
1273
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001274 CONFIG_SH_ETHER_CACHE_WRITEBACK
1275 If this option is set, the driver enables cache flush.
1276
Vadim Bendebury5e124722011-10-17 08:36:14 +00001277- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001278 CONFIG_TPM
1279 Support TPM devices.
1280
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001281 CONFIG_TPM_TIS_I2C
1282 Support for i2c bus TPM devices. Only one device
1283 per system is supported at this time.
1284
1285 CONFIG_TPM_TIS_I2C_BUS_NUMBER
1286 Define the the i2c bus number for the TPM device
1287
1288 CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
1289 Define the TPM's address on the i2c bus
1290
1291 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1292 Define the burst count bytes upper limit
1293
Dirk Eibachc01939c2013-06-26 15:55:15 +02001294 CONFIG_TPM_ATMEL_TWI
1295 Support for Atmel TWI TPM device. Requires I2C support.
1296
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001297 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001298 Support for generic parallel port TPM devices. Only one device
1299 per system is supported at this time.
1300
1301 CONFIG_TPM_TIS_BASE_ADDRESS
1302 Base address where the generic TPM device is mapped
1303 to. Contemporary x86 systems usually map it at
1304 0xfed40000.
1305
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001306 CONFIG_CMD_TPM
1307 Add tpm monitor functions.
1308 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1309 provides monitor access to authorized functions.
1310
1311 CONFIG_TPM
1312 Define this to enable the TPM support library which provides
1313 functional interfaces to some TPM commands.
1314 Requires support for a TPM device.
1315
1316 CONFIG_TPM_AUTH_SESSIONS
1317 Define this to enable authorized functions in the TPM library.
1318 Requires CONFIG_TPM and CONFIG_SHA1.
1319
wdenkc6097192002-11-03 00:24:07 +00001320- USB Support:
1321 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001322 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001323 CONFIG_USB_UHCI to enable it.
1324 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001325 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001326 storage devices.
1327 Note:
1328 Supported are USB Keyboards and USB Floppy drives
1329 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001330 MPC5200 USB requires additional defines:
1331 CONFIG_USB_CLOCK
1332 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001333 CONFIG_PSC3_USB
1334 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001335 CONFIG_USB_CONFIG
1336 for differential drivers: 0x00001000
1337 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001338 for differential drivers on PSC3: 0x00000100
1339 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001340 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001341 May be defined to allow interrupt polling
1342 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001343
Simon Glass9ab4ce22012-02-27 10:52:47 +00001344 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1345 txfilltuning field in the EHCI controller on reset.
1346
Kuo-Jung Suaa155052013-05-15 15:29:22 +08001347 CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum
1348 interval for usb hub power-on delay.(minimum 100msec)
1349
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001350- USB Device:
1351 Define the below if you wish to use the USB console.
1352 Once firmware is rebuilt from a serial console issue the
1353 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001354 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001355 it has found a new device. The environment variable usbtty
1356 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001357 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001358 Common Device Class Abstract Control Model serial device.
1359 If you select usbtty = gserial you should be able to enumerate
1360 a Linux host by
1361 # modprobe usbserial vendor=0xVendorID product=0xProductID
1362 else if using cdc_acm, simply setting the environment
1363 variable usbtty to be cdc_acm should suffice. The following
1364 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001365
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001366 CONFIG_USB_DEVICE
1367 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001368
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001369 CONFIG_USB_TTY
1370 Define this to have a tty type of device available to
1371 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001372
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301373 CONFIG_USBD_HS
1374 Define this to enable the high speed support for usb
1375 device and usbtty. If this feature is enabled, a routine
1376 int is_usbd_high_speed(void)
1377 also needs to be defined by the driver to dynamically poll
1378 whether the enumeration has succeded at high speed or full
1379 speed.
1380
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001381 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001382 Define this if you want stdin, stdout &/or stderr to
1383 be set to usbtty.
1384
1385 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001386 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001387 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001388 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001389
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001390 CONFIG_SYS_USB_BRG_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001391 Derive USB clock from brgclk
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001392 - CONFIG_SYS_USB_BRG_CLK 0x04
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001393
Wolfgang Denk386eda02006-06-14 18:14:56 +02001394 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001395 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001396 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001397 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1398 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1399 should pretend to be a Linux device to it's target host.
1400
1401 CONFIG_USBD_MANUFACTURER
1402 Define this string as the name of your company for
1403 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001404
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001405 CONFIG_USBD_PRODUCT_NAME
1406 Define this string as the name of your product
1407 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1408
1409 CONFIG_USBD_VENDORID
1410 Define this as your assigned Vendor ID from the USB
1411 Implementors Forum. This *must* be a genuine Vendor ID
1412 to avoid polluting the USB namespace.
1413 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001414
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001415 CONFIG_USBD_PRODUCTID
1416 Define this as the unique Product ID
1417 for your device
1418 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001419
Przemyslaw Marczak351e9b22013-10-23 14:30:46 +02001420 Some USB device drivers may need to check USB cable attachment.
1421 In this case you can enable following config in BoardName.h:
1422 CONFIG_USB_CABLE_CHECK
1423 This enables function definition:
1424 - usb_cable_connected() in include/usb.h
1425 Implementation of this function is board-specific.
1426
Igor Grinbergd70a5602011-12-12 12:08:35 +02001427- ULPI Layer Support:
1428 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1429 the generic ULPI layer. The generic layer accesses the ULPI PHY
1430 via the platform viewport, so you need both the genric layer and
1431 the viewport enabled. Currently only Chipidea/ARC based
1432 viewport is supported.
1433 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1434 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001435 If your ULPI phy needs a different reference clock than the
1436 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1437 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001438
1439- MMC Support:
1440 The MMC controller on the Intel PXA is supported. To
1441 enable this define CONFIG_MMC. The MMC can be
1442 accessed from the boot prompt by mapping the device
1443 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001444 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1445 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001446
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001447 CONFIG_SH_MMCIF
1448 Support for Renesas on-chip MMCIF controller
1449
1450 CONFIG_SH_MMCIF_ADDR
1451 Define the base address of MMCIF registers
1452
1453 CONFIG_SH_MMCIF_CLK
1454 Define the clock frequency for MMCIF
1455
Tom Rinib3ba6e92013-03-14 05:32:47 +00001456- USB Device Firmware Update (DFU) class support:
1457 CONFIG_DFU_FUNCTION
1458 This enables the USB portion of the DFU USB class
1459
1460 CONFIG_CMD_DFU
1461 This enables the command "dfu" which is used to have
1462 U-Boot create a DFU class device via USB. This command
1463 requires that the "dfu_alt_info" environment variable be
1464 set and define the alt settings to expose to the host.
1465
1466 CONFIG_DFU_MMC
1467 This enables support for exposing (e)MMC devices via DFU.
1468
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001469 CONFIG_DFU_NAND
1470 This enables support for exposing NAND devices via DFU.
1471
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301472 CONFIG_DFU_RAM
1473 This enables support for exposing RAM via DFU.
1474 Note: DFU spec refer to non-volatile memory usage, but
1475 allow usages beyond the scope of spec - here RAM usage,
1476 one that would help mostly the developer.
1477
Heiko Schochere7e75c72013-06-12 06:05:51 +02001478 CONFIG_SYS_DFU_DATA_BUF_SIZE
1479 Dfu transfer uses a buffer before writing data to the
1480 raw storage device. Make the size (in bytes) of this buffer
1481 configurable. The size of this buffer is also configurable
1482 through the "dfu_bufsiz" environment variable.
1483
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001484 CONFIG_SYS_DFU_MAX_FILE_SIZE
1485 When updating files rather than the raw storage device,
1486 we use a static buffer to copy the file into and then write
1487 the buffer once we've been given the whole file. Define
1488 this to the maximum filesize (in bytes) for the buffer.
1489 Default is 4 MiB if undefined.
1490
wdenk6705d812004-08-02 23:22:59 +00001491- Journaling Flash filesystem support:
1492 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1493 CONFIG_JFFS2_NAND_DEV
1494 Define these for a default partition on a NAND device
1495
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001496 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1497 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001498 Define these for a default partition on a NOR device
1499
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001500 CONFIG_SYS_JFFS_CUSTOM_PART
wdenk6705d812004-08-02 23:22:59 +00001501 Define this to create an own partition. You have to provide a
1502 function struct part_info* jffs2_part_info(int part_num)
1503
1504 If you define only one JFFS2 partition you may also want to
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001505 #define CONFIG_SYS_JFFS_SINGLE_PART 1
wdenk6705d812004-08-02 23:22:59 +00001506 to disable the command chpart. This is the default when you
1507 have not defined a custom partition
1508
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001509- FAT(File Allocation Table) filesystem write function support:
1510 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001511
1512 Define this to enable support for saving memory data as a
1513 file in FAT formatted partition.
1514
1515 This will also enable the command "fatwrite" enabling the
1516 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001517
Gabe Black84cd9322012-10-12 14:26:11 +00001518CBFS (Coreboot Filesystem) support
1519 CONFIG_CMD_CBFS
1520
1521 Define this to enable support for reading from a Coreboot
1522 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1523 and cbfsload.
1524
wdenkc6097192002-11-03 00:24:07 +00001525- Keyboard Support:
1526 CONFIG_ISA_KEYBOARD
1527
1528 Define this to enable standard (PC-Style) keyboard
1529 support
1530
1531 CONFIG_I8042_KBD
1532 Standard PC keyboard driver with US (is default) and
1533 GERMAN key layout (switch via environment 'keymap=de') support.
1534 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1535 for cfb_console. Supports cursor blinking.
1536
Hung-ying Tyan713cb682013-05-15 18:27:32 +08001537 CONFIG_CROS_EC_KEYB
1538 Enables a Chrome OS keyboard using the CROS_EC interface.
1539 This uses CROS_EC to communicate with a second microcontroller
1540 which provides key scans on request.
1541
wdenkc6097192002-11-03 00:24:07 +00001542- Video support:
1543 CONFIG_VIDEO
1544
1545 Define this to enable video support (for output to
1546 video).
1547
1548 CONFIG_VIDEO_CT69000
1549
1550 Enable Chips & Technologies 69000 Video chip
1551
1552 CONFIG_VIDEO_SMI_LYNXEM
wdenkb79a11c2004-03-25 15:14:43 +00001553 Enable Silicon Motion SMI 712/710/810 Video chip. The
wdenkeeb1b772004-03-23 22:53:55 +00001554 video output is selected via environment 'videoout'
1555 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1556 assumed.
wdenkc6097192002-11-03 00:24:07 +00001557
wdenkb79a11c2004-03-25 15:14:43 +00001558 For the CT69000 and SMI_LYNXEM drivers, videomode is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001559 selected via environment 'videomode'. Two different ways
wdenkeeb1b772004-03-23 22:53:55 +00001560 are possible:
1561 - "videomode=num" 'num' is a standard LiLo mode numbers.
wdenk6e592382004-04-18 17:39:38 +00001562 Following standard modes are supported (* is default):
wdenkeeb1b772004-03-23 22:53:55 +00001563
1564 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1565 -------------+---------------------------------------------
1566 8 bits | 0x301* 0x303 0x305 0x161 0x307
1567 15 bits | 0x310 0x313 0x316 0x162 0x319
1568 16 bits | 0x311 0x314 0x317 0x163 0x31A
1569 24 bits | 0x312 0x315 0x318 ? 0x31B
1570 -------------+---------------------------------------------
wdenkc6097192002-11-03 00:24:07 +00001571 (i.e. setenv videomode 317; saveenv; reset;)
1572
wdenkb79a11c2004-03-25 15:14:43 +00001573 - "videomode=bootargs" all the video parameters are parsed
Marcel Ziswiler7817cb22007-12-30 03:30:46 +01001574 from the bootargs. (See drivers/video/videomodes.c)
wdenkeeb1b772004-03-23 22:53:55 +00001575
1576
stroesec1551ea2003-04-04 15:53:41 +00001577 CONFIG_VIDEO_SED13806
wdenk43d96162003-03-06 00:02:04 +00001578 Enable Epson SED13806 driver. This driver supports 8bpp
wdenka6c7ad22002-12-03 21:28:10 +00001579 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1580 or CONFIG_VIDEO_SED13806_16BPP
1581
Timur Tabi7d3053f2011-02-15 17:09:19 -06001582 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001583 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001584 SOCs that have a DIU should define this macro to enable DIU
1585 support, and should also define these other macros:
1586
1587 CONFIG_SYS_DIU_ADDR
1588 CONFIG_VIDEO
1589 CONFIG_CMD_BMP
1590 CONFIG_CFB_CONSOLE
1591 CONFIG_VIDEO_SW_CURSOR
1592 CONFIG_VGA_AS_SINGLE_DEVICE
1593 CONFIG_VIDEO_LOGO
1594 CONFIG_VIDEO_BMP_LOGO
1595
Timur Tabiba8e76b2011-04-11 14:18:22 -05001596 The DIU driver will look for the 'video-mode' environment
1597 variable, and if defined, enable the DIU as a console during
1598 boot. See the documentation file README.video for a
1599 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001600
Simon Glass058d59b2012-12-03 13:59:47 +00001601 CONFIG_VIDEO_VGA
1602
1603 Enable the VGA video / BIOS for x86. The alternative if you
1604 are using coreboot is to use the coreboot frame buffer
1605 driver.
1606
1607
wdenk682011f2003-06-03 23:54:09 +00001608- Keyboard Support:
wdenk8bde7f72003-06-27 21:31:46 +00001609 CONFIG_KEYBOARD
wdenk682011f2003-06-03 23:54:09 +00001610
wdenk8bde7f72003-06-27 21:31:46 +00001611 Define this to enable a custom keyboard support.
1612 This simply calls drv_keyboard_init() which must be
1613 defined in your board-specific files.
1614 The only board using this so far is RBC823.
wdenka6c7ad22002-12-03 21:28:10 +00001615
wdenkc6097192002-11-03 00:24:07 +00001616- LCD Support: CONFIG_LCD
1617
1618 Define this to enable LCD support (for output to LCD
1619 display); also select one of the supported displays
1620 by defining one of these:
1621
Stelian Pop39cf4802008-05-09 21:57:18 +02001622 CONFIG_ATMEL_LCD:
1623
1624 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1625
wdenkfd3103b2003-11-25 16:55:19 +00001626 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001627
wdenkfd3103b2003-11-25 16:55:19 +00001628 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001629
wdenkfd3103b2003-11-25 16:55:19 +00001630 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001631
wdenkfd3103b2003-11-25 16:55:19 +00001632 NEC NL6448BC20-08. 6.5", 640x480.
1633 Active, color, single scan.
1634
1635 CONFIG_NEC_NL6448BC33_54
1636
1637 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001638 Active, color, single scan.
1639
1640 CONFIG_SHARP_16x9
1641
1642 Sharp 320x240. Active, color, single scan.
1643 It isn't 16x9, and I am not sure what it is.
1644
1645 CONFIG_SHARP_LQ64D341
1646
1647 Sharp LQ64D341 display, 640x480.
1648 Active, color, single scan.
1649
1650 CONFIG_HLD1045
1651
1652 HLD1045 display, 640x480.
1653 Active, color, single scan.
1654
1655 CONFIG_OPTREX_BW
1656
1657 Optrex CBL50840-2 NF-FW 99 22 M5
1658 or
1659 Hitachi LMG6912RPFC-00T
1660 or
1661 Hitachi SP14Q002
1662
1663 320x240. Black & white.
1664
1665 Normally display is black on white background; define
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001666 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
wdenkc6097192002-11-03 00:24:07 +00001667
Simon Glass676d3192012-10-17 13:24:54 +00001668 CONFIG_LCD_ALIGNMENT
1669
1670 Normally the LCD is page-aligned (tyically 4KB). If this is
1671 defined then the LCD will be aligned to this value instead.
1672 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1673 here, since it is cheaper to change data cache settings on
1674 a per-section basis.
1675
Simon Glass0d89efe2012-10-17 13:24:59 +00001676 CONFIG_CONSOLE_SCROLL_LINES
1677
1678 When the console need to be scrolled, this is the number of
1679 lines to scroll by. It defaults to 1. Increasing this makes
1680 the console jump but can help speed up operation when scrolling
1681 is slow.
Simon Glass676d3192012-10-17 13:24:54 +00001682
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001683 CONFIG_LCD_BMP_RLE8
1684
1685 Support drawing of RLE8-compressed bitmaps on the LCD.
1686
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001687 CONFIG_I2C_EDID
1688
1689 Enables an 'i2c edid' command which can read EDID
1690 information over I2C from an attached LCD display.
1691
wdenk7152b1d2003-09-05 23:19:14 +00001692- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001693
wdenk8bde7f72003-06-27 21:31:46 +00001694 If this option is set, the environment is checked for
1695 a variable "splashimage". If found, the usual display
1696 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001697 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001698 specified in "splashimage" is loaded instead. The
1699 console is redirected to the "nulldev", too. This
1700 allows for a "silent" boot where a splash screen is
1701 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001702
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001703 CONFIG_SPLASHIMAGE_GUARD
1704
1705 If this option is set, then U-Boot will prevent the environment
1706 variable "splashimage" from being set to a problematic address
1707 (see README.displaying-bmps and README.arm-unaligned-accesses).
1708 This option is useful for targets where, due to alignment
1709 restrictions, an improperly aligned BMP image will cause a data
1710 abort. If you think you will not have problems with unaligned
1711 accesses (for example because your toolchain prevents them)
1712 there is no need to set this option.
1713
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001714 CONFIG_SPLASH_SCREEN_ALIGN
1715
1716 If this option is set the splash image can be freely positioned
1717 on the screen. Environment variable "splashpos" specifies the
1718 position as "x,y". If a positive number is given it is used as
1719 number of pixel from left/top. If a negative number is given it
1720 is used as number of pixel from right/bottom. You can also
1721 specify 'm' for centering the image.
1722
1723 Example:
1724 setenv splashpos m,m
1725 => image at center of screen
1726
1727 setenv splashpos 30,20
1728 => image at x = 30 and y = 20
1729
1730 setenv splashpos -10,m
1731 => vertically centered image
1732 at x = dspWidth - bmpWidth - 9
1733
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001734- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1735
1736 If this option is set, additionally to standard BMP
1737 images, gzipped BMP images can be displayed via the
1738 splashscreen support or the bmp command.
1739
Anatolij Gustschind5011762010-03-15 14:50:25 +01001740- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1741
1742 If this option is set, 8-bit RLE compressed BMP images
1743 can be displayed via the splashscreen support or the
1744 bmp command.
1745
Lei Wenf2b96df2012-09-28 04:26:47 +00001746- Do compresssing for memory range:
1747 CONFIG_CMD_ZIP
1748
1749 If this option is set, it would use zlib deflate method
1750 to compress the specified memory at its best effort.
1751
wdenkc29fdfc2003-08-29 20:57:53 +00001752- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001753 CONFIG_GZIP
1754
1755 Enabled by default to support gzip compressed images.
1756
wdenkc29fdfc2003-08-29 20:57:53 +00001757 CONFIG_BZIP2
1758
1759 If this option is set, support for bzip2 compressed
1760 images is included. If not, only uncompressed and gzip
1761 compressed images are supported.
1762
wdenk42d1f032003-10-15 23:53:47 +00001763 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001764 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001765 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001766
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001767 CONFIG_LZMA
1768
1769 If this option is set, support for lzma compressed
1770 images is included.
1771
1772 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1773 requires an amount of dynamic memory that is given by the
1774 formula:
1775
1776 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1777
1778 Where lc and lp stand for, respectively, Literal context bits
1779 and Literal pos bits.
1780
1781 This value is upper-bounded by 14MB in the worst case. Anyway,
1782 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1783 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1784 a very small buffer.
1785
1786 Use the lzmainfo tool to determinate the lc and lp values and
1787 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001788 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001789
Kees Cook8ef70472013-08-16 07:59:12 -07001790 CONFIG_LZO
1791
1792 If this option is set, support for LZO compressed images
1793 is included.
1794
wdenk17ea1172004-06-06 21:51:03 +00001795- MII/PHY support:
1796 CONFIG_PHY_ADDR
1797
1798 The address of PHY on MII bus.
1799
1800 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1801
1802 The clock frequency of the MII bus
1803
1804 CONFIG_PHY_GIGE
1805
1806 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001807 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001808
1809 CONFIG_PHY_RESET_DELAY
1810
1811 Some PHY like Intel LXT971A need extra delay after
1812 reset before any MII register access is possible.
1813 For such PHY, set this option to the usec delay
1814 required. (minimum 300usec for LXT971A)
1815
1816 CONFIG_PHY_CMD_DELAY (ppc4xx)
1817
1818 Some PHY like Intel LXT971A need extra delay after
1819 command issued before MII status register can be read
1820
wdenkc6097192002-11-03 00:24:07 +00001821- Ethernet address:
1822 CONFIG_ETHADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001823 CONFIG_ETH1ADDR
wdenkc6097192002-11-03 00:24:07 +00001824 CONFIG_ETH2ADDR
1825 CONFIG_ETH3ADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001826 CONFIG_ETH4ADDR
1827 CONFIG_ETH5ADDR
wdenkc6097192002-11-03 00:24:07 +00001828
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001829 Define a default value for Ethernet address to use
1830 for the respective Ethernet interface, in case this
wdenkc6097192002-11-03 00:24:07 +00001831 is not determined automatically.
1832
1833- IP address:
1834 CONFIG_IPADDR
1835
1836 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001837 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001838 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001839 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001840
1841- Server IP address:
1842 CONFIG_SERVERIP
1843
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001844 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001845 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001846 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001847
Robin Getz97cfe862009-07-21 12:15:28 -04001848 CONFIG_KEEP_SERVERADDR
1849
1850 Keeps the server's MAC address, in the env 'serveraddr'
1851 for passing to bootargs (like Linux's netconsole option)
1852
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001853- Gateway IP address:
1854 CONFIG_GATEWAYIP
1855
1856 Defines a default value for the IP address of the
1857 default router where packets to other networks are
1858 sent to.
1859 (Environment variable "gatewayip")
1860
1861- Subnet mask:
1862 CONFIG_NETMASK
1863
1864 Defines a default value for the subnet mask (or
1865 routing prefix) which is used to determine if an IP
1866 address belongs to the local subnet or needs to be
1867 forwarded through a router.
1868 (Environment variable "netmask")
1869
David Updegraff53a5c422007-06-11 10:41:07 -05001870- Multicast TFTP Mode:
1871 CONFIG_MCAST_TFTP
1872
1873 Defines whether you want to support multicast TFTP as per
1874 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001875 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001876 driver in use must provide a function: mcast() to join/leave a
1877 multicast group.
1878
wdenkc6097192002-11-03 00:24:07 +00001879- BOOTP Recovery Mode:
1880 CONFIG_BOOTP_RANDOM_DELAY
1881
1882 If you have many targets in a network that try to
1883 boot using BOOTP, you may want to avoid that all
1884 systems send out BOOTP requests at precisely the same
1885 moment (which would happen for instance at recovery
1886 from a power failure, when all systems will try to
1887 boot, thus flooding the BOOTP server. Defining
1888 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1889 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001890 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001891
1892 1st BOOTP request: delay 0 ... 1 sec
1893 2nd BOOTP request: delay 0 ... 2 sec
1894 3rd BOOTP request: delay 0 ... 4 sec
1895 4th and following
1896 BOOTP requests: delay 0 ... 8 sec
1897
stroesefe389a82003-08-28 14:17:32 +00001898- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001899 You can fine tune the DHCP functionality by defining
1900 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001901
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001902 CONFIG_BOOTP_SUBNETMASK
1903 CONFIG_BOOTP_GATEWAY
1904 CONFIG_BOOTP_HOSTNAME
1905 CONFIG_BOOTP_NISDOMAIN
1906 CONFIG_BOOTP_BOOTPATH
1907 CONFIG_BOOTP_BOOTFILESIZE
1908 CONFIG_BOOTP_DNS
1909 CONFIG_BOOTP_DNS2
1910 CONFIG_BOOTP_SEND_HOSTNAME
1911 CONFIG_BOOTP_NTPSERVER
1912 CONFIG_BOOTP_TIMEOFFSET
1913 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001914 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001915
Wilson Callan5d110f02007-07-28 10:56:13 -04001916 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1917 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001918
Joe Hershberger2c00e092012-05-23 07:59:19 +00001919 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1920 after the configured retry count, the call will fail
1921 instead of starting over. This can be used to fail over
1922 to Link-local IP address configuration if the DHCP server
1923 is not available.
1924
stroesefe389a82003-08-28 14:17:32 +00001925 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1926 serverip from a DHCP server, it is possible that more
1927 than one DNS serverip is offered to the client.
1928 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1929 serverip will be stored in the additional environment
1930 variable "dnsip2". The first DNS serverip is always
1931 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001932 is defined.
stroesefe389a82003-08-28 14:17:32 +00001933
1934 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1935 to do a dynamic update of a DNS server. To do this, they
1936 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001937 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001938 of the "hostname" environment variable is passed as
1939 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001940
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001941 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1942
1943 A 32bit value in microseconds for a delay between
1944 receiving a "DHCP Offer" and sending the "DHCP Request".
1945 This fixes a problem with certain DHCP servers that don't
1946 respond 100% of the time to a "DHCP request". E.g. On an
1947 AT91RM9200 processor running at 180MHz, this delay needed
1948 to be *at least* 15,000 usec before a Windows Server 2003
1949 DHCP server would reply 100% of the time. I recommend at
1950 least 50,000 usec to be safe. The alternative is to hope
1951 that one of the retries will be successful but note that
1952 the DHCP timeout and retry process takes a longer than
1953 this delay.
1954
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001955 - Link-local IP address negotiation:
1956 Negotiate with other link-local clients on the local network
1957 for an address that doesn't require explicit configuration.
1958 This is especially useful if a DHCP server cannot be guaranteed
1959 to exist in all environments that the device must operate.
1960
1961 See doc/README.link-local for more information.
1962
wdenka3d991b2004-04-15 21:48:45 +00001963 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001964 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001965
1966 The device id used in CDP trigger frames.
1967
1968 CONFIG_CDP_DEVICE_ID_PREFIX
1969
1970 A two character string which is prefixed to the MAC address
1971 of the device.
1972
1973 CONFIG_CDP_PORT_ID
1974
1975 A printf format string which contains the ascii name of
1976 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001977 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00001978
1979 CONFIG_CDP_CAPABILITIES
1980
1981 A 32bit integer which indicates the device capabilities;
1982 0x00000010 for a normal host which does not forwards.
1983
1984 CONFIG_CDP_VERSION
1985
1986 An ascii string containing the version of the software.
1987
1988 CONFIG_CDP_PLATFORM
1989
1990 An ascii string containing the name of the platform.
1991
1992 CONFIG_CDP_TRIGGER
1993
1994 A 32bit integer sent on the trigger.
1995
1996 CONFIG_CDP_POWER_CONSUMPTION
1997
1998 A 16bit integer containing the power consumption of the
1999 device in .1 of milliwatts.
2000
2001 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2002
2003 A byte containing the id of the VLAN.
2004
wdenkc6097192002-11-03 00:24:07 +00002005- Status LED: CONFIG_STATUS_LED
2006
2007 Several configurations allow to display the current
2008 status using a LED. For instance, the LED will blink
2009 fast while running U-Boot code, stop blinking as
2010 soon as a reply to a BOOTP request was received, and
2011 start blinking slow once the Linux kernel is running
2012 (supported by a status LED driver in the Linux
2013 kernel). Defining CONFIG_STATUS_LED enables this
2014 feature in U-Boot.
2015
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002016 Additional options:
2017
2018 CONFIG_GPIO_LED
2019 The status LED can be connected to a GPIO pin.
2020 In such cases, the gpio_led driver can be used as a
2021 status LED backend implementation. Define CONFIG_GPIO_LED
2022 to include the gpio_led driver in the U-Boot binary.
2023
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002024 CONFIG_GPIO_LED_INVERTED_TABLE
2025 Some GPIO connected LEDs may have inverted polarity in which
2026 case the GPIO high value corresponds to LED off state and
2027 GPIO low value corresponds to LED on state.
2028 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2029 with a list of GPIO LEDs that have inverted polarity.
2030
wdenkc6097192002-11-03 00:24:07 +00002031- CAN Support: CONFIG_CAN_DRIVER
2032
2033 Defining CONFIG_CAN_DRIVER enables CAN driver support
2034 on those systems that support this (optional)
2035 feature, like the TQM8xxL modules.
2036
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002037- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002038
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002039 This enable the NEW i2c subsystem, and will allow you to use
2040 i2c commands at the u-boot command line (as long as you set
2041 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2042 based realtime clock chips or other i2c devices. See
2043 common/cmd_i2c.c for a description of the command line
2044 interface.
2045
2046 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002047 - drivers/i2c/soft_i2c.c:
2048 - activate first bus with CONFIG_SYS_I2C_SOFT define
2049 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2050 for defining speed and slave address
2051 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2052 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2053 for defining speed and slave address
2054 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2055 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2056 for defining speed and slave address
2057 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2058 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2059 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002060
Heiko Schocher00f792e2012-10-24 13:48:22 +02002061 - drivers/i2c/fsl_i2c.c:
2062 - activate i2c driver with CONFIG_SYS_I2C_FSL
2063 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2064 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2065 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2066 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002067 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002068 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2069 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2070 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2071 second bus.
2072
Simon Glass1f2ba722012-10-30 07:28:53 +00002073 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002074 - activate this driver with CONFIG_SYS_I2C_TEGRA
2075 - This driver adds 4 i2c buses with a fix speed from
2076 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002077
Dirk Eibach880540d2013-04-25 02:40:01 +00002078 - drivers/i2c/ppc4xx_i2c.c
2079 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2080 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2081 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2082
tremfac96402013-09-21 18:13:35 +02002083 - drivers/i2c/i2c_mxc.c
2084 - activate this driver with CONFIG_SYS_I2C_MXC
2085 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2086 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2087 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2088 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2089 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2090 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
2091 If thoses defines are not set, default value is 100000
2092 for speed, and 0 for slave.
2093
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002094 - drivers/i2c/rcar_i2c.c:
2095 - activate this driver with CONFIG_SYS_I2C_RCAR
2096 - This driver adds 4 i2c buses
2097
2098 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2099 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2100 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2101 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2102 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2103 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2104 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2105 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2106 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2107
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002108 - drivers/i2c/sh_i2c.c:
2109 - activate this driver with CONFIG_SYS_I2C_SH
2110 - This driver adds from 2 to 5 i2c buses
2111
2112 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2113 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2114 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2115 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2116 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2117 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2118 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2119 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2120 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2121 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
2122 - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
2123 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2124 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2125
Heiko Schocher6789e842013-10-22 11:03:18 +02002126 - drivers/i2c/omap24xx_i2c.c
2127 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2128 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2129 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2130 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2131 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2132 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2133 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2134 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2135 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2136 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2137 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2138
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002139 - drivers/i2c/zynq_i2c.c
2140 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2141 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2142 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2143
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302144 - drivers/i2c/s3c24x0_i2c.c:
2145 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2146 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2147 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2148 with a fix speed from 100000 and the slave addr 0!
2149
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002150 additional defines:
2151
2152 CONFIG_SYS_NUM_I2C_BUSES
2153 Hold the number of i2c busses you want to use. If you
2154 don't use/have i2c muxes on your i2c bus, this
2155 is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
2156 omit this define.
2157
2158 CONFIG_SYS_I2C_DIRECT_BUS
2159 define this, if you don't use i2c muxes on your hardware.
2160 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2161 omit this define.
2162
2163 CONFIG_SYS_I2C_MAX_HOPS
2164 define how many muxes are maximal consecutively connected
2165 on one i2c bus. If you not use i2c muxes, omit this
2166 define.
2167
2168 CONFIG_SYS_I2C_BUSES
2169 hold a list of busses you want to use, only used if
2170 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2171 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2172 CONFIG_SYS_NUM_I2C_BUSES = 9:
2173
2174 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2175 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2176 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2177 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2178 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2179 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2180 {1, {I2C_NULL_HOP}}, \
2181 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2182 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2183 }
2184
2185 which defines
2186 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002187 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2188 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2189 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2190 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2191 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002192 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002193 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2194 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002195
2196 If you do not have i2c muxes on your board, omit this define.
2197
Heiko Schocherea818db2013-01-29 08:53:15 +01002198- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002199
2200 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2201 provides the following compelling advantages:
2202
2203 - more than one i2c adapter is usable
2204 - approved multibus support
2205 - better i2c mux support
2206
2207 ** Please consider updating your I2C driver now. **
2208
Heiko Schocherea818db2013-01-29 08:53:15 +01002209 These enable legacy I2C serial bus commands. Defining
2210 CONFIG_HARD_I2C will include the appropriate I2C driver
2211 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002212
wdenk945af8d2003-07-16 21:53:01 +00002213 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002214 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002215 CONFIG_COMMANDS) and communicate with i2c based realtime
2216 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002217 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002218
Ben Warrenbb99ad62006-09-07 16:50:54 -04002219 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002220
wdenk945af8d2003-07-16 21:53:01 +00002221 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002222 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002223
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002224 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002225 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002226 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002227 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002228
Peter Tyser8d321b82010-04-12 22:28:21 -05002229 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002230 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002231 and so its address should therefore be cleared to 0 (See,
2232 eg, MPC823e User's Manual p.16-473). So, set
2233 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002234
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002235 CONFIG_SYS_I2C_INIT_MPC5XXX
2236
2237 When a board is reset during an i2c bus transfer
2238 chips might think that the current transfer is still
2239 in progress. Reset the slave devices by sending start
2240 commands until the slave device responds.
2241
wdenk945af8d2003-07-16 21:53:01 +00002242 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002243
Heiko Schocherea818db2013-01-29 08:53:15 +01002244 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002245 then the following macros need to be defined (examples are
2246 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002247
2248 I2C_INIT
2249
wdenkb37c7e52003-06-30 16:24:52 +00002250 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002251 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002252
wdenkba56f622004-02-06 23:19:44 +00002253 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002254
wdenkc6097192002-11-03 00:24:07 +00002255 I2C_PORT
2256
wdenk43d96162003-03-06 00:02:04 +00002257 (Only for MPC8260 CPU). The I/O port to use (the code
2258 assumes both bits are on the same port). Valid values
2259 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002260
2261 I2C_ACTIVE
2262
2263 The code necessary to make the I2C data line active
2264 (driven). If the data line is open collector, this
2265 define can be null.
2266
wdenkb37c7e52003-06-30 16:24:52 +00002267 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2268
wdenkc6097192002-11-03 00:24:07 +00002269 I2C_TRISTATE
2270
2271 The code necessary to make the I2C data line tri-stated
2272 (inactive). If the data line is open collector, this
2273 define can be null.
2274
wdenkb37c7e52003-06-30 16:24:52 +00002275 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2276
wdenkc6097192002-11-03 00:24:07 +00002277 I2C_READ
2278
York Sun472d5462013-04-01 11:29:11 -07002279 Code that returns true if the I2C data line is high,
2280 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002281
wdenkb37c7e52003-06-30 16:24:52 +00002282 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2283
wdenkc6097192002-11-03 00:24:07 +00002284 I2C_SDA(bit)
2285
York Sun472d5462013-04-01 11:29:11 -07002286 If <bit> is true, sets the I2C data line high. If it
2287 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002288
wdenkb37c7e52003-06-30 16:24:52 +00002289 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002290 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002291 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002292
wdenkc6097192002-11-03 00:24:07 +00002293 I2C_SCL(bit)
2294
York Sun472d5462013-04-01 11:29:11 -07002295 If <bit> is true, sets the I2C clock line high. If it
2296 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002297
wdenkb37c7e52003-06-30 16:24:52 +00002298 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002299 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002300 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002301
wdenkc6097192002-11-03 00:24:07 +00002302 I2C_DELAY
2303
2304 This delay is invoked four times per clock cycle so this
2305 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002306 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002307 like:
2308
wdenkb37c7e52003-06-30 16:24:52 +00002309 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00002310
Mike Frysinger793b5722010-07-21 13:38:02 -04002311 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2312
2313 If your arch supports the generic GPIO framework (asm/gpio.h),
2314 then you may alternatively define the two GPIOs that are to be
2315 used as SCL / SDA. Any of the previous I2C_xxx macros will
2316 have GPIO-based defaults assigned to them as appropriate.
2317
2318 You should define these to the GPIO value as given directly to
2319 the generic GPIO functions.
2320
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002321 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00002322
wdenk8bde7f72003-06-27 21:31:46 +00002323 When a board is reset during an i2c bus transfer
2324 chips might think that the current transfer is still
2325 in progress. On some boards it is possible to access
2326 the i2c SCLK line directly, either by using the
2327 processor pin as a GPIO or by having a second pin
2328 connected to the bus. If this option is defined a
2329 custom i2c_init_board() routine in boards/xxx/board.c
2330 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00002331
Richard Retanubun26a33502010-04-12 15:08:17 -04002332 CONFIG_SYS_I2C_BOARD_LATE_INIT
2333
2334 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2335 defined a custom i2c_board_late_init() routine in
2336 boards/xxx/board.c is run AFTER the operations in i2c_init()
2337 is completed. This callpoint can be used to unreset i2c bus
2338 using CPU i2c controller register accesses for CPUs whose i2c
2339 controller provide such a method. It is called at the end of
2340 i2c_init() to allow i2c_init operations to setup the i2c bus
2341 controller on the CPU (e.g. setting bus speed & slave address).
2342
wdenk17ea1172004-06-06 21:51:03 +00002343 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2344
2345 This option enables configuration of bi_iic_fast[] flags
2346 in u-boot bd_info structure based on u-boot environment
2347 variable "i2cfast". (see also i2cfast)
2348
Ben Warrenbb99ad62006-09-07 16:50:54 -04002349 CONFIG_I2C_MULTI_BUS
2350
2351 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002352 must have a controller. At any point in time, only one bus is
2353 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04002354 Note that bus numbering is zero-based.
2355
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002356 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04002357
2358 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002359 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05002360 is set, specify a list of bus-device pairs. Otherwise, specify
2361 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04002362
2363 e.g.
2364 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002365 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002366
2367 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2368
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002369 #define CONFIG_I2C_MULTI_BUS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002370 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002371
2372 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2373
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002374 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06002375
2376 If defined, then this indicates the I2C bus number for DDR SPD.
2377 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2378
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002379 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002380
2381 If defined, then this indicates the I2C bus number for the RTC.
2382 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2383
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002384 CONFIG_SYS_DTT_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002385
2386 If defined, then this indicates the I2C bus number for the DTT.
2387 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2388
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002389 CONFIG_SYS_I2C_DTT_ADDR:
Victor Gallardo9ebbb542008-09-09 15:13:29 -07002390
2391 If defined, specifies the I2C address of the DTT device.
2392 If not defined, then U-Boot uses predefined value for
2393 specified DTT device.
2394
Andrew Dyer2ac69852008-12-29 17:36:01 -06002395 CONFIG_SOFT_I2C_READ_REPEATED_START
2396
2397 defining this will force the i2c_read() function in
2398 the soft_i2c driver to perform an I2C repeated start
2399 between writing the address pointer and reading the
2400 data. If this define is omitted the default behaviour
2401 of doing a stop-start sequence will be used. Most I2C
2402 devices can use either method, but some require one or
2403 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06002404
wdenkc6097192002-11-03 00:24:07 +00002405- SPI Support: CONFIG_SPI
2406
2407 Enables SPI driver (so far only tested with
2408 SPI EEPROM, also an instance works with Crystal A/D and
2409 D/As on the SACSng board)
2410
Yoshihiro Shimoda66395622011-01-31 16:50:43 +09002411 CONFIG_SH_SPI
2412
2413 Enables the driver for SPI controller on SuperH. Currently
2414 only SH7757 is supported.
2415
wdenkc6097192002-11-03 00:24:07 +00002416 CONFIG_SPI_X
2417
2418 Enables extended (16-bit) SPI EEPROM addressing.
2419 (symmetrical to CONFIG_I2C_X)
2420
2421 CONFIG_SOFT_SPI
2422
wdenk43d96162003-03-06 00:02:04 +00002423 Enables a software (bit-bang) SPI driver rather than
2424 using hardware support. This is a general purpose
2425 driver that only requires three general I/O port pins
2426 (two outputs, one input) to function. If this is
2427 defined, the board configuration must define several
2428 SPI configuration items (port pins to use, etc). For
2429 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00002430
Ben Warren04a9e112008-01-16 22:37:35 -05002431 CONFIG_HARD_SPI
2432
2433 Enables a hardware SPI driver for general-purpose reads
2434 and writes. As with CONFIG_SOFT_SPI, the board configuration
2435 must define a list of chip-select function pointers.
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002436 Currently supported on some MPC8xxx processors. For an
Ben Warren04a9e112008-01-16 22:37:35 -05002437 example, see include/configs/mpc8349emds.h.
2438
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002439 CONFIG_MXC_SPI
2440
2441 Enables the driver for the SPI controllers on i.MX and MXC
Fabio Estevam2e3cd1c2011-10-28 08:57:46 +00002442 SoCs. Currently i.MX31/35/51 are supported.
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002443
Matthias Fuchs01335022007-12-27 17:12:34 +01002444- FPGA Support: CONFIG_FPGA
2445
2446 Enables FPGA subsystem.
2447
2448 CONFIG_FPGA_<vendor>
2449
2450 Enables support for specific chip vendors.
2451 (ALTERA, XILINX)
2452
2453 CONFIG_FPGA_<family>
2454
2455 Enables support for FPGA family.
2456 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2457
2458 CONFIG_FPGA_COUNT
wdenkc6097192002-11-03 00:24:07 +00002459
wdenk43d96162003-03-06 00:02:04 +00002460 Specify the number of FPGA devices to support.
wdenkc6097192002-11-03 00:24:07 +00002461
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002462 CONFIG_SYS_FPGA_PROG_FEEDBACK
wdenkc6097192002-11-03 00:24:07 +00002463
wdenk8bde7f72003-06-27 21:31:46 +00002464 Enable printing of hash marks during FPGA configuration.
wdenkc6097192002-11-03 00:24:07 +00002465
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002466 CONFIG_SYS_FPGA_CHECK_BUSY
wdenkc6097192002-11-03 00:24:07 +00002467
wdenk43d96162003-03-06 00:02:04 +00002468 Enable checks on FPGA configuration interface busy
2469 status by the configuration function. This option
2470 will require a board or device specific function to
2471 be written.
wdenkc6097192002-11-03 00:24:07 +00002472
2473 CONFIG_FPGA_DELAY
2474
2475 If defined, a function that provides delays in the FPGA
2476 configuration driver.
2477
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002478 CONFIG_SYS_FPGA_CHECK_CTRLC
wdenkc6097192002-11-03 00:24:07 +00002479 Allow Control-C to interrupt FPGA configuration
2480
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002481 CONFIG_SYS_FPGA_CHECK_ERROR
wdenkc6097192002-11-03 00:24:07 +00002482
wdenk43d96162003-03-06 00:02:04 +00002483 Check for configuration errors during FPGA bitfile
2484 loading. For example, abort during Virtex II
2485 configuration if the INIT_B line goes low (which
2486 indicated a CRC error).
wdenkc6097192