blob: a19d4d9e1736b147627d9a8ac653ceb1161c9cd7 [file] [log] [blame]
Wu, Josh9e336902013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh9e336902013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh9e336902013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
30#define CONFIG_BOARD_EARLY_INIT_F
31#define CONFIG_DISPLAY_CPUINFO
32
33#define CONFIG_OF_LIBFDT
Wu, Josh09e03e02014-09-02 18:13:23 +080034#define CONFIG_SYS_GENERIC_BOARD
Wu, Josh9e336902013-04-16 23:42:44 +000035
36/* general purpose I/O */
37#define CONFIG_AT91_GPIO
38
39/* serial console */
40#define CONFIG_ATMEL_USART
41#define CONFIG_USART_BASE ATMEL_BASE_DBGU
42#define CONFIG_USART_ID ATMEL_ID_SYS
43#define CONFIG_BAUDRATE 115200
44
45/* LCD */
46#define CONFIG_LCD
47#define LCD_BPP LCD_COLOR16
48#define LCD_OUTPUT_BPP 24
49#define CONFIG_LCD_LOGO
50#define CONFIG_LCD_INFO
51#define CONFIG_LCD_INFO_BELOW_LOGO
52#define CONFIG_SYS_WHITE_ON_BLACK
53#define CONFIG_ATMEL_HLCD
54#define CONFIG_ATMEL_LCD_RGB565
55#define CONFIG_SYS_CONSOLE_IS_IN_ENV
56
57#define CONFIG_BOOTDELAY 3
58
59/*
60 * BOOTP options
61 */
62#define CONFIG_BOOTP_BOOTFILESIZE
63#define CONFIG_BOOTP_BOOTPATH
64#define CONFIG_BOOTP_GATEWAY
65#define CONFIG_BOOTP_HOSTNAME
66
67/* NOR flash - no real flash on this board */
68#define CONFIG_SYS_NO_FLASH
69
70/*
71 * Command line configuration.
72 */
Wu, Josh9e336902013-04-16 23:42:44 +000073#define CONFIG_CMD_BOOTZ
74#define CONFIG_CMD_PING
75#define CONFIG_CMD_DHCP
76#define CONFIG_CMD_NAND
77#define CONFIG_CMD_SF
78#define CONFIG_CMD_MMC
79#define CONFIG_CMD_FAT
Bo Shend9bef0a2013-10-21 16:13:59 +080080#define CONFIG_CMD_USB
Wu, Josh9e336902013-04-16 23:42:44 +000081
82#define CONFIG_NR_DRAM_BANKS 1
83#define CONFIG_SYS_SDRAM_BASE 0x20000000
84#define CONFIG_SYS_SDRAM_SIZE 0x08000000
85
86/*
87 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
88 * leaving the correct space for initial global data structure above
89 * that address while providing maximum stack area below.
90 */
91# define CONFIG_SYS_INIT_SP_ADDR \
92 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
93
94/* DataFlash */
95#ifdef CONFIG_CMD_SF
96#define CONFIG_ATMEL_SPI
Wu, Josh9e336902013-04-16 23:42:44 +000097#define CONFIG_SPI_FLASH_ATMEL
98#define CONFIG_SF_DEFAULT_SPEED 30000000
99#define CONFIG_ENV_SPI_MODE SPI_MODE_3
100#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
101#endif
102
103/* NAND flash */
104#ifdef CONFIG_CMD_NAND
105#define CONFIG_NAND_ATMEL
106#define CONFIG_SYS_MAX_NAND_DEVICE 1
107#define CONFIG_SYS_NAND_BASE 0x40000000
108#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
109#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +0100110#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
111#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh9e336902013-04-16 23:42:44 +0000112
113/* PMECC & PMERRLOC */
114#define CONFIG_ATMEL_NAND_HWECC
115#define CONFIG_ATMEL_NAND_HW_PMECC
116#define CONFIG_PMECC_CAP 2
117#define CONFIG_PMECC_SECTOR_SIZE 512
118#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shence76f0a2013-06-26 10:48:53 +0800119
120#define CONFIG_CMD_NAND_TRIMFFS
121
Wu, Josh9e336902013-04-16 23:42:44 +0000122#endif
123
124#define CONFIG_MTD_PARTITIONS
125#define CONFIG_MTD_DEVICE
126#define CONFIG_CMD_MTDPARTS
127#define MTDIDS_DEFAULT "nand0=atmel_nand"
128#define MTDPARTS_DEFAULT \
129 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
130 "256k(env),256k(env_redundant),256k(spare)," \
131 "512k(dtb),6M(kernel)ro,-(rootfs)"
132
133#define CONFIG_EXTRA_ENV_SETTINGS \
134 "console=console=ttyS0,115200\0" \
135 "mtdparts="MTDPARTS_DEFAULT"\0" \
136 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
137 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
138
139/* MMC */
140#ifdef CONFIG_CMD_MMC
141#define CONFIG_MMC
142#define CONFIG_GENERIC_MMC
143#define CONFIG_GENERIC_ATMEL_MCI
144#endif
145
146/* FAT */
147#ifdef CONFIG_CMD_FAT
148#define CONFIG_DOS_PARTITION
149#endif
150
Bo Shen16276222013-04-24 10:46:18 +0800151/* Ethernet */
152#define CONFIG_KS8851_MLL
153#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
154
Wu, Josh9e336902013-04-16 23:42:44 +0000155#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
156
157#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
158#define CONFIG_SYS_MEMTEST_END 0x26e00000
159
Bo Shend9bef0a2013-10-21 16:13:59 +0800160/* USB host */
161#ifdef CONFIG_CMD_USB
162#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800163#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +0800164#define CONFIG_USB_OHCI_NEW
165#define CONFIG_SYS_USB_OHCI_CPU_INIT
166#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
167#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
168#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
169#define CONFIG_USB_STORAGE
170#endif
171
Wu, Josh9e336902013-04-16 23:42:44 +0000172#ifdef CONFIG_SYS_USE_SPIFLASH
173
174/* bootstrap + u-boot + env + linux in dataflash on CS0 */
175#define CONFIG_ENV_IS_IN_SPI_FLASH
176#define CONFIG_ENV_OFFSET 0x5000
177#define CONFIG_ENV_SIZE 0x3000
178#define CONFIG_ENV_SECT_SIZE 0x1000
179#define CONFIG_BOOTCOMMAND \
180 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
181 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
182 "bootm 0x22000000"
183
184#elif defined(CONFIG_SYS_USE_NANDFLASH)
185
186/* bootstrap + u-boot + env + linux in nandflash */
187#define CONFIG_ENV_IS_IN_NAND
188#define CONFIG_ENV_OFFSET 0xc0000
189#define CONFIG_ENV_OFFSET_REDUND 0x100000
190#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
191#define CONFIG_BOOTCOMMAND \
192 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
193 "nand read 0x21000000 0x180000 0x080000;" \
194 "nand read 0x22000000 0x200000 0x400000;" \
195 "bootm 0x22000000 - 0x21000000"
196
197#else /* CONFIG_SYS_USE_MMC */
198
199/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800200
201#ifdef CONFIG_ENV_IS_IN_MMC
202/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000203#define CONFIG_ENV_OFFSET 0x2000
204#define CONFIG_ENV_SIZE 0x1000
205#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800206#else
207/* Use file in FAT file to save environment */
208#define CONFIG_ENV_IS_IN_FAT
209#define CONFIG_FAT_WRITE
210#define FAT_ENV_INTERFACE "mmc"
211#define FAT_ENV_FILE "uboot.env"
212#define FAT_ENV_DEVICE_AND_PART "0"
213#define CONFIG_ENV_SIZE 0x4000
214#endif
215
Wu, Josh9e336902013-04-16 23:42:44 +0000216#define CONFIG_BOOTCOMMAND \
217 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
218 "fatload mmc 0:1 0x21000000 dtb;" \
219 "fatload mmc 0:1 0x22000000 uImage;" \
220 "bootm 0x22000000 - 0x21000000"
221
222#endif
223
224#define CONFIG_SYS_PROMPT "U-Boot> "
225#define CONFIG_SYS_CBSIZE 256
226#define CONFIG_SYS_MAXARGS 16
227#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
228 + 16)
229#define CONFIG_SYS_LONGHELP
230#define CONFIG_CMDLINE_EDITING
231#define CONFIG_AUTO_COMPLETE
232#define CONFIG_SYS_HUSH_PARSER
233
234/*
235 * Size of malloc() pool
236 */
237#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800238
239/* SPL */
240#define CONFIG_SPL_FRAMEWORK
241#define CONFIG_SPL_TEXT_BASE 0x300000
242#define CONFIG_SPL_MAX_SIZE 0x6000
243#define CONFIG_SPL_STACK 0x308000
244
245#define CONFIG_SPL_BSS_START_ADDR 0x20000000
246#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
247#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
248#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
249
250#define CONFIG_SPL_LIBCOMMON_SUPPORT
251#define CONFIG_SPL_LIBGENERIC_SUPPORT
252#define CONFIG_SPL_GPIO_SUPPORT
253#define CONFIG_SPL_SERIAL_SUPPORT
254
255#define CONFIG_SPL_BOARD_INIT
256#define CONFIG_SYS_MONITOR_LEN (512 << 10)
257
258#define CONFIG_SYS_MASTER_CLOCK 132096000
259#define CONFIG_SYS_AT91_PLLA 0x20953f03
260#define CONFIG_SYS_MCKR 0x1301
261#define CONFIG_SYS_MCKR_CSS 0x1302
262
263#define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC
264
265#ifdef CONFIG_SYS_USE_MMC
266#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
267#define CONFIG_SPL_MMC_SUPPORT
268#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
269#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
270#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
271#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
272#define CONFIG_SPL_FAT_SUPPORT
273#define CONFIG_SPL_LIBDISK_SUPPORT
274
275#elif CONFIG_SYS_USE_NANDFLASH
276#define CONFIG_SPL_NAND_SUPPORT
277#define CONFIG_SPL_NAND_DRIVERS
278#define CONFIG_SPL_NAND_BASE
279#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
280#define CONFIG_SYS_NAND_5_ADDR_CYCLE
281#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
282#define CONFIG_SYS_NAND_PAGE_COUNT 64
283#define CONFIG_SYS_NAND_OOBSIZE 64
284#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
285#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
286#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
287
288#elif CONFIG_SYS_USE_SPIFLASH
289#define CONFIG_SPL_SPI_SUPPORT
290#define CONFIG_SPL_SPI_FLASH_SUPPORT
291#define CONFIG_SPL_SPI_LOAD
292#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
293
294#endif
Wu, Josh9e336902013-04-16 23:42:44 +0000295
296#endif