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Eric Benard3cbeb0f2014-04-04 19:05:55 +02001/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
Eric Benard3cbeb0f2014-04-04 19:05:55 +020016#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -060017#define CONSOLE_DEV "ttymxc1"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020018#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
Adrian Alonso1368f992015-09-02 13:54:13 -050022#define CONFIG_IMX_THERMAL
Eric Benard3cbeb0f2014-04-04 19:05:55 +020023
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
Eric Benard3cbeb0f2014-04-04 19:05:55 +020027#define CONFIG_MXC_UART
28
Eric Benard3cbeb0f2014-04-04 19:05:55 +020029/* I2C Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020030#define CONFIG_SYS_I2C
31#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020032#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
33#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070034#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020035#define CONFIG_SYS_I2C_SPEED 100000
36
37/* USB Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020038#define CONFIG_USB_HOST_ETHER
39#define CONFIG_USB_ETHER_ASIX
40#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
41#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
42#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
43#define CONFIG_MXC_USB_FLAGS 0
44
45/* MMC Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020046#define CONFIG_SYS_FSL_ESDHC_ADDR 0
47
Eric Benard3cbeb0f2014-04-04 19:05:55 +020048#define CONFIG_FEC_MXC
49#define CONFIG_MII
50#define IMX_FEC_BASE ENET_BASE_ADDR
51#define CONFIG_FEC_XCV_TYPE RGMII
52#define CONFIG_ETHPRIME "FEC"
53#define CONFIG_FEC_MXC_PHYADDR 4
54
55#define CONFIG_PHYLIB
56#define CONFIG_PHY_ATHEROS
57
Eric Benard3cbeb0f2014-04-04 19:05:55 +020058#ifdef CONFIG_CMD_SF
Eric Benard3cbeb0f2014-04-04 19:05:55 +020059#define CONFIG_MXC_SPI
60#define CONFIG_SF_DEFAULT_BUS 0
Nikita Kiryanov155fa9a2014-08-20 15:08:50 +030061#define CONFIG_SF_DEFAULT_CS 0
Eric Benard3cbeb0f2014-04-04 19:05:55 +020062#define CONFIG_SF_DEFAULT_SPEED 20000000
63#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
64#endif
65
Eric Benard3cbeb0f2014-04-04 19:05:55 +020066#define CONFIG_ARP_TIMEOUT 200UL
67
Eric Benard3cbeb0f2014-04-04 19:05:55 +020068/* Print Buffer Size */
69#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Eric Benard3cbeb0f2014-04-04 19:05:55 +020070
71#define CONFIG_SYS_MEMTEST_START 0x10000000
72#define CONFIG_SYS_MEMTEST_END 0x10010000
73#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
74
Eric Benard3cbeb0f2014-04-04 19:05:55 +020075/* Physical Memory Map */
76#define CONFIG_NR_DRAM_BANKS 1
77#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
78
79#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
80#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
81#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
82
83#define CONFIG_SYS_INIT_SP_OFFSET \
84 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
85#define CONFIG_SYS_INIT_SP_ADDR \
86 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
87
Peter Robinson056845c2015-05-22 17:30:45 +010088/* Environment organization */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020089#define CONFIG_ENV_SIZE (8 * 1024)
90
91#if defined(CONFIG_ENV_IS_IN_MMC)
92/* RiOTboard */
Iain Patonc86efd82014-12-14 14:51:46 +000093#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020094#define CONFIG_SYS_FSL_USDHC_NUM 3
95#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
96#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
97#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
98#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
99/* MarSBoard */
Iain Patonc86efd82014-12-14 14:51:46 +0000100#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200101#define CONFIG_SYS_FSL_USDHC_NUM 2
102#define CONFIG_ENV_OFFSET (768 * 1024)
103#define CONFIG_ENV_SECT_SIZE (8 * 1024)
104#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
105#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
106#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
107#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
108#endif
109
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200110/* Framebuffer */
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200111#define CONFIG_VIDEO_IPUV3
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200112#define CONFIG_VIDEO_BMP_RLE8
113#define CONFIG_SPLASH_SCREEN
114#define CONFIG_SPLASH_SCREEN_ALIGN
115#define CONFIG_BMP_16BPP
116#define CONFIG_VIDEO_LOGO
117#define CONFIG_VIDEO_BMP_LOGO
118#define CONFIG_IPUV3_CLK 260000000
119#define CONFIG_IMX_HDMI
120#define CONFIG_IMX_VIDEO_SKIP
121
Iain Paton729d2a32014-12-14 14:51:32 +0000122#include <config_distro_defaults.h>
Peter Robinsone51c1e82015-05-22 17:30:52 +0100123#include "mx6_common.h"
Iain Paton729d2a32014-12-14 14:51:32 +0000124
Iain Patonc86efd82014-12-14 14:51:46 +0000125/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
126 * 1M script, 1M pxe and the ramdisk at the end */
127#define MEM_LAYOUT_ENV_SETTINGS \
128 "bootm_size=0x10000000\0" \
129 "kernel_addr_r=0x12000000\0" \
130 "fdt_addr_r=0x13000000\0" \
131 "scriptaddr=0x13100000\0" \
132 "pxefile_addr_r=0x13200000\0" \
133 "ramdisk_addr_r=0x13300000\0"
134
135#define BOOT_TARGET_DEVICES(func) \
136 func(MMC, mmc, 0) \
137 func(MMC, mmc, 1) \
138 func(MMC, mmc, 2) \
139 func(USB, usb, 0) \
140 func(PXE, pxe, na) \
141 func(DHCP, dhcp, na)
142
143#include <config_distro_bootcmd.h>
144
145#define CONSOLE_STDIN_SETTINGS \
146 "stdin=serial\0"
147
148#define CONSOLE_STDOUT_SETTINGS \
149 "stdout=serial\0" \
150 "stderr=serial\0"
151
152#define CONSOLE_ENV_SETTINGS \
153 CONSOLE_STDIN_SETTINGS \
154 CONSOLE_STDOUT_SETTINGS
155
156#define CONFIG_EXTRA_ENV_SETTINGS \
157 CONSOLE_ENV_SETTINGS \
158 MEM_LAYOUT_ENV_SETTINGS \
159 "fdtfile=" CONFIG_FDTFILE "\0" \
160 BOOTENV
161
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200162#endif /* __RIOTBOARD_CONFIG_H */