Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 Rockchip Electronics Co., Ltd |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | db41d65 | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 7 | #include <hang.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
Simon Glass | 401d1c4 | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 9 | #include <asm/global_data.h> |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 10 | #include <asm/io.h> |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 11 | #include <linux/bitops.h> |
Simon Glass | c05ed00 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 12 | #include <linux/delay.h> |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 13 | |
| 14 | #include "../gadget/dwc2_udc_otg_priv.h" |
| 15 | |
| 16 | DECLARE_GLOBAL_DATA_PTR; |
| 17 | |
| 18 | #define BIT_WRITEABLE_SHIFT 16 |
| 19 | |
| 20 | struct usb2phy_reg { |
| 21 | unsigned int offset; |
| 22 | unsigned int bitend; |
| 23 | unsigned int bitstart; |
| 24 | unsigned int disable; |
| 25 | unsigned int enable; |
| 26 | }; |
| 27 | |
| 28 | /** |
| 29 | * struct rockchip_usb2_phy_cfg: usb-phy port configuration |
| 30 | * @port_reset: usb otg per-port reset register |
| 31 | * @soft_con: software control usb otg register |
| 32 | * @suspend: phy suspend register |
| 33 | */ |
| 34 | struct rockchip_usb2_phy_cfg { |
| 35 | struct usb2phy_reg port_reset; |
| 36 | struct usb2phy_reg soft_con; |
| 37 | struct usb2phy_reg suspend; |
| 38 | }; |
| 39 | |
| 40 | struct rockchip_usb2_phy_dt_id { |
| 41 | char compatible[128]; |
| 42 | const void *data; |
| 43 | }; |
| 44 | |
Johan Jonker | 42a2f7a | 2022-04-29 23:40:06 +0200 | [diff] [blame] | 45 | static const struct rockchip_usb2_phy_cfg rk3066a_pdata = { |
| 46 | .port_reset = {0x00, 12, 12, 0, 1}, |
| 47 | .soft_con = {0x08, 2, 2, 0, 1}, |
| 48 | .suspend = {0x08, 8, 3, (0x01 << 3), (0x2A << 3)}, |
| 49 | }; |
| 50 | |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 51 | static const struct rockchip_usb2_phy_cfg rk3288_pdata = { |
| 52 | .port_reset = {0x00, 12, 12, 0, 1}, |
| 53 | .soft_con = {0x08, 2, 2, 0, 1}, |
| 54 | .suspend = {0x0c, 5, 0, 0x01, 0x2A}, |
| 55 | }; |
| 56 | |
| 57 | static struct rockchip_usb2_phy_dt_id rockchip_usb2_phy_dt_ids[] = { |
Johan Jonker | 42a2f7a | 2022-04-29 23:40:06 +0200 | [diff] [blame] | 58 | { .compatible = "rockchip,rk3066a-usb-phy", .data = &rk3066a_pdata }, |
| 59 | { .compatible = "rockchip,rk3188-usb-phy", .data = &rk3288_pdata }, |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 60 | { .compatible = "rockchip,rk3288-usb-phy", .data = &rk3288_pdata }, |
| 61 | {} |
| 62 | }; |
| 63 | |
| 64 | static void property_enable(struct dwc2_plat_otg_data *pdata, |
| 65 | const struct usb2phy_reg *reg, bool en) |
| 66 | { |
| 67 | unsigned int val, mask, tmp; |
| 68 | |
| 69 | tmp = en ? reg->enable : reg->disable; |
| 70 | mask = GENMASK(reg->bitend, reg->bitstart); |
| 71 | val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); |
| 72 | |
| 73 | writel(val, pdata->regs_phy + reg->offset); |
| 74 | } |
| 75 | |
| 76 | |
| 77 | void otg_phy_init(struct dwc2_udc *dev) |
| 78 | { |
| 79 | struct dwc2_plat_otg_data *pdata = dev->pdata; |
| 80 | struct rockchip_usb2_phy_cfg *phy_cfg = NULL; |
| 81 | struct rockchip_usb2_phy_dt_id *of_id; |
| 82 | int i; |
| 83 | |
| 84 | for (i = 0; i < ARRAY_SIZE(rockchip_usb2_phy_dt_ids); i++) { |
| 85 | of_id = &rockchip_usb2_phy_dt_ids[i]; |
Kever Yang | e76943c | 2019-10-16 17:13:31 +0800 | [diff] [blame] | 86 | if (ofnode_device_is_compatible(pdata->phy_of_node, |
| 87 | of_id->compatible)){ |
Xu Ziyuan | fab3357 | 2016-07-14 14:52:32 +0800 | [diff] [blame] | 88 | phy_cfg = (struct rockchip_usb2_phy_cfg *)of_id->data; |
| 89 | break; |
| 90 | } |
| 91 | } |
| 92 | if (!phy_cfg) { |
| 93 | debug("Can't find device platform data\n"); |
| 94 | |
| 95 | hang(); |
| 96 | return; |
| 97 | } |
| 98 | pdata->priv = phy_cfg; |
| 99 | /* disable software control */ |
| 100 | property_enable(pdata, &phy_cfg->soft_con, false); |
| 101 | |
| 102 | /* reset otg port */ |
| 103 | property_enable(pdata, &phy_cfg->port_reset, true); |
| 104 | mdelay(1); |
| 105 | property_enable(pdata, &phy_cfg->port_reset, false); |
| 106 | udelay(1); |
| 107 | } |
| 108 | |
| 109 | void otg_phy_off(struct dwc2_udc *dev) |
| 110 | { |
| 111 | struct dwc2_plat_otg_data *pdata = dev->pdata; |
| 112 | struct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv; |
| 113 | |
| 114 | /* enable software control */ |
| 115 | property_enable(pdata, &phy_cfg->soft_con, true); |
| 116 | /* enter suspend */ |
| 117 | property_enable(pdata, &phy_cfg->suspend, true); |
| 118 | } |