Revert "hikey960: Remove hifi dsp support."

This reverts commit 1d7e5889cd761a9eaecb130c52582d2b0707a08d.

Reason for revert: previous commit broke build_test target, b/219798815

Change-Id: If678459053b79b81de27a1b7d514cc0c6101d97d
diff --git a/hifi/xaf/hifi-dpf/build_hikey/Makefile b/hifi/xaf/hifi-dpf/build_hikey/Makefile
new file mode 100644
index 0000000..e1980a0
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/Makefile
@@ -0,0 +1,135 @@
+#
+# Copyright (C) 2018 Cadence Design Systems, Inc.
+# 
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to use this Software with Cadence processor cores only and 
+# not with any other processors and platforms, subject to
+# the following conditions:
+# 
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+# 
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+
+
+.PHONY: all install clean HIKEY960
+
+NOSTRIP = 1
+XF_TRACE = 1
+
+ROOTDIR = ..
+CODEC_NAME = hikey
+
+PLUGINO2OBJS =
+PLUGINLIBS =
+PLUGININCLUDES =
+
+XA_MP3_DECODER ?= 0
+XA_VORBIS_DECODER ?= 1
+XA_MIXER 	   ?= 1
+XA_PCM 	   ?= 1
+
+
+vpath %.c $(ROOTDIR)/ipc/xt-shmem/hikey
+vpath %.c $(ROOTDIR)/ipc/xt-shmem
+vpath %.c $(ROOTDIR)/core/util
+vpath %.c $(ROOTDIR)/core/util/gdbstub
+vpath %.c $(ROOTDIR)/core
+vpath %.c $(ROOTDIR)/app
+vpath %.c $(ROOTDIR)/audio
+
+vpath %.S $(ROOTDIR)/ipc/xt-shmem/hikey
+vpath %.S $(ROOTDIR)/core/util/gdbstub
+
+vpath %.c $(ROOTDIR)/plugins/cadence/mixer
+
+LIBXAFASMOBJS = \
+			reset.o \
+			int_vector.o \
+			arch_hifi330.o \
+			gdbstub-entry.o
+
+LIBXAFO2OBJS = \
+            cpu_c.o \
+			dsp_debug.o \
+			dsp_comm.o \
+			mutex.o \
+			rbtree.o \
+			xf-core.o \
+			xf-io.o \
+			xf-mem.o \
+			xf-msg.o \
+			xf-sched.o \
+			xa-factory.o \
+			xf-shmem.o \
+			tinyvprintf.o \
+			xf-isr.o \
+			gdbstub.o \
+			xa-class-base.o \
+			xa-class-audio-codec.o \
+			xa-class-mixer.o \
+			xf-main.o 
+
+ifeq ($(XF_TRACE),1)
+  CFLAGS         += -DXF_TRACE=1
+  CFLAGS         += -DXAF_PROFILE_DSP=1
+endif
+
+ifeq ($(XA_MP3_DECODER),1)
+  vpath %.c $(ROOTDIR)/plugins/cadence/mp3_dec
+  CFLAGS         += -DXA_MP3_DECODER=1
+  PLUGINO2OBJS   += xa-mp3-decoder.o
+  PLUGINLIBS     += $(ROOTDIR)/plugins/cadence/mp3_dec/lib/hifi2/xa_mp3_dec.a 
+  PLUGININCLUDES += -I$(ROOTDIR)/plugins/cadence/mp3_dec
+endif
+
+ifeq ($(XA_PCM),1)
+  vpath %.c $(ROOTDIR)/plugins/cadence/pcm_proc
+  CFLAGS         += -DXA_PCM=1
+  PLUGINO2OBJS   += xa-pcm.o
+  PLUGINLIBS     += 
+  PLUGININCLUDES += -I$(ROOTDIR)/plugins/cadence/pcm_proc
+endif  
+
+ifeq ($(XA_VORBIS_DECODER),1)
+  vpath %.c $(ROOTDIR)/plugins/cadence/vorbis_dec
+  CFLAGS         += -DXA_VORBIS_DECODER=1
+  PLUGINO2OBJS   += xa-vorbis-decoder.o
+  PLUGINLIBS     += $(ROOTDIR)/plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a
+  PLUGININCLUDES += -I$(ROOTDIR)/plugins/cadence/vorbis_dec
+endif
+
+ifeq ($(XA_MIXER),1)
+  vpath %.c $(ROOTDIR)/plugins/cadence/mixer
+  CFLAGS         += -DXA_MIXER=1
+  PLUGINO2OBJS   += xa-mixer.o
+  PLUGINLIBS     += 
+  PLUGININCLUDES += -I$(ROOTDIR)/plugins/cadence/mixer
+endif
+
+LIBO2OBJS = $(LIBXAFO2OBJS) $(LIBMP3DECO2OBJS) $(LIBMIXERO2OBJS) $(PLUGINO2OBJS)
+LIBASMOBJS = $(LIBXAFASMOBJS)
+ 
+INCLUDES += \
+    -I$(ROOTDIR)/include \
+    -I$(ROOTDIR)/include/audio \
+    -I$(ROOTDIR)/include/sys/xt-shmem \
+	-I$(ROOTDIR)/include/sys/xt-shmem/board-hikey \
+    -I$(ROOTDIR)/plugins/cadence/mp3_dec 
+    
+INCLUDES += $(PLUGININCLUDES)
+
+LDFLAGS += -nostdlib -lhal -lhandlers-board -lc -lgcc 
+LDFLAGS += -mlsp="./hifi_hikey_lsp"
+
+HIKEY960: $(CODEC_NAME) 
+
+include $(ROOTDIR)/build_hikey/common.mk
diff --git a/hifi/xaf/hifi-dpf/build_hikey/common.mk b/hifi/xaf/hifi-dpf/build_hikey/common.mk
new file mode 100644
index 0000000..ef4429e
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/common.mk
@@ -0,0 +1,156 @@
+#
+# Copyright (C) 2018 Cadence Design Systems, Inc.
+# 
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to use this Software with Cadence processor cores only and 
+# not with any other processors and platforms, subject to
+# the following conditions:
+# 
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+# 
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+
+QUIET =
+MAPFILE  = map_$(CODEC_NAME).txt
+LDSCRIPT = ldscript_$(CODEC_NAME).txt
+SYMFILE  = symbols_$(CODEC_NAME).txt
+ELFTOBIN = $(ROOTDIR)/build_hikey/tools/elftobin.sh
+
+ifeq ($(CPU), gcc)
+    S = /
+    AR = ar
+    OBJCOPY = objcopy
+    CC = gcc
+    CXX = g++
+    CFLAGS += -fno-exceptions -DCSTUB=1
+    CFLAGS += -ffloat-store 
+    CFLAGS += -DHIFI3_CSTUB
+    RM = rm -f
+    RM_R = rm -rf
+    MKPATH = mkdir -p
+    CP = cp -f
+    INCLUDES += \
+    -I$(ROOTDIR)/test/include
+else
+    AR = xt-ar $(XTCORE)
+    OBJCOPY = xt-objcopy $(XTCORE)
+    CC = xt-xcc $(XTCORE)
+    CXX = xt-xc++ $(XTCORE)
+    ISS = xt-run $(XTCORE)
+    CONFIGDIR := $(shell $(ISS) --show-config=config)
+    include $(CONFIGDIR)/misc/hostenv.mk
+    #CFLAGS += -Wall 
+    #CFLAGS += -Werror 
+    #CFLAGS += -mno-mul16 -mno-mul32 -mno-div32 -fsigned-char -fno-exceptions -mlongcalls -INLINE:requested -mcoproc -fno-zero-initialized-in-bss
+    CFLAGS += -mlongcalls -mtext-section-literals
+    ASMFLAGS += -mlongcalls
+endif
+
+OBJDIR = objs$(S)$(CODEC_NAME)
+LIBDIR = $(ROOTDIR)$(S)lib
+
+OBJ_LIBO2OBJS = $(addprefix $(OBJDIR)/,$(LIBO2OBJS))
+OBJ_LIBOSOBJS = $(addprefix $(OBJDIR)/,$(LIBOSOBJS))
+OBJ_LIBO2CPPOBJS = $(addprefix $(OBJDIR)/,$(LIBO2CPPOBJS))
+OBJ_LIBOSCPPOBJS = $(addprefix $(OBJDIR)/,$(LIBOSCPPOBJS))
+OBJ_LIBASMOBJS = $(addprefix $(OBJDIR)/,$(LIBASMOBJS))
+
+TEMPOBJ = temp.o    
+
+ifeq ($(CPU), gcc)
+    LIBOBJ   = $(OBJDIR)/xgcc_$(CODEC_NAME).o
+    LIB      = xgcc_$(CODEC_NAME).img
+else
+    LIBOBJ   = $(OBJDIR)/xa_$(CODEC_NAME).o
+    LIB      = xa_$(CODEC_NAME).img
+endif
+
+CFLAGS += \
+    $(EXTRA_CFLAGS) $(EXTRA_CFLAGS2)
+
+
+ifeq ($(DEBUG),1)
+  NOSTRIP = 1
+  OPT_O2 = -O0 -g 
+  OPT_OS = -O0 -g
+  CFLAGS += -DDEBUG
+else
+ifeq ($(CPU), gcc)
+  OPT_O2 = -O2 -g 
+  OPT_OS = -O2 -g 
+else
+  #OPT_O2 = -O3 -LNO:simd 
+  OPT_O2 = -g -O2 
+  OPT_OS = -Os 
+endif
+endif
+
+OPT_ASM = -g -Wa,--gdwarf-2
+
+
+all: $(OBJDIR) $(LIB) 
+$(CODEC_NAME): $(OBJDIR) $(LIB) 
+
+install: $(LIB)
+	@echo "Installing $(LIB)"
+	$(QUIET) -$(MKPATH) "$(LIBDIR)"
+	$(QUIET) $(CP) $(LIB) "$(LIBDIR)"
+
+$(OBJDIR):
+	$(QUIET) -$(MKPATH) $@
+
+ifeq ($(NOSTRIP), 1)
+$(LIBOBJ): $(OBJ_LIBO2OBJS) $(OBJ_LIBOSOBJS) $(OBJ_LIBO2CPPOBJS) $(OBJ_LIBOSCPPOBJS) $(OBJ_LIBASMOBJS) $(PLUGINLIBS)
+	@echo "Linking Objects"
+	$(QUIET) $(CXX) -c $(OPT_O2) $(CFLAGS) -o $@ $^ \
+	-Wl,-Map,$(MAPFILE) --no-standard-libraries \
+	$(LDFLAGS) $(EXTRA_LDFLAGS)
+else
+$(LIBOBJ): $(OBJ_LIBO2OBJS) $(OBJ_LIBOSOBJS) $(OBJ_LIBO2CPPOBJS) $(OBJ_LIBOSCPPOBJS) $(OBJ_LIBASMOBJS) $(PLUGINLIBS)
+	@echo "Linking Objects"
+	$(QUIET) $(CXX) -c $(OPT_O2) $(CFLAGS) -o $@ $^ \
+	-Wl,-Map,$(MAPFILE) --no-standard-libraries \
+	-Wl,--retain-symbols-file,$(SYMFILE) \
+	$(IPA_FLAGS) $(LDFLAGS) $(EXTRA_LDFLAGS)
+	$(QUIET) $(OBJCOPY) --keep-global-symbols=$(SYMFILE) $@ $(TEMPOBJ)
+	$(QUIET) $(OBJCOPY) --strip-unneeded $(TEMPOBJ) $@
+	$(QUIET) -$(RM) $(TEMPOBJ)
+endif 
+
+
+$(OBJ_LIBO2OBJS): $(OBJDIR)/%.o: %.c
+	@echo "Compiling $<"
+	$(QUIET) $(CC) -o $@ $(OPT_O2) $(CFLAGS) $(INCLUDES) -c $<
+	
+$(OBJ_LIBOSOBJS): $(OBJDIR)/%.o: %.c
+	@echo "Compiling $<"
+	$(QUIET) $(CC) -o $@ $(OPT_OS) $(CFLAGS) $(INCLUDES) -c $<
+	
+$(OBJ_LIBO2CPPOBJS): $(OBJDIR)/%.o: %.cpp
+	@echo "Compiling $<"
+	$(QUIET) $(CXX) -o $@ $(OPT_O2) $(CFLAGS) $(INCLUDES) -c $<
+	
+$(OBJ_LIBOSCPPOBJS): $(OBJDIR)/%.o: %.cpp
+	@echo "Compiling $<"
+	$(QUIET) $(CXX) -o $@ $(OPT_OS) $(CFLAGS) $(INCLUDES) -c $<
+
+$(OBJ_LIBASMOBJS): $(OBJDIR)/%.o: %.S
+	@echo "Compiling $<"
+	$(QUIET) $(CC) -o $@ $(OPT_ASM) $(ASMFLAGS) $(INCLUDES) -c $<
+	
+$(LIB): %.img: $(OBJDIR)/%.o
+	@echo "Creating Library $@"
+	$(ELFTOBIN) $< $@
+
+clean:
+	-$(RM) $(LIB) $(MAPFILE)
+	-$(RM_R) $(OBJDIR) $(LIBDIR) 
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.x b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.x
new file mode 100644
index 0000000..67507ed
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.x
@@ -0,0 +1,827 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP hifi_hikey_lsp */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0xC0000000, len = 0x408000
+  old_vlpd_seg :                      	org = 0xC0408000, len = 0x10000
+  efr_fr_hr_vlpd_seg :                	org = 0xC0418000, len = 0x10000
+  amr_vlpd_seg :                      	org = 0xC0428000, len = 0x10000
+  amrwb_vlpd_seg :                    	org = 0xC0438000, len = 0x10000
+  evrc_evrcb_vlpt_seg :               	org = 0xC0448000, len = 0x48000
+  efr_fr_hr_vlpt_seg :                	org = 0xC0490000, len = 0x30000
+  amr_vlpt_seg :                      	org = 0xC04C0000, len = 0x20000
+  amrwb_vlpt_seg :                    	org = 0xC04E0000, len = 0x30000
+  vlpt_seg :                          	org = 0xC0510000, len = 0x48000
+  vlpd_seg :                          	org = 0xC0558000, len = 0x20000
+  ulpp_seg :                          	org = 0xC0578000, len = 0x40000
+  dtsv3_seg :                         	org = 0xC05B8000, len = 0x20000
+  dtsv4_seg :                         	org = 0xC05D8000, len = 0x28000
+  dram0_0_seg :                       	org = 0xE8058000, len = 0x28000
+  iram0_0_seg :                       	org = 0xE8080000, len = 0x300
+  iram0_1_seg :                       	org = 0xE8080300, len = 0x100
+  iram0_2_seg :                       	org = 0xE8080400, len = 0x178
+  iram0_3_seg :                       	org = 0xE8080578, len = 0x8
+  iram0_4_seg :                       	org = 0xE8080580, len = 0x38
+  iram0_5_seg :                       	org = 0xE80805B8, len = 0x8
+  iram0_6_seg :                       	org = 0xE80805C0, len = 0x38
+  iram0_7_seg :                       	org = 0xE80805F8, len = 0x8
+  iram0_8_seg :                       	org = 0xE8080600, len = 0x38
+  iram0_9_seg :                       	org = 0xE8080638, len = 0x8
+  iram0_10_seg :                      	org = 0xE8080640, len = 0x38
+  iram0_11_seg :                      	org = 0xE8080678, len = 0x48
+  iram0_12_seg :                      	org = 0xE80806C0, len = 0x38
+  iram0_13_seg :                      	org = 0xE80806F8, len = 0x8
+  iram0_14_seg :                      	org = 0xE8080700, len = 0x38
+  iram0_15_seg :                      	org = 0xE8080738, len = 0x8
+  iram0_16_seg :                      	org = 0xE8080740, len = 0x38
+  iram0_17_seg :                      	org = 0xE8080778, len = 0x48
+  iram0_18_seg :                      	org = 0xE80807C0, len = 0x40
+  iram0_19_seg :                      	org = 0xE8080800, len = 0xB800
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram0_bss_phdr PT_LOAD;
+  old_vlpd_phdr PT_LOAD;
+  old_vlpd_bss_phdr PT_LOAD;
+  efr_fr_hr_vlpd_phdr PT_LOAD;
+  efr_fr_hr_vlpd_bss_phdr PT_LOAD;
+  amr_vlpd_phdr PT_LOAD;
+  amr_vlpd_bss_phdr PT_LOAD;
+  amrwb_vlpd_phdr PT_LOAD;
+  amrwb_vlpd_bss_phdr PT_LOAD;
+  evrc_evrcb_vlpt_phdr PT_LOAD;
+  efr_fr_hr_vlpt_phdr PT_LOAD;
+  amr_vlpt_phdr PT_LOAD;
+  amrwb_vlpt_phdr PT_LOAD;
+  vlpt_phdr PT_LOAD;
+  vlpd_phdr PT_LOAD;
+  ulpp_phdr PT_LOAD;
+  ulpp_bss_phdr PT_LOAD;
+  dtsv3_phdr PT_LOAD;
+  dtsv3_bss_phdr PT_LOAD;
+  dtsv4_phdr PT_LOAD;
+  dtsv4_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  iram0_0_phdr PT_LOAD;
+  iram0_1_phdr PT_LOAD;
+  iram0_2_phdr PT_LOAD;
+  iram0_3_phdr PT_LOAD;
+  iram0_4_phdr PT_LOAD;
+  iram0_5_phdr PT_LOAD;
+  iram0_6_phdr PT_LOAD;
+  iram0_7_phdr PT_LOAD;
+  iram0_8_phdr PT_LOAD;
+  iram0_9_phdr PT_LOAD;
+  iram0_10_phdr PT_LOAD;
+  iram0_11_phdr PT_LOAD;
+  iram0_12_phdr PT_LOAD;
+  iram0_13_phdr PT_LOAD;
+  iram0_14_phdr PT_LOAD;
+  iram0_15_phdr PT_LOAD;
+  iram0_16_phdr PT_LOAD;
+  iram0_17_phdr PT_LOAD;
+  iram0_18_phdr PT_LOAD;
+  iram0_19_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+/*  Memory boundary addresses:  */
+_memmap_mem_iram0_start = 0xe8080000;
+_memmap_mem_iram0_end   = 0xe808c000;
+_memmap_mem_dram0_start = 0xe8058000;
+_memmap_mem_dram0_end   = 0xe8080000;
+_memmap_mem_sram_start = 0xc0000000;
+_memmap_mem_sram_end   = 0xc0600000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0xc0000000;
+_memmap_seg_sram0_max   = 0xc0408000;
+_memmap_seg_old_vlpd_start = 0xc0408000;
+_memmap_seg_old_vlpd_max   = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_start = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_max   = 0xc0428000;
+_memmap_seg_amr_vlpd_start = 0xc0428000;
+_memmap_seg_amr_vlpd_max   = 0xc0438000;
+_memmap_seg_amrwb_vlpd_start = 0xc0438000;
+_memmap_seg_amrwb_vlpd_max   = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_start = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_max   = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_start = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_max   = 0xc04c0000;
+_memmap_seg_amr_vlpt_start = 0xc04c0000;
+_memmap_seg_amr_vlpt_max   = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_start = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_max   = 0xc0510000;
+_memmap_seg_vlpt_start = 0xc0510000;
+_memmap_seg_vlpt_max   = 0xc0558000;
+_memmap_seg_vlpd_start = 0xc0558000;
+_memmap_seg_vlpd_max   = 0xc0578000;
+_memmap_seg_ulpp_start = 0xc0578000;
+_memmap_seg_ulpp_max   = 0xc05b8000;
+_memmap_seg_dtsv3_start = 0xc05b8000;
+_memmap_seg_dtsv3_max   = 0xc05d8000;
+_memmap_seg_dtsv4_start = 0xc05d8000;
+_memmap_seg_dtsv4_max   = 0xc0600000;
+_memmap_seg_dram0_0_start = 0xe8058000;
+_memmap_seg_dram0_0_max   = 0xe8080000;
+_memmap_seg_iram0_0_start = 0xe8080000;
+_memmap_seg_iram0_0_max   = 0xe8080300;
+_memmap_seg_iram0_1_start = 0xe8080300;
+_memmap_seg_iram0_1_max   = 0xe8080400;
+_memmap_seg_iram0_2_start = 0xe8080400;
+_memmap_seg_iram0_2_max   = 0xe8080578;
+_memmap_seg_iram0_3_start = 0xe8080578;
+_memmap_seg_iram0_3_max   = 0xe8080580;
+_memmap_seg_iram0_4_start = 0xe8080580;
+_memmap_seg_iram0_4_max   = 0xe80805b8;
+_memmap_seg_iram0_5_start = 0xe80805b8;
+_memmap_seg_iram0_5_max   = 0xe80805c0;
+_memmap_seg_iram0_6_start = 0xe80805c0;
+_memmap_seg_iram0_6_max   = 0xe80805f8;
+_memmap_seg_iram0_7_start = 0xe80805f8;
+_memmap_seg_iram0_7_max   = 0xe8080600;
+_memmap_seg_iram0_8_start = 0xe8080600;
+_memmap_seg_iram0_8_max   = 0xe8080638;
+_memmap_seg_iram0_9_start = 0xe8080638;
+_memmap_seg_iram0_9_max   = 0xe8080640;
+_memmap_seg_iram0_10_start = 0xe8080640;
+_memmap_seg_iram0_10_max   = 0xe8080678;
+_memmap_seg_iram0_11_start = 0xe8080678;
+_memmap_seg_iram0_11_max   = 0xe80806c0;
+_memmap_seg_iram0_12_start = 0xe80806c0;
+_memmap_seg_iram0_12_max   = 0xe80806f8;
+_memmap_seg_iram0_13_start = 0xe80806f8;
+_memmap_seg_iram0_13_max   = 0xe8080700;
+_memmap_seg_iram0_14_start = 0xe8080700;
+_memmap_seg_iram0_14_max   = 0xe8080738;
+_memmap_seg_iram0_15_start = 0xe8080738;
+_memmap_seg_iram0_15_max   = 0xe8080740;
+_memmap_seg_iram0_16_start = 0xe8080740;
+_memmap_seg_iram0_16_max   = 0xe8080778;
+_memmap_seg_iram0_17_start = 0xe8080778;
+_memmap_seg_iram0_17_max   = 0xe80807c0;
+_memmap_seg_iram0_18_start = 0xe80807c0;
+_memmap_seg_iram0_18_max   = 0xe8080800;
+_memmap_seg_iram0_19_start = 0xe8080800;
+_memmap_seg_iram0_19_max   = 0xe808c000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_vecbase_reset = 0xe8080400);
+PROVIDE(_memmap_reset_vector = 0xe8080000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x44000000;
+_memmap_cacheattr_wt_base = 0x11000000;
+_memmap_cacheattr_bp_base = 0x22000000;
+_memmap_cacheattr_unused_mask = 0x00FFFFFF;
+_memmap_cacheattr_wb_trapnull = 0x4422222F;
+_memmap_cacheattr_wba_trapnull = 0x4422222F;
+_memmap_cacheattr_wbna_trapnull = 0x5522222F;
+_memmap_cacheattr_wt_trapnull = 0x1122222F;
+_memmap_cacheattr_bp_trapnull = 0x2222222F;
+_memmap_cacheattr_wb_strict = 0x44FFFFFF;
+_memmap_cacheattr_wt_strict = 0x11FFFFFF;
+_memmap_cacheattr_bp_strict = 0x22FFFFFF;
+_memmap_cacheattr_wb_allvalid = 0x44222222;
+_memmap_cacheattr_wt_allvalid = 0x11222222;
+_memmap_cacheattr_bp_allvalid = 0x22222222;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .vlpd.rodata : ALIGN(4)
+  {
+    _vlpd_rodata_start = ABSOLUTE(.);
+    *(.vlpd.rodata)
+    _vlpd_rodata_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.data : ALIGN(4)
+  {
+    _vlpd_data_start = ABSOLUTE(.);
+    *(.vlpd.data)
+    _vlpd_data_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _vlpd_bss_start = ABSOLUTE(.);
+    *(.vlpd.bss)
+    . = ALIGN (8);
+    _vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_old_vlpd_end = ALIGN(0x8);
+  } >old_vlpd_seg :old_vlpd_bss_phdr
+
+  .efr_fr_hr_vlpd.rodata : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.rodata)
+    _efr_fr_hr_vlpd_rodata_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.data : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_data_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.data)
+    _efr_fr_hr_vlpd_data_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.bss)
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpd_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_bss_phdr
+
+  .amr_vlpd.rodata : ALIGN(4)
+  {
+    _amr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amr_vlpd.rodata)
+    _amr_vlpd_rodata_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.data : ALIGN(4)
+  {
+    _amr_vlpd_data_start = ABSOLUTE(.);
+    *(.amr_vlpd.data)
+    _amr_vlpd_data_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amr_vlpd_bss_start = ABSOLUTE(.);
+    *(.amr_vlpd.bss)
+    . = ALIGN (8);
+    _amr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpd_end = ALIGN(0x8);
+  } >amr_vlpd_seg :amr_vlpd_bss_phdr
+
+  .amrwb_vlpd.rodata : ALIGN(4)
+  {
+    _amrwb_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.rodata)
+    _amrwb_vlpd_rodata_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.data : ALIGN(4)
+  {
+    _amrwb_vlpd_data_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.data)
+    _amrwb_vlpd_data_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.bss)
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpd_end = ALIGN(0x8);
+  } >amrwb_vlpd_seg :amrwb_vlpd_bss_phdr
+
+  .evrc_evrcb_vlpt.text : ALIGN(4)
+  {
+    _evrc_evrcb_vlpt_text_start = ABSOLUTE(.);
+    *(.evrc_evrcb_vlpt.literal .evrc_evrcb_vlpt.text)
+    _evrc_evrcb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_evrc_evrcb_vlpt_end = ALIGN(0x8);
+  } >evrc_evrcb_vlpt_seg :evrc_evrcb_vlpt_phdr
+
+  .efr_fr_hr_vlpt.text : ALIGN(4)
+  {
+    _efr_fr_hr_vlpt_text_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpt.literal .efr_fr_hr_vlpt.text)
+    _efr_fr_hr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpt_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpt_seg :efr_fr_hr_vlpt_phdr
+
+  .amr_vlpt.text : ALIGN(4)
+  {
+    _amr_vlpt_text_start = ABSOLUTE(.);
+    *(.amr_vlpt.literal .amr_vlpt.text)
+    _amr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpt_end = ALIGN(0x8);
+  } >amr_vlpt_seg :amr_vlpt_phdr
+
+  .amrwb_vlpt.text : ALIGN(4)
+  {
+    _amrwb_vlpt_text_start = ABSOLUTE(.);
+    *(.amrwb_vlpt.literal .amrwb_vlpt.text)
+    _amrwb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpt_end = ALIGN(0x8);
+  } >amrwb_vlpt_seg :amrwb_vlpt_phdr
+
+  .vlpt.text : ALIGN(4)
+  {
+    _vlpt_text_start = ABSOLUTE(.);
+    *(.vlpt.literal .vlpt.text)
+    _vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_vlpt_end = ALIGN(0x8);
+  } >vlpt_seg :vlpt_phdr
+
+  .low_power_dyn_alloc : ALIGN(4)
+  {
+    _low_power_dyn_alloc_start = ABSOLUTE(.);
+    *(.low_power_dyn_alloc)
+    _low_power_dyn_alloc_end = ABSOLUTE(.);
+    _memmap_seg_vlpd_end = ALIGN(0x8);
+  } >vlpd_seg :vlpd_phdr
+
+  .ulpp.rodata : ALIGN(4)
+  {
+    _ulpp_rodata_start = ABSOLUTE(.);
+    *(.ulpp.rodata)
+    _ulpp_rodata_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.data : ALIGN(4)
+  {
+    _ulpp_data_start = ABSOLUTE(.);
+    *(.ulpp.data)
+    _ulpp_data_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.text : ALIGN(4)
+  {
+    _ulpp_text_start = ABSOLUTE(.);
+    *(.ulpp.literal .ulpp.text)
+    _ulpp_text_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _ulpp_bss_start = ABSOLUTE(.);
+    *(.ulpp.bss)
+    . = ALIGN (8);
+    _ulpp_bss_end = ABSOLUTE(.);
+    _memmap_seg_ulpp_end = ALIGN(0x8);
+  } >ulpp_seg :ulpp_bss_phdr
+
+  .dtsv3.rodata : ALIGN(4)
+  {
+    _dtsv3_rodata_start = ABSOLUTE(.);
+    *(.dtsv3.rodata)
+    _dtsv3_rodata_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.data : ALIGN(4)
+  {
+    _dtsv3_data_start = ABSOLUTE(.);
+    *(.dtsv3.data)
+    _dtsv3_data_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.text : ALIGN(4)
+  {
+    _dtsv3_text_start = ABSOLUTE(.);
+    *(.dtsv3.literal .dtsv3.text)
+    _dtsv3_text_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv3_bss_start = ABSOLUTE(.);
+    *(.dtsv3.bss)
+    . = ALIGN (8);
+    _dtsv3_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv3_end = ALIGN(0x8);
+  } >dtsv3_seg :dtsv3_bss_phdr
+
+  .dtsv4.rodata : ALIGN(4)
+  {
+    _dtsv4_rodata_start = ABSOLUTE(.);
+    *(.dtsv4.rodata)
+    _dtsv4_rodata_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.data : ALIGN(4)
+  {
+    _dtsv4_data_start = ABSOLUTE(.);
+    *(.dtsv4.data)
+    _dtsv4_data_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.text : ALIGN(4)
+  {
+    _dtsv4_text_start = ABSOLUTE(.);
+    *(.dtsv4.literal .dtsv4.text)
+    _dtsv4_text_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv4_bss_start = ABSOLUTE(.);
+    *(.dtsv4.bss)
+    . = ALIGN (8);
+    _dtsv4_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv4_end = ALIGN(0x8);
+  } >dtsv4_seg :dtsv4_bss_phdr
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.literal : ALIGN(4)
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.om.debug.bss)
+    *(.os.stack.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+  __stack = 0xe8080000;
+  _heap_sentry = 0xe8080000;
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    KEEP (*(.ResetVector.text))
+    _ResetVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_0_end = ALIGN(0x8);
+  } >iram0_0_seg :iram0_0_phdr
+
+  .Reset.literal : ALIGN(4)
+  {
+    _Reset_literal_start = ABSOLUTE(.);
+    *(.Reset.literal)
+    _Reset_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_1_end = ALIGN(0x8);
+  } >iram0_1_seg :iram0_1_phdr
+
+  .WindowVectors.text : ALIGN(4)
+  {
+    _WindowVectors_text_start = ABSOLUTE(.);
+    KEEP (*(.WindowVectors.text))
+    _WindowVectors_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_2_end = ALIGN(0x8);
+  } >iram0_2_seg :iram0_2_phdr
+
+  .Level2InterruptVector.literal : ALIGN(4)
+  {
+    _Level2InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level2InterruptVector.literal)
+    _Level2InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_3_end = ALIGN(0x8);
+  } >iram0_3_seg :iram0_3_phdr
+
+  .Level2InterruptVector.text : ALIGN(4)
+  {
+    _Level2InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level2InterruptVector.text))
+    _Level2InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_4_end = ALIGN(0x8);
+  } >iram0_4_seg :iram0_4_phdr
+
+  .Level3InterruptVector.literal : ALIGN(4)
+  {
+    _Level3InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level3InterruptVector.literal)
+    _Level3InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_5_end = ALIGN(0x8);
+  } >iram0_5_seg :iram0_5_phdr
+
+  .Level3InterruptVector.text : ALIGN(4)
+  {
+    _Level3InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level3InterruptVector.text))
+    _Level3InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_6_end = ALIGN(0x8);
+  } >iram0_6_seg :iram0_6_phdr
+
+  .Level4InterruptVector.literal : ALIGN(4)
+  {
+    _Level4InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level4InterruptVector.literal)
+    _Level4InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_7_end = ALIGN(0x8);
+  } >iram0_7_seg :iram0_7_phdr
+
+  .Level4InterruptVector.text : ALIGN(4)
+  {
+    _Level4InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level4InterruptVector.text))
+    _Level4InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_8_end = ALIGN(0x8);
+  } >iram0_8_seg :iram0_8_phdr
+
+  .DebugExceptionVector.literal : ALIGN(4)
+  {
+    _DebugExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DebugExceptionVector.literal)
+    _DebugExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_9_end = ALIGN(0x8);
+  } >iram0_9_seg :iram0_9_phdr
+
+  .DebugExceptionVector.text : ALIGN(4)
+  {
+    _DebugExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DebugExceptionVector.text))
+    _DebugExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_10_end = ALIGN(0x8);
+  } >iram0_10_seg :iram0_10_phdr
+
+  .NMIExceptionVector.literal : ALIGN(4)
+  {
+    _NMIExceptionVector_literal_start = ABSOLUTE(.);
+    *(.NMIExceptionVector.literal)
+    _NMIExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_11_end = ALIGN(0x8);
+  } >iram0_11_seg :iram0_11_phdr
+
+  .NMIExceptionVector.text : ALIGN(4)
+  {
+    _NMIExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.NMIExceptionVector.text))
+    _NMIExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_12_end = ALIGN(0x8);
+  } >iram0_12_seg :iram0_12_phdr
+
+  .KernelExceptionVector.literal : ALIGN(4)
+  {
+    _KernelExceptionVector_literal_start = ABSOLUTE(.);
+    *(.KernelExceptionVector.literal)
+    _KernelExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_13_end = ALIGN(0x8);
+  } >iram0_13_seg :iram0_13_phdr
+
+  .KernelExceptionVector.text : ALIGN(4)
+  {
+    _KernelExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.KernelExceptionVector.text))
+    _KernelExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_14_end = ALIGN(0x8);
+  } >iram0_14_seg :iram0_14_phdr
+
+  .UserExceptionVector.literal : ALIGN(4)
+  {
+    _UserExceptionVector_literal_start = ABSOLUTE(.);
+    *(.UserExceptionVector.literal)
+    _UserExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_15_end = ALIGN(0x8);
+  } >iram0_15_seg :iram0_15_phdr
+
+  .UserExceptionVector.text : ALIGN(4)
+  {
+    _UserExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.UserExceptionVector.text))
+    _UserExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_16_end = ALIGN(0x8);
+  } >iram0_16_seg :iram0_16_phdr
+
+  .DoubleExceptionVector.literal : ALIGN(4)
+  {
+    _DoubleExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DoubleExceptionVector.literal)
+    _DoubleExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_17_end = ALIGN(0x8);
+  } >iram0_17_seg :iram0_17_phdr
+
+  .DoubleExceptionVector.text : ALIGN(4)
+  {
+    _DoubleExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DoubleExceptionVector.text))
+    _DoubleExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_18_end = ALIGN(0x8);
+  } >iram0_18_seg :iram0_18_phdr
+
+  .Reset.text : ALIGN(4)
+  {
+    _Reset_text_start = ABSOLUTE(.);
+    *(.Reset.text)
+    _Reset_text_end = ABSOLUTE(.);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .iram0.text : ALIGN(4)
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_19_end = ALIGN(0x8);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .sram.shareaddr : ALIGN(4)
+  {
+    _sram_shareaddr_start = ABSOLUTE(.);
+    *(.sram.shareaddr)
+    _sram_shareaddr_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_vlpd_bss_start)
+    LONG(_vlpd_bss_end)
+    LONG(_efr_fr_hr_vlpd_bss_start)
+    LONG(_efr_fr_hr_vlpd_bss_end)
+    LONG(_amr_vlpd_bss_start)
+    LONG(_amr_vlpd_bss_end)
+    LONG(_amrwb_vlpd_bss_start)
+    LONG(_amrwb_vlpd_bss_end)
+    LONG(_ulpp_bss_start)
+    LONG(_ulpp_bss_end)
+    LONG(_dtsv3_bss_start)
+    LONG(_dtsv3_bss_end)
+    LONG(_dtsv4_bss_start)
+    LONG(_dtsv4_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    _sram_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram0_seg :sram0_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    _sram_data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    _data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.uninit : ALIGN(4)
+  {
+    _sram_uninit_start = ABSOLUTE(.);
+    *(.sram.uninit)
+    _sram_uninit_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram.pool.bss)
+    *(.sram.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_bss_phdr
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xbn b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xbn
new file mode 100644
index 0000000..e226d64
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xbn
@@ -0,0 +1,827 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP hifi_hikey_lsp */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0xC0000000, len = 0x408000
+  old_vlpd_seg :                      	org = 0xC0408000, len = 0x10000
+  efr_fr_hr_vlpd_seg :                	org = 0xC0418000, len = 0x10000
+  amr_vlpd_seg :                      	org = 0xC0428000, len = 0x10000
+  amrwb_vlpd_seg :                    	org = 0xC0438000, len = 0x10000
+  evrc_evrcb_vlpt_seg :               	org = 0xC0448000, len = 0x48000
+  efr_fr_hr_vlpt_seg :                	org = 0xC0490000, len = 0x30000
+  amr_vlpt_seg :                      	org = 0xC04C0000, len = 0x20000
+  amrwb_vlpt_seg :                    	org = 0xC04E0000, len = 0x30000
+  vlpt_seg :                          	org = 0xC0510000, len = 0x48000
+  vlpd_seg :                          	org = 0xC0558000, len = 0x20000
+  ulpp_seg :                          	org = 0xC0578000, len = 0x40000
+  dtsv3_seg :                         	org = 0xC05B8000, len = 0x20000
+  dtsv4_seg :                         	org = 0xC05D8000, len = 0x28000
+  dram0_0_seg :                       	org = 0xE8058000, len = 0x28000
+  iram0_0_seg :                       	org = 0xE8080000, len = 0x300
+  iram0_1_seg :                       	org = 0xE8080300, len = 0x100
+  iram0_2_seg :                       	org = 0xE8080400, len = 0x178
+  iram0_3_seg :                       	org = 0xE8080578, len = 0x8
+  iram0_4_seg :                       	org = 0xE8080580, len = 0x38
+  iram0_5_seg :                       	org = 0xE80805B8, len = 0x8
+  iram0_6_seg :                       	org = 0xE80805C0, len = 0x38
+  iram0_7_seg :                       	org = 0xE80805F8, len = 0x8
+  iram0_8_seg :                       	org = 0xE8080600, len = 0x38
+  iram0_9_seg :                       	org = 0xE8080638, len = 0x8
+  iram0_10_seg :                      	org = 0xE8080640, len = 0x38
+  iram0_11_seg :                      	org = 0xE8080678, len = 0x48
+  iram0_12_seg :                      	org = 0xE80806C0, len = 0x38
+  iram0_13_seg :                      	org = 0xE80806F8, len = 0x8
+  iram0_14_seg :                      	org = 0xE8080700, len = 0x38
+  iram0_15_seg :                      	org = 0xE8080738, len = 0x8
+  iram0_16_seg :                      	org = 0xE8080740, len = 0x38
+  iram0_17_seg :                      	org = 0xE8080778, len = 0x48
+  iram0_18_seg :                      	org = 0xE80807C0, len = 0x40
+  iram0_19_seg :                      	org = 0xE8080800, len = 0xB800
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram0_bss_phdr PT_LOAD;
+  old_vlpd_phdr PT_LOAD;
+  old_vlpd_bss_phdr PT_LOAD;
+  efr_fr_hr_vlpd_phdr PT_LOAD;
+  efr_fr_hr_vlpd_bss_phdr PT_LOAD;
+  amr_vlpd_phdr PT_LOAD;
+  amr_vlpd_bss_phdr PT_LOAD;
+  amrwb_vlpd_phdr PT_LOAD;
+  amrwb_vlpd_bss_phdr PT_LOAD;
+  evrc_evrcb_vlpt_phdr PT_LOAD;
+  efr_fr_hr_vlpt_phdr PT_LOAD;
+  amr_vlpt_phdr PT_LOAD;
+  amrwb_vlpt_phdr PT_LOAD;
+  vlpt_phdr PT_LOAD;
+  vlpd_phdr PT_LOAD;
+  ulpp_phdr PT_LOAD;
+  ulpp_bss_phdr PT_LOAD;
+  dtsv3_phdr PT_LOAD;
+  dtsv3_bss_phdr PT_LOAD;
+  dtsv4_phdr PT_LOAD;
+  dtsv4_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  iram0_0_phdr PT_LOAD;
+  iram0_1_phdr PT_LOAD;
+  iram0_2_phdr PT_LOAD;
+  iram0_3_phdr PT_LOAD;
+  iram0_4_phdr PT_LOAD;
+  iram0_5_phdr PT_LOAD;
+  iram0_6_phdr PT_LOAD;
+  iram0_7_phdr PT_LOAD;
+  iram0_8_phdr PT_LOAD;
+  iram0_9_phdr PT_LOAD;
+  iram0_10_phdr PT_LOAD;
+  iram0_11_phdr PT_LOAD;
+  iram0_12_phdr PT_LOAD;
+  iram0_13_phdr PT_LOAD;
+  iram0_14_phdr PT_LOAD;
+  iram0_15_phdr PT_LOAD;
+  iram0_16_phdr PT_LOAD;
+  iram0_17_phdr PT_LOAD;
+  iram0_18_phdr PT_LOAD;
+  iram0_19_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+/*  Memory boundary addresses:  */
+_memmap_mem_iram0_start = 0xe8080000;
+_memmap_mem_iram0_end   = 0xe808c000;
+_memmap_mem_dram0_start = 0xe8058000;
+_memmap_mem_dram0_end   = 0xe8080000;
+_memmap_mem_sram_start = 0xc0000000;
+_memmap_mem_sram_end   = 0xc0600000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0xc0000000;
+_memmap_seg_sram0_max   = 0xc0408000;
+_memmap_seg_old_vlpd_start = 0xc0408000;
+_memmap_seg_old_vlpd_max   = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_start = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_max   = 0xc0428000;
+_memmap_seg_amr_vlpd_start = 0xc0428000;
+_memmap_seg_amr_vlpd_max   = 0xc0438000;
+_memmap_seg_amrwb_vlpd_start = 0xc0438000;
+_memmap_seg_amrwb_vlpd_max   = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_start = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_max   = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_start = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_max   = 0xc04c0000;
+_memmap_seg_amr_vlpt_start = 0xc04c0000;
+_memmap_seg_amr_vlpt_max   = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_start = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_max   = 0xc0510000;
+_memmap_seg_vlpt_start = 0xc0510000;
+_memmap_seg_vlpt_max   = 0xc0558000;
+_memmap_seg_vlpd_start = 0xc0558000;
+_memmap_seg_vlpd_max   = 0xc0578000;
+_memmap_seg_ulpp_start = 0xc0578000;
+_memmap_seg_ulpp_max   = 0xc05b8000;
+_memmap_seg_dtsv3_start = 0xc05b8000;
+_memmap_seg_dtsv3_max   = 0xc05d8000;
+_memmap_seg_dtsv4_start = 0xc05d8000;
+_memmap_seg_dtsv4_max   = 0xc0600000;
+_memmap_seg_dram0_0_start = 0xe8058000;
+_memmap_seg_dram0_0_max   = 0xe8080000;
+_memmap_seg_iram0_0_start = 0xe8080000;
+_memmap_seg_iram0_0_max   = 0xe8080300;
+_memmap_seg_iram0_1_start = 0xe8080300;
+_memmap_seg_iram0_1_max   = 0xe8080400;
+_memmap_seg_iram0_2_start = 0xe8080400;
+_memmap_seg_iram0_2_max   = 0xe8080578;
+_memmap_seg_iram0_3_start = 0xe8080578;
+_memmap_seg_iram0_3_max   = 0xe8080580;
+_memmap_seg_iram0_4_start = 0xe8080580;
+_memmap_seg_iram0_4_max   = 0xe80805b8;
+_memmap_seg_iram0_5_start = 0xe80805b8;
+_memmap_seg_iram0_5_max   = 0xe80805c0;
+_memmap_seg_iram0_6_start = 0xe80805c0;
+_memmap_seg_iram0_6_max   = 0xe80805f8;
+_memmap_seg_iram0_7_start = 0xe80805f8;
+_memmap_seg_iram0_7_max   = 0xe8080600;
+_memmap_seg_iram0_8_start = 0xe8080600;
+_memmap_seg_iram0_8_max   = 0xe8080638;
+_memmap_seg_iram0_9_start = 0xe8080638;
+_memmap_seg_iram0_9_max   = 0xe8080640;
+_memmap_seg_iram0_10_start = 0xe8080640;
+_memmap_seg_iram0_10_max   = 0xe8080678;
+_memmap_seg_iram0_11_start = 0xe8080678;
+_memmap_seg_iram0_11_max   = 0xe80806c0;
+_memmap_seg_iram0_12_start = 0xe80806c0;
+_memmap_seg_iram0_12_max   = 0xe80806f8;
+_memmap_seg_iram0_13_start = 0xe80806f8;
+_memmap_seg_iram0_13_max   = 0xe8080700;
+_memmap_seg_iram0_14_start = 0xe8080700;
+_memmap_seg_iram0_14_max   = 0xe8080738;
+_memmap_seg_iram0_15_start = 0xe8080738;
+_memmap_seg_iram0_15_max   = 0xe8080740;
+_memmap_seg_iram0_16_start = 0xe8080740;
+_memmap_seg_iram0_16_max   = 0xe8080778;
+_memmap_seg_iram0_17_start = 0xe8080778;
+_memmap_seg_iram0_17_max   = 0xe80807c0;
+_memmap_seg_iram0_18_start = 0xe80807c0;
+_memmap_seg_iram0_18_max   = 0xe8080800;
+_memmap_seg_iram0_19_start = 0xe8080800;
+_memmap_seg_iram0_19_max   = 0xe808c000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_vecbase_reset = 0xe8080400);
+PROVIDE(_memmap_reset_vector = 0xe8080000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x44000000;
+_memmap_cacheattr_wt_base = 0x11000000;
+_memmap_cacheattr_bp_base = 0x22000000;
+_memmap_cacheattr_unused_mask = 0x00FFFFFF;
+_memmap_cacheattr_wb_trapnull = 0x4422222F;
+_memmap_cacheattr_wba_trapnull = 0x4422222F;
+_memmap_cacheattr_wbna_trapnull = 0x5522222F;
+_memmap_cacheattr_wt_trapnull = 0x1122222F;
+_memmap_cacheattr_bp_trapnull = 0x2222222F;
+_memmap_cacheattr_wb_strict = 0x44FFFFFF;
+_memmap_cacheattr_wt_strict = 0x11FFFFFF;
+_memmap_cacheattr_bp_strict = 0x22FFFFFF;
+_memmap_cacheattr_wb_allvalid = 0x44222222;
+_memmap_cacheattr_wt_allvalid = 0x11222222;
+_memmap_cacheattr_bp_allvalid = 0x22222222;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .vlpd.rodata : ALIGN(4)
+  {
+    _vlpd_rodata_start = ABSOLUTE(.);
+    *(.vlpd.rodata)
+    _vlpd_rodata_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.data : ALIGN(4)
+  {
+    _vlpd_data_start = ABSOLUTE(.);
+    *(.vlpd.data)
+    _vlpd_data_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _vlpd_bss_start = ABSOLUTE(.);
+    *(.vlpd.bss)
+    . = ALIGN (8);
+    _vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_old_vlpd_end = ALIGN(0x8);
+  } >old_vlpd_seg :old_vlpd_bss_phdr
+
+  .efr_fr_hr_vlpd.rodata : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.rodata)
+    _efr_fr_hr_vlpd_rodata_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.data : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_data_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.data)
+    _efr_fr_hr_vlpd_data_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.bss)
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpd_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_bss_phdr
+
+  .amr_vlpd.rodata : ALIGN(4)
+  {
+    _amr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amr_vlpd.rodata)
+    _amr_vlpd_rodata_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.data : ALIGN(4)
+  {
+    _amr_vlpd_data_start = ABSOLUTE(.);
+    *(.amr_vlpd.data)
+    _amr_vlpd_data_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amr_vlpd_bss_start = ABSOLUTE(.);
+    *(.amr_vlpd.bss)
+    . = ALIGN (8);
+    _amr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpd_end = ALIGN(0x8);
+  } >amr_vlpd_seg :amr_vlpd_bss_phdr
+
+  .amrwb_vlpd.rodata : ALIGN(4)
+  {
+    _amrwb_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.rodata)
+    _amrwb_vlpd_rodata_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.data : ALIGN(4)
+  {
+    _amrwb_vlpd_data_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.data)
+    _amrwb_vlpd_data_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.bss)
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpd_end = ALIGN(0x8);
+  } >amrwb_vlpd_seg :amrwb_vlpd_bss_phdr
+
+  .evrc_evrcb_vlpt.text : ALIGN(4)
+  {
+    _evrc_evrcb_vlpt_text_start = ABSOLUTE(.);
+    *(.evrc_evrcb_vlpt.literal .evrc_evrcb_vlpt.text)
+    _evrc_evrcb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_evrc_evrcb_vlpt_end = ALIGN(0x8);
+  } >evrc_evrcb_vlpt_seg :evrc_evrcb_vlpt_phdr
+
+  .efr_fr_hr_vlpt.text : ALIGN(4)
+  {
+    _efr_fr_hr_vlpt_text_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpt.literal .efr_fr_hr_vlpt.text)
+    _efr_fr_hr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpt_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpt_seg :efr_fr_hr_vlpt_phdr
+
+  .amr_vlpt.text : ALIGN(4)
+  {
+    _amr_vlpt_text_start = ABSOLUTE(.);
+    *(.amr_vlpt.literal .amr_vlpt.text)
+    _amr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpt_end = ALIGN(0x8);
+  } >amr_vlpt_seg :amr_vlpt_phdr
+
+  .amrwb_vlpt.text : ALIGN(4)
+  {
+    _amrwb_vlpt_text_start = ABSOLUTE(.);
+    *(.amrwb_vlpt.literal .amrwb_vlpt.text)
+    _amrwb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpt_end = ALIGN(0x8);
+  } >amrwb_vlpt_seg :amrwb_vlpt_phdr
+
+  .vlpt.text : ALIGN(4)
+  {
+    _vlpt_text_start = ABSOLUTE(.);
+    *(.vlpt.literal .vlpt.text)
+    _vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_vlpt_end = ALIGN(0x8);
+  } >vlpt_seg :vlpt_phdr
+
+  .low_power_dyn_alloc : ALIGN(4)
+  {
+    _low_power_dyn_alloc_start = ABSOLUTE(.);
+    *(.low_power_dyn_alloc)
+    _low_power_dyn_alloc_end = ABSOLUTE(.);
+    _memmap_seg_vlpd_end = ALIGN(0x8);
+  } >vlpd_seg :vlpd_phdr
+
+  .ulpp.rodata : ALIGN(4)
+  {
+    _ulpp_rodata_start = ABSOLUTE(.);
+    *(.ulpp.rodata)
+    _ulpp_rodata_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.data : ALIGN(4)
+  {
+    _ulpp_data_start = ABSOLUTE(.);
+    *(.ulpp.data)
+    _ulpp_data_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.text : ALIGN(4)
+  {
+    _ulpp_text_start = ABSOLUTE(.);
+    *(.ulpp.literal .ulpp.text)
+    _ulpp_text_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _ulpp_bss_start = ABSOLUTE(.);
+    *(.ulpp.bss)
+    . = ALIGN (8);
+    _ulpp_bss_end = ABSOLUTE(.);
+    _memmap_seg_ulpp_end = ALIGN(0x8);
+  } >ulpp_seg :ulpp_bss_phdr
+
+  .dtsv3.rodata : ALIGN(4)
+  {
+    _dtsv3_rodata_start = ABSOLUTE(.);
+    *(.dtsv3.rodata)
+    _dtsv3_rodata_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.data : ALIGN(4)
+  {
+    _dtsv3_data_start = ABSOLUTE(.);
+    *(.dtsv3.data)
+    _dtsv3_data_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.text : ALIGN(4)
+  {
+    _dtsv3_text_start = ABSOLUTE(.);
+    *(.dtsv3.literal .dtsv3.text)
+    _dtsv3_text_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv3_bss_start = ABSOLUTE(.);
+    *(.dtsv3.bss)
+    . = ALIGN (8);
+    _dtsv3_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv3_end = ALIGN(0x8);
+  } >dtsv3_seg :dtsv3_bss_phdr
+
+  .dtsv4.rodata : ALIGN(4)
+  {
+    _dtsv4_rodata_start = ABSOLUTE(.);
+    *(.dtsv4.rodata)
+    _dtsv4_rodata_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.data : ALIGN(4)
+  {
+    _dtsv4_data_start = ABSOLUTE(.);
+    *(.dtsv4.data)
+    _dtsv4_data_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.text : ALIGN(4)
+  {
+    _dtsv4_text_start = ABSOLUTE(.);
+    *(.dtsv4.literal .dtsv4.text)
+    _dtsv4_text_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv4_bss_start = ABSOLUTE(.);
+    *(.dtsv4.bss)
+    . = ALIGN (8);
+    _dtsv4_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv4_end = ALIGN(0x8);
+  } >dtsv4_seg :dtsv4_bss_phdr
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.literal : ALIGN(4)
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.om.debug.bss)
+    *(.os.stack.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+  __stack = 0xe8080000;
+  _heap_sentry = 0xe8080000;
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    KEEP (*(.ResetVector.text))
+    _ResetVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_0_end = ALIGN(0x8);
+  } >iram0_0_seg :iram0_0_phdr
+
+  .Reset.literal : ALIGN(4)
+  {
+    _Reset_literal_start = ABSOLUTE(.);
+    *(.Reset.literal)
+    _Reset_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_1_end = ALIGN(0x8);
+  } >iram0_1_seg :iram0_1_phdr
+
+  .WindowVectors.text : ALIGN(4)
+  {
+    _WindowVectors_text_start = ABSOLUTE(.);
+    KEEP (*(.WindowVectors.text))
+    _WindowVectors_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_2_end = ALIGN(0x8);
+  } >iram0_2_seg :iram0_2_phdr
+
+  .Level2InterruptVector.literal : ALIGN(4)
+  {
+    _Level2InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level2InterruptVector.literal)
+    _Level2InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_3_end = ALIGN(0x8);
+  } >iram0_3_seg :iram0_3_phdr
+
+  .Level2InterruptVector.text : ALIGN(4)
+  {
+    _Level2InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level2InterruptVector.text))
+    _Level2InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_4_end = ALIGN(0x8);
+  } >iram0_4_seg :iram0_4_phdr
+
+  .Level3InterruptVector.literal : ALIGN(4)
+  {
+    _Level3InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level3InterruptVector.literal)
+    _Level3InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_5_end = ALIGN(0x8);
+  } >iram0_5_seg :iram0_5_phdr
+
+  .Level3InterruptVector.text : ALIGN(4)
+  {
+    _Level3InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level3InterruptVector.text))
+    _Level3InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_6_end = ALIGN(0x8);
+  } >iram0_6_seg :iram0_6_phdr
+
+  .Level4InterruptVector.literal : ALIGN(4)
+  {
+    _Level4InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level4InterruptVector.literal)
+    _Level4InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_7_end = ALIGN(0x8);
+  } >iram0_7_seg :iram0_7_phdr
+
+  .Level4InterruptVector.text : ALIGN(4)
+  {
+    _Level4InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level4InterruptVector.text))
+    _Level4InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_8_end = ALIGN(0x8);
+  } >iram0_8_seg :iram0_8_phdr
+
+  .DebugExceptionVector.literal : ALIGN(4)
+  {
+    _DebugExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DebugExceptionVector.literal)
+    _DebugExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_9_end = ALIGN(0x8);
+  } >iram0_9_seg :iram0_9_phdr
+
+  .DebugExceptionVector.text : ALIGN(4)
+  {
+    _DebugExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DebugExceptionVector.text))
+    _DebugExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_10_end = ALIGN(0x8);
+  } >iram0_10_seg :iram0_10_phdr
+
+  .NMIExceptionVector.literal : ALIGN(4)
+  {
+    _NMIExceptionVector_literal_start = ABSOLUTE(.);
+    *(.NMIExceptionVector.literal)
+    _NMIExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_11_end = ALIGN(0x8);
+  } >iram0_11_seg :iram0_11_phdr
+
+  .NMIExceptionVector.text : ALIGN(4)
+  {
+    _NMIExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.NMIExceptionVector.text))
+    _NMIExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_12_end = ALIGN(0x8);
+  } >iram0_12_seg :iram0_12_phdr
+
+  .KernelExceptionVector.literal : ALIGN(4)
+  {
+    _KernelExceptionVector_literal_start = ABSOLUTE(.);
+    *(.KernelExceptionVector.literal)
+    _KernelExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_13_end = ALIGN(0x8);
+  } >iram0_13_seg :iram0_13_phdr
+
+  .KernelExceptionVector.text : ALIGN(4)
+  {
+    _KernelExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.KernelExceptionVector.text))
+    _KernelExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_14_end = ALIGN(0x8);
+  } >iram0_14_seg :iram0_14_phdr
+
+  .UserExceptionVector.literal : ALIGN(4)
+  {
+    _UserExceptionVector_literal_start = ABSOLUTE(.);
+    *(.UserExceptionVector.literal)
+    _UserExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_15_end = ALIGN(0x8);
+  } >iram0_15_seg :iram0_15_phdr
+
+  .UserExceptionVector.text : ALIGN(4)
+  {
+    _UserExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.UserExceptionVector.text))
+    _UserExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_16_end = ALIGN(0x8);
+  } >iram0_16_seg :iram0_16_phdr
+
+  .DoubleExceptionVector.literal : ALIGN(4)
+  {
+    _DoubleExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DoubleExceptionVector.literal)
+    _DoubleExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_17_end = ALIGN(0x8);
+  } >iram0_17_seg :iram0_17_phdr
+
+  .DoubleExceptionVector.text : ALIGN(4)
+  {
+    _DoubleExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DoubleExceptionVector.text))
+    _DoubleExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_18_end = ALIGN(0x8);
+  } >iram0_18_seg :iram0_18_phdr
+
+  .Reset.text : ALIGN(4)
+  {
+    _Reset_text_start = ABSOLUTE(.);
+    *(.Reset.text)
+    _Reset_text_end = ABSOLUTE(.);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .iram0.text : ALIGN(4)
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_19_end = ALIGN(0x8);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .sram.shareaddr : ALIGN(4)
+  {
+    _sram_shareaddr_start = ABSOLUTE(.);
+    *(.sram.shareaddr)
+    _sram_shareaddr_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_vlpd_bss_start)
+    LONG(_vlpd_bss_end)
+    LONG(_efr_fr_hr_vlpd_bss_start)
+    LONG(_efr_fr_hr_vlpd_bss_end)
+    LONG(_amr_vlpd_bss_start)
+    LONG(_amr_vlpd_bss_end)
+    LONG(_amrwb_vlpd_bss_start)
+    LONG(_amrwb_vlpd_bss_end)
+    LONG(_ulpp_bss_start)
+    LONG(_ulpp_bss_end)
+    LONG(_dtsv3_bss_start)
+    LONG(_dtsv3_bss_end)
+    LONG(_dtsv4_bss_start)
+    LONG(_dtsv4_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    _sram_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram0_seg :sram0_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    _sram_data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    _data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.uninit : ALIGN(4)
+  {
+    _sram_uninit_start = ABSOLUTE(.);
+    *(.sram.uninit)
+    _sram_uninit_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram.pool.bss)
+    *(.sram.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_bss_phdr
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xn b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xn
new file mode 100644
index 0000000..17c05e1
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xn
@@ -0,0 +1,827 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP hifi_hikey_lsp */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0xC0000000, len = 0x408000
+  old_vlpd_seg :                      	org = 0xC0408000, len = 0x10000
+  efr_fr_hr_vlpd_seg :                	org = 0xC0418000, len = 0x10000
+  amr_vlpd_seg :                      	org = 0xC0428000, len = 0x10000
+  amrwb_vlpd_seg :                    	org = 0xC0438000, len = 0x10000
+  evrc_evrcb_vlpt_seg :               	org = 0xC0448000, len = 0x48000
+  efr_fr_hr_vlpt_seg :                	org = 0xC0490000, len = 0x30000
+  amr_vlpt_seg :                      	org = 0xC04C0000, len = 0x20000
+  amrwb_vlpt_seg :                    	org = 0xC04E0000, len = 0x30000
+  vlpt_seg :                          	org = 0xC0510000, len = 0x48000
+  vlpd_seg :                          	org = 0xC0558000, len = 0x20000
+  ulpp_seg :                          	org = 0xC0578000, len = 0x40000
+  dtsv3_seg :                         	org = 0xC05B8000, len = 0x20000
+  dtsv4_seg :                         	org = 0xC05D8000, len = 0x28000
+  dram0_0_seg :                       	org = 0xE8058000, len = 0x28000
+  iram0_0_seg :                       	org = 0xE8080000, len = 0x300
+  iram0_1_seg :                       	org = 0xE8080300, len = 0x100
+  iram0_2_seg :                       	org = 0xE8080400, len = 0x178
+  iram0_3_seg :                       	org = 0xE8080578, len = 0x8
+  iram0_4_seg :                       	org = 0xE8080580, len = 0x38
+  iram0_5_seg :                       	org = 0xE80805B8, len = 0x8
+  iram0_6_seg :                       	org = 0xE80805C0, len = 0x38
+  iram0_7_seg :                       	org = 0xE80805F8, len = 0x8
+  iram0_8_seg :                       	org = 0xE8080600, len = 0x38
+  iram0_9_seg :                       	org = 0xE8080638, len = 0x8
+  iram0_10_seg :                      	org = 0xE8080640, len = 0x38
+  iram0_11_seg :                      	org = 0xE8080678, len = 0x48
+  iram0_12_seg :                      	org = 0xE80806C0, len = 0x38
+  iram0_13_seg :                      	org = 0xE80806F8, len = 0x8
+  iram0_14_seg :                      	org = 0xE8080700, len = 0x38
+  iram0_15_seg :                      	org = 0xE8080738, len = 0x8
+  iram0_16_seg :                      	org = 0xE8080740, len = 0x38
+  iram0_17_seg :                      	org = 0xE8080778, len = 0x48
+  iram0_18_seg :                      	org = 0xE80807C0, len = 0x40
+  iram0_19_seg :                      	org = 0xE8080800, len = 0xB800
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram0_bss_phdr PT_LOAD;
+  old_vlpd_phdr PT_LOAD;
+  old_vlpd_bss_phdr PT_LOAD;
+  efr_fr_hr_vlpd_phdr PT_LOAD;
+  efr_fr_hr_vlpd_bss_phdr PT_LOAD;
+  amr_vlpd_phdr PT_LOAD;
+  amr_vlpd_bss_phdr PT_LOAD;
+  amrwb_vlpd_phdr PT_LOAD;
+  amrwb_vlpd_bss_phdr PT_LOAD;
+  evrc_evrcb_vlpt_phdr PT_LOAD;
+  efr_fr_hr_vlpt_phdr PT_LOAD;
+  amr_vlpt_phdr PT_LOAD;
+  amrwb_vlpt_phdr PT_LOAD;
+  vlpt_phdr PT_LOAD;
+  vlpd_phdr PT_LOAD;
+  ulpp_phdr PT_LOAD;
+  ulpp_bss_phdr PT_LOAD;
+  dtsv3_phdr PT_LOAD;
+  dtsv3_bss_phdr PT_LOAD;
+  dtsv4_phdr PT_LOAD;
+  dtsv4_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  iram0_0_phdr PT_LOAD;
+  iram0_1_phdr PT_LOAD;
+  iram0_2_phdr PT_LOAD;
+  iram0_3_phdr PT_LOAD;
+  iram0_4_phdr PT_LOAD;
+  iram0_5_phdr PT_LOAD;
+  iram0_6_phdr PT_LOAD;
+  iram0_7_phdr PT_LOAD;
+  iram0_8_phdr PT_LOAD;
+  iram0_9_phdr PT_LOAD;
+  iram0_10_phdr PT_LOAD;
+  iram0_11_phdr PT_LOAD;
+  iram0_12_phdr PT_LOAD;
+  iram0_13_phdr PT_LOAD;
+  iram0_14_phdr PT_LOAD;
+  iram0_15_phdr PT_LOAD;
+  iram0_16_phdr PT_LOAD;
+  iram0_17_phdr PT_LOAD;
+  iram0_18_phdr PT_LOAD;
+  iram0_19_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+/*  Memory boundary addresses:  */
+_memmap_mem_iram0_start = 0xe8080000;
+_memmap_mem_iram0_end   = 0xe808c000;
+_memmap_mem_dram0_start = 0xe8058000;
+_memmap_mem_dram0_end   = 0xe8080000;
+_memmap_mem_sram_start = 0xc0000000;
+_memmap_mem_sram_end   = 0xc0600000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0xc0000000;
+_memmap_seg_sram0_max   = 0xc0408000;
+_memmap_seg_old_vlpd_start = 0xc0408000;
+_memmap_seg_old_vlpd_max   = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_start = 0xc0418000;
+_memmap_seg_efr_fr_hr_vlpd_max   = 0xc0428000;
+_memmap_seg_amr_vlpd_start = 0xc0428000;
+_memmap_seg_amr_vlpd_max   = 0xc0438000;
+_memmap_seg_amrwb_vlpd_start = 0xc0438000;
+_memmap_seg_amrwb_vlpd_max   = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_start = 0xc0448000;
+_memmap_seg_evrc_evrcb_vlpt_max   = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_start = 0xc0490000;
+_memmap_seg_efr_fr_hr_vlpt_max   = 0xc04c0000;
+_memmap_seg_amr_vlpt_start = 0xc04c0000;
+_memmap_seg_amr_vlpt_max   = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_start = 0xc04e0000;
+_memmap_seg_amrwb_vlpt_max   = 0xc0510000;
+_memmap_seg_vlpt_start = 0xc0510000;
+_memmap_seg_vlpt_max   = 0xc0558000;
+_memmap_seg_vlpd_start = 0xc0558000;
+_memmap_seg_vlpd_max   = 0xc0578000;
+_memmap_seg_ulpp_start = 0xc0578000;
+_memmap_seg_ulpp_max   = 0xc05b8000;
+_memmap_seg_dtsv3_start = 0xc05b8000;
+_memmap_seg_dtsv3_max   = 0xc05d8000;
+_memmap_seg_dtsv4_start = 0xc05d8000;
+_memmap_seg_dtsv4_max   = 0xc0600000;
+_memmap_seg_dram0_0_start = 0xe8058000;
+_memmap_seg_dram0_0_max   = 0xe8080000;
+_memmap_seg_iram0_0_start = 0xe8080000;
+_memmap_seg_iram0_0_max   = 0xe8080300;
+_memmap_seg_iram0_1_start = 0xe8080300;
+_memmap_seg_iram0_1_max   = 0xe8080400;
+_memmap_seg_iram0_2_start = 0xe8080400;
+_memmap_seg_iram0_2_max   = 0xe8080578;
+_memmap_seg_iram0_3_start = 0xe8080578;
+_memmap_seg_iram0_3_max   = 0xe8080580;
+_memmap_seg_iram0_4_start = 0xe8080580;
+_memmap_seg_iram0_4_max   = 0xe80805b8;
+_memmap_seg_iram0_5_start = 0xe80805b8;
+_memmap_seg_iram0_5_max   = 0xe80805c0;
+_memmap_seg_iram0_6_start = 0xe80805c0;
+_memmap_seg_iram0_6_max   = 0xe80805f8;
+_memmap_seg_iram0_7_start = 0xe80805f8;
+_memmap_seg_iram0_7_max   = 0xe8080600;
+_memmap_seg_iram0_8_start = 0xe8080600;
+_memmap_seg_iram0_8_max   = 0xe8080638;
+_memmap_seg_iram0_9_start = 0xe8080638;
+_memmap_seg_iram0_9_max   = 0xe8080640;
+_memmap_seg_iram0_10_start = 0xe8080640;
+_memmap_seg_iram0_10_max   = 0xe8080678;
+_memmap_seg_iram0_11_start = 0xe8080678;
+_memmap_seg_iram0_11_max   = 0xe80806c0;
+_memmap_seg_iram0_12_start = 0xe80806c0;
+_memmap_seg_iram0_12_max   = 0xe80806f8;
+_memmap_seg_iram0_13_start = 0xe80806f8;
+_memmap_seg_iram0_13_max   = 0xe8080700;
+_memmap_seg_iram0_14_start = 0xe8080700;
+_memmap_seg_iram0_14_max   = 0xe8080738;
+_memmap_seg_iram0_15_start = 0xe8080738;
+_memmap_seg_iram0_15_max   = 0xe8080740;
+_memmap_seg_iram0_16_start = 0xe8080740;
+_memmap_seg_iram0_16_max   = 0xe8080778;
+_memmap_seg_iram0_17_start = 0xe8080778;
+_memmap_seg_iram0_17_max   = 0xe80807c0;
+_memmap_seg_iram0_18_start = 0xe80807c0;
+_memmap_seg_iram0_18_max   = 0xe8080800;
+_memmap_seg_iram0_19_start = 0xe8080800;
+_memmap_seg_iram0_19_max   = 0xe808c000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_vecbase_reset = 0xe8080400);
+PROVIDE(_memmap_reset_vector = 0xe8080000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x44000000;
+_memmap_cacheattr_wt_base = 0x11000000;
+_memmap_cacheattr_bp_base = 0x22000000;
+_memmap_cacheattr_unused_mask = 0x00FFFFFF;
+_memmap_cacheattr_wb_trapnull = 0x4422222F;
+_memmap_cacheattr_wba_trapnull = 0x4422222F;
+_memmap_cacheattr_wbna_trapnull = 0x5522222F;
+_memmap_cacheattr_wt_trapnull = 0x1122222F;
+_memmap_cacheattr_bp_trapnull = 0x2222222F;
+_memmap_cacheattr_wb_strict = 0x44FFFFFF;
+_memmap_cacheattr_wt_strict = 0x11FFFFFF;
+_memmap_cacheattr_bp_strict = 0x22FFFFFF;
+_memmap_cacheattr_wb_allvalid = 0x44222222;
+_memmap_cacheattr_wt_allvalid = 0x11222222;
+_memmap_cacheattr_bp_allvalid = 0x22222222;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .vlpd.rodata : ALIGN(4)
+  {
+    _vlpd_rodata_start = ABSOLUTE(.);
+    *(.vlpd.rodata)
+    _vlpd_rodata_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.data : ALIGN(4)
+  {
+    _vlpd_data_start = ABSOLUTE(.);
+    *(.vlpd.data)
+    _vlpd_data_end = ABSOLUTE(.);
+  } >old_vlpd_seg :old_vlpd_phdr
+
+  .vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _vlpd_bss_start = ABSOLUTE(.);
+    *(.vlpd.bss)
+    . = ALIGN (8);
+    _vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_old_vlpd_end = ALIGN(0x8);
+  } >old_vlpd_seg :old_vlpd_bss_phdr
+
+  .efr_fr_hr_vlpd.rodata : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.rodata)
+    _efr_fr_hr_vlpd_rodata_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.data : ALIGN(4)
+  {
+    _efr_fr_hr_vlpd_data_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.data)
+    _efr_fr_hr_vlpd_data_end = ABSOLUTE(.);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_phdr
+
+  .efr_fr_hr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpd.bss)
+    . = ALIGN (8);
+    _efr_fr_hr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpd_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpd_seg :efr_fr_hr_vlpd_bss_phdr
+
+  .amr_vlpd.rodata : ALIGN(4)
+  {
+    _amr_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amr_vlpd.rodata)
+    _amr_vlpd_rodata_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.data : ALIGN(4)
+  {
+    _amr_vlpd_data_start = ABSOLUTE(.);
+    *(.amr_vlpd.data)
+    _amr_vlpd_data_end = ABSOLUTE(.);
+  } >amr_vlpd_seg :amr_vlpd_phdr
+
+  .amr_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amr_vlpd_bss_start = ABSOLUTE(.);
+    *(.amr_vlpd.bss)
+    . = ALIGN (8);
+    _amr_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpd_end = ALIGN(0x8);
+  } >amr_vlpd_seg :amr_vlpd_bss_phdr
+
+  .amrwb_vlpd.rodata : ALIGN(4)
+  {
+    _amrwb_vlpd_rodata_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.rodata)
+    _amrwb_vlpd_rodata_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.data : ALIGN(4)
+  {
+    _amrwb_vlpd_data_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.data)
+    _amrwb_vlpd_data_end = ABSOLUTE(.);
+  } >amrwb_vlpd_seg :amrwb_vlpd_phdr
+
+  .amrwb_vlpd.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_start = ABSOLUTE(.);
+    *(.amrwb_vlpd.bss)
+    . = ALIGN (8);
+    _amrwb_vlpd_bss_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpd_end = ALIGN(0x8);
+  } >amrwb_vlpd_seg :amrwb_vlpd_bss_phdr
+
+  .evrc_evrcb_vlpt.text : ALIGN(4)
+  {
+    _evrc_evrcb_vlpt_text_start = ABSOLUTE(.);
+    *(.evrc_evrcb_vlpt.literal .evrc_evrcb_vlpt.text)
+    _evrc_evrcb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_evrc_evrcb_vlpt_end = ALIGN(0x8);
+  } >evrc_evrcb_vlpt_seg :evrc_evrcb_vlpt_phdr
+
+  .efr_fr_hr_vlpt.text : ALIGN(4)
+  {
+    _efr_fr_hr_vlpt_text_start = ABSOLUTE(.);
+    *(.efr_fr_hr_vlpt.literal .efr_fr_hr_vlpt.text)
+    _efr_fr_hr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_efr_fr_hr_vlpt_end = ALIGN(0x8);
+  } >efr_fr_hr_vlpt_seg :efr_fr_hr_vlpt_phdr
+
+  .amr_vlpt.text : ALIGN(4)
+  {
+    _amr_vlpt_text_start = ABSOLUTE(.);
+    *(.amr_vlpt.literal .amr_vlpt.text)
+    _amr_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amr_vlpt_end = ALIGN(0x8);
+  } >amr_vlpt_seg :amr_vlpt_phdr
+
+  .amrwb_vlpt.text : ALIGN(4)
+  {
+    _amrwb_vlpt_text_start = ABSOLUTE(.);
+    *(.amrwb_vlpt.literal .amrwb_vlpt.text)
+    _amrwb_vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_amrwb_vlpt_end = ALIGN(0x8);
+  } >amrwb_vlpt_seg :amrwb_vlpt_phdr
+
+  .vlpt.text : ALIGN(4)
+  {
+    _vlpt_text_start = ABSOLUTE(.);
+    *(.vlpt.literal .vlpt.text)
+    _vlpt_text_end = ABSOLUTE(.);
+    _memmap_seg_vlpt_end = ALIGN(0x8);
+  } >vlpt_seg :vlpt_phdr
+
+  .low_power_dyn_alloc : ALIGN(4)
+  {
+    _low_power_dyn_alloc_start = ABSOLUTE(.);
+    *(.low_power_dyn_alloc)
+    _low_power_dyn_alloc_end = ABSOLUTE(.);
+    _memmap_seg_vlpd_end = ALIGN(0x8);
+  } >vlpd_seg :vlpd_phdr
+
+  .ulpp.rodata : ALIGN(4)
+  {
+    _ulpp_rodata_start = ABSOLUTE(.);
+    *(.ulpp.rodata)
+    _ulpp_rodata_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.data : ALIGN(4)
+  {
+    _ulpp_data_start = ABSOLUTE(.);
+    *(.ulpp.data)
+    _ulpp_data_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.text : ALIGN(4)
+  {
+    _ulpp_text_start = ABSOLUTE(.);
+    *(.ulpp.literal .ulpp.text)
+    _ulpp_text_end = ABSOLUTE(.);
+  } >ulpp_seg :ulpp_phdr
+
+  .ulpp.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _ulpp_bss_start = ABSOLUTE(.);
+    *(.ulpp.bss)
+    . = ALIGN (8);
+    _ulpp_bss_end = ABSOLUTE(.);
+    _memmap_seg_ulpp_end = ALIGN(0x8);
+  } >ulpp_seg :ulpp_bss_phdr
+
+  .dtsv3.rodata : ALIGN(4)
+  {
+    _dtsv3_rodata_start = ABSOLUTE(.);
+    *(.dtsv3.rodata)
+    _dtsv3_rodata_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.data : ALIGN(4)
+  {
+    _dtsv3_data_start = ABSOLUTE(.);
+    *(.dtsv3.data)
+    _dtsv3_data_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.text : ALIGN(4)
+  {
+    _dtsv3_text_start = ABSOLUTE(.);
+    *(.dtsv3.literal .dtsv3.text)
+    _dtsv3_text_end = ABSOLUTE(.);
+  } >dtsv3_seg :dtsv3_phdr
+
+  .dtsv3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv3_bss_start = ABSOLUTE(.);
+    *(.dtsv3.bss)
+    . = ALIGN (8);
+    _dtsv3_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv3_end = ALIGN(0x8);
+  } >dtsv3_seg :dtsv3_bss_phdr
+
+  .dtsv4.rodata : ALIGN(4)
+  {
+    _dtsv4_rodata_start = ABSOLUTE(.);
+    *(.dtsv4.rodata)
+    _dtsv4_rodata_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.data : ALIGN(4)
+  {
+    _dtsv4_data_start = ABSOLUTE(.);
+    *(.dtsv4.data)
+    _dtsv4_data_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.text : ALIGN(4)
+  {
+    _dtsv4_text_start = ABSOLUTE(.);
+    *(.dtsv4.literal .dtsv4.text)
+    _dtsv4_text_end = ABSOLUTE(.);
+  } >dtsv4_seg :dtsv4_phdr
+
+  .dtsv4.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dtsv4_bss_start = ABSOLUTE(.);
+    *(.dtsv4.bss)
+    . = ALIGN (8);
+    _dtsv4_bss_end = ABSOLUTE(.);
+    _memmap_seg_dtsv4_end = ALIGN(0x8);
+  } >dtsv4_seg :dtsv4_bss_phdr
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.literal : ALIGN(4)
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.om.debug.bss)
+    *(.os.stack.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+  __stack = 0xe8080000;
+  _heap_sentry = 0xe8080000;
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    KEEP (*(.ResetVector.text))
+    _ResetVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_0_end = ALIGN(0x8);
+  } >iram0_0_seg :iram0_0_phdr
+
+  .Reset.literal : ALIGN(4)
+  {
+    _Reset_literal_start = ABSOLUTE(.);
+    *(.Reset.literal)
+    _Reset_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_1_end = ALIGN(0x8);
+  } >iram0_1_seg :iram0_1_phdr
+
+  .WindowVectors.text : ALIGN(4)
+  {
+    _WindowVectors_text_start = ABSOLUTE(.);
+    KEEP (*(.WindowVectors.text))
+    _WindowVectors_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_2_end = ALIGN(0x8);
+  } >iram0_2_seg :iram0_2_phdr
+
+  .Level2InterruptVector.literal : ALIGN(4)
+  {
+    _Level2InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level2InterruptVector.literal)
+    _Level2InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_3_end = ALIGN(0x8);
+  } >iram0_3_seg :iram0_3_phdr
+
+  .Level2InterruptVector.text : ALIGN(4)
+  {
+    _Level2InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level2InterruptVector.text))
+    _Level2InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_4_end = ALIGN(0x8);
+  } >iram0_4_seg :iram0_4_phdr
+
+  .Level3InterruptVector.literal : ALIGN(4)
+  {
+    _Level3InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level3InterruptVector.literal)
+    _Level3InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_5_end = ALIGN(0x8);
+  } >iram0_5_seg :iram0_5_phdr
+
+  .Level3InterruptVector.text : ALIGN(4)
+  {
+    _Level3InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level3InterruptVector.text))
+    _Level3InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_6_end = ALIGN(0x8);
+  } >iram0_6_seg :iram0_6_phdr
+
+  .Level4InterruptVector.literal : ALIGN(4)
+  {
+    _Level4InterruptVector_literal_start = ABSOLUTE(.);
+    *(.Level4InterruptVector.literal)
+    _Level4InterruptVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_7_end = ALIGN(0x8);
+  } >iram0_7_seg :iram0_7_phdr
+
+  .Level4InterruptVector.text : ALIGN(4)
+  {
+    _Level4InterruptVector_text_start = ABSOLUTE(.);
+    KEEP (*(.Level4InterruptVector.text))
+    _Level4InterruptVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_8_end = ALIGN(0x8);
+  } >iram0_8_seg :iram0_8_phdr
+
+  .DebugExceptionVector.literal : ALIGN(4)
+  {
+    _DebugExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DebugExceptionVector.literal)
+    _DebugExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_9_end = ALIGN(0x8);
+  } >iram0_9_seg :iram0_9_phdr
+
+  .DebugExceptionVector.text : ALIGN(4)
+  {
+    _DebugExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DebugExceptionVector.text))
+    _DebugExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_10_end = ALIGN(0x8);
+  } >iram0_10_seg :iram0_10_phdr
+
+  .NMIExceptionVector.literal : ALIGN(4)
+  {
+    _NMIExceptionVector_literal_start = ABSOLUTE(.);
+    *(.NMIExceptionVector.literal)
+    _NMIExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_11_end = ALIGN(0x8);
+  } >iram0_11_seg :iram0_11_phdr
+
+  .NMIExceptionVector.text : ALIGN(4)
+  {
+    _NMIExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.NMIExceptionVector.text))
+    _NMIExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_12_end = ALIGN(0x8);
+  } >iram0_12_seg :iram0_12_phdr
+
+  .KernelExceptionVector.literal : ALIGN(4)
+  {
+    _KernelExceptionVector_literal_start = ABSOLUTE(.);
+    *(.KernelExceptionVector.literal)
+    _KernelExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_13_end = ALIGN(0x8);
+  } >iram0_13_seg :iram0_13_phdr
+
+  .KernelExceptionVector.text : ALIGN(4)
+  {
+    _KernelExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.KernelExceptionVector.text))
+    _KernelExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_14_end = ALIGN(0x8);
+  } >iram0_14_seg :iram0_14_phdr
+
+  .UserExceptionVector.literal : ALIGN(4)
+  {
+    _UserExceptionVector_literal_start = ABSOLUTE(.);
+    *(.UserExceptionVector.literal)
+    _UserExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_15_end = ALIGN(0x8);
+  } >iram0_15_seg :iram0_15_phdr
+
+  .UserExceptionVector.text : ALIGN(4)
+  {
+    _UserExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.UserExceptionVector.text))
+    _UserExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_16_end = ALIGN(0x8);
+  } >iram0_16_seg :iram0_16_phdr
+
+  .DoubleExceptionVector.literal : ALIGN(4)
+  {
+    _DoubleExceptionVector_literal_start = ABSOLUTE(.);
+    *(.DoubleExceptionVector.literal)
+    _DoubleExceptionVector_literal_end = ABSOLUTE(.);
+    _memmap_seg_iram0_17_end = ALIGN(0x8);
+  } >iram0_17_seg :iram0_17_phdr
+
+  .DoubleExceptionVector.text : ALIGN(4)
+  {
+    _DoubleExceptionVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DoubleExceptionVector.text))
+    _DoubleExceptionVector_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_18_end = ALIGN(0x8);
+  } >iram0_18_seg :iram0_18_phdr
+
+  .Reset.text : ALIGN(4)
+  {
+    _Reset_text_start = ABSOLUTE(.);
+    *(.Reset.text)
+    _Reset_text_end = ABSOLUTE(.);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .iram0.text : ALIGN(4)
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+    _memmap_seg_iram0_19_end = ALIGN(0x8);
+  } >iram0_19_seg :iram0_19_phdr
+
+  .sram.shareaddr : ALIGN(4)
+  {
+    _sram_shareaddr_start = ABSOLUTE(.);
+    *(.sram.shareaddr)
+    _sram_shareaddr_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_vlpd_bss_start)
+    LONG(_vlpd_bss_end)
+    LONG(_efr_fr_hr_vlpd_bss_start)
+    LONG(_efr_fr_hr_vlpd_bss_end)
+    LONG(_amr_vlpd_bss_start)
+    LONG(_amr_vlpd_bss_end)
+    LONG(_amrwb_vlpd_bss_start)
+    LONG(_amrwb_vlpd_bss_end)
+    LONG(_ulpp_bss_start)
+    LONG(_ulpp_bss_end)
+    LONG(_dtsv3_bss_start)
+    LONG(_dtsv3_bss_end)
+    LONG(_dtsv4_bss_start)
+    LONG(_dtsv4_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    _sram_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram0_seg :sram0_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    _sram_data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    _data_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .sram.uninit : ALIGN(4)
+  {
+    _sram_uninit_start = ABSOLUTE(.);
+    *(.sram.uninit)
+    _sram_uninit_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram.pool.bss)
+    *(.sram.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_bss_phdr
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xr b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xr
new file mode 100644
index 0000000..3e9f189
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xr
@@ -0,0 +1,42 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP hifi_hikey_lsp */
+/* Linker Script for ld -r or ld -i */
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+}
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xu b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xu
new file mode 100644
index 0000000..d8e1986
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/ldscripts/elf32xtensa.xu
@@ -0,0 +1,42 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP hifi_hikey_lsp */
+/* Linker Script for ld -Ur */
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+}
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/memmap.xmm b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/memmap.xmm
new file mode 100644
index 0000000..c7a94bc
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/memmap.xmm
@@ -0,0 +1,49 @@
+
+
+BEGIN iram0
+0xe8080000: instRam : iram0 : 0xc000 : executable, writable ;
+ iram0_0 : F : 0xe8080000 - 0xe80802ff : .ResetVector.text;
+ iram0_1 : C : 0xe8080300 - 0xe80803ff : .Reset.literal;
+ iram0_2 : F : 0xe8080400 - 0xe8080577 : .WindowVectors.text;
+ iram0_3 : C : 0xe8080578 - 0xe808057f : .Level2InterruptVector.literal;
+ iram0_4 : F : 0xe8080580 - 0xe80805b7 : .Level2InterruptVector.text;
+ iram0_5 : C : 0xe80805b8 - 0xe80805bf : .Level3InterruptVector.literal;
+ iram0_6 : F : 0xe80805c0 - 0xe80805f7 : .Level3InterruptVector.text;
+ iram0_7 : C : 0xe80805f8 - 0xe80805ff : .Level4InterruptVector.literal;
+ iram0_8 : F : 0xe8080600 - 0xe8080637 : .Level4InterruptVector.text;
+ iram0_9 : C : 0xe8080638 - 0xe808063f : .DebugExceptionVector.literal;
+ iram0_10 : F : 0xe8080640 - 0xe8080677 : .DebugExceptionVector.text;
+ iram0_11 : C : 0xe8080678 - 0xe80806bf : .NMIExceptionVector.literal;
+ iram0_12 : F : 0xe80806c0 - 0xe80806f7 : .NMIExceptionVector.text;
+ iram0_13 : C : 0xe80806f8 - 0xe80806ff : .KernelExceptionVector.literal;
+ iram0_14 : F : 0xe8080700 - 0xe8080737 : .KernelExceptionVector.text;
+ iram0_15 : C : 0xe8080738 - 0xe808073f : .UserExceptionVector.literal;
+ iram0_16 : F : 0xe8080740 - 0xe8080777 : .UserExceptionVector.text;
+ iram0_17 : C : 0xe8080778 - 0xe80807bf : .DoubleExceptionVector.literal;
+ iram0_18 : F : 0xe80807c0 - 0xe80807ff : .DoubleExceptionVector.text;
+ iram0_19 : C : 0xe8080800 - 0xe808bfff : .iram0.literal .Reset.text .iram0.text;
+END iram0
+
+BEGIN dram0
+0xe8058000: dataRam : dram0 : 0x28000 : writable ;
+ dram0_0 : C : 0xe8058000 - 0xe807ffff :  STACK :  HEAP : .dram0.rodata .dram0.literal .dram0.data .dram0.bss .om.debug.bss .os.stack.bss;
+END dram0
+
+BEGIN sram
+0xc0000000: sysram : sram : 0x600000 : executable, writable ;
+ sram0 : C : 0xc0000000 - 0xC0407FFF : .sram.shareaddr .sram.rodata .rodata .sram.literal .literal .sram.text .text .sram.data .data .sram.uninit .sram.pool.bss .sram.bss .bss;
+ old_vlpd : C : 0xC0408000 - 0xC0417FFF : .vlpd.rodata .vlpd.data .vlpd.bss;
+ efr_fr_hr_vlpd : C : 0xC0418000 - 0xC0427FFF : .efr_fr_hr_vlpd.rodata .efr_fr_hr_vlpd.data .efr_fr_hr_vlpd.bss;
+ amr_vlpd : C : 0xC0428000 - 0xC0437FFF : .amr_vlpd.rodata .amr_vlpd.data .amr_vlpd.bss;
+ amrwb_vlpd : C : 0xC0438000 - 0xC0447FFF : .amrwb_vlpd.rodata .amrwb_vlpd.data .amrwb_vlpd.bss;
+ evrc_evrcb_vlpt : C : 0xC0448000 - 0xC048FFFF : .evrc_evrcb_vlpt.literal .evrc_evrcb_vlpt.text;
+ efr_fr_hr_vlpt : C : 0xC0490000 - 0xC04BFFFF : .efr_fr_hr_vlpt.literal .efr_fr_hr_vlpt.text;
+ amr_vlpt : C : 0xC04C0000 - 0xC04DFFFF : .amr_vlpt.literal .amr_vlpt.text;
+ amrwb_vlpt : C : 0xC04E0000 -0xC050FFFF : .amrwb_vlpt.literal .amrwb_vlpt.text;
+ vlpt : C : 0xC0510000 - 0xC0557FFF : .vlpt.literal .vlpt.text;
+ vlpd : C : 0xC0558000 - 0xC0577FFF : .low_power_dyn_alloc;
+ ulpp : C : 0xc0578000 - 0xc05b7fff : .ulpp.rodata .ulpp.data .ulpp.literal .ulpp.text .ulpp.bss;
+ dtsv3 : C : 0xc05b8000 - 0xc05d7fff : .dtsv3.rodata .dtsv3.data .dtsv3.literal .dtsv3.text .dtsv3.bss;
+ dtsv4 : C : 0xc05d8000 - 0xc05fffff : .dtsv4.rodata .dtsv4.data .dtsv4.literal .dtsv4.text .dtsv4.bss;
+END sram
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/min-rt.parm b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/min-rt.parm
new file mode 100644
index 0000000..25083ee
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/min-rt.parm
@@ -0,0 +1,15 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// $Id: //depot/rel/Cottonwood/Xtensa/SWConfig/ldscripts/min-rt.parm#1 $
+
+// Customer ID=9470; Build=0x42f97; Copyright (c) 2004-2007 by Tensilica Inc.  ALL RIGHTS RESERVED.
+// These coded instructions, statements, and computer programs are the
+// copyrighted works and confidential proprietary information of Tensilica Inc.
+// They may not be modified, copied, reproduced, distributed, or disclosed to
+// third parties in any manner, medium, or form, in whole or in part, without
+// the prior written consent of Tensilica Inc.
+
+//  Show more details if configuration targets the XT2000 board:
+INCLUDE_XT2000_MEMORIES = try
+RESERVE_SEGMENT_AREA = ".i_ocram.text 0x7800 + 0 start : .d_ocram.data 0x5000 + 0 start"
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/specs b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/specs
new file mode 100644
index 0000000..2988e02
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/specs
@@ -0,0 +1,22 @@
+# Customer ID=9470; Build=0x42f97; Copyright (c) 2001-2010 by Tensilica Inc.  ALL RIGHTS RESERVED.
+# These coded instructions, statements, and computer programs are the
+# copyrighted works and confidential proprietary information of Tensilica Inc.
+# They may not be modified, copied, reproduced, distributed, or disclosed to
+# third parties in any manner, medium, or form, in whole or in part, without
+# the prior written consent of Tensilica Inc.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgloss -lminrt -lc -lhandler-reset -lhandlers-board -lminrt -lhal -lc
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/tag b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/tag
new file mode 100644
index 0000000..7be80f2
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/tag
@@ -0,0 +1,3 @@
+#This file is generated by Xplorer, do not edit.
+#Mon Aug 26 15:41:31 CST 2013
+standardlsp=min-rt
diff --git a/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/user.parm b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/user.parm
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/hifi_hikey_lsp/user.parm
diff --git a/hifi/xaf/hifi-dpf/build_hikey/map_hikey.txt b/hifi/xaf/hifi-dpf/build_hikey/map_hikey.txt
new file mode 100644
index 0000000..58a3efc
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/map_hikey.txt
@@ -0,0 +1,2167 @@
+Archive member included because of file (symbol)
+
+../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o)
+                              objs/hikey/xa-vorbis-decoder.o (xa_vorbis_dec)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(windowspill_asm.o)
+                              objs/hikey/arch_hifi330.o (xthal_window_spill_nw)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o)
+                              objs/hikey/xf-shmem.o (xthal_dcache_region_invalidate)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_writeback.o)
+                              objs/hikey/xf-shmem.o (xthal_dcache_region_writeback)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--hw_configid0.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o) (xthals_hw_configid0)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--hw_configid1.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o) (xthals_hw_configid1)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--release_major.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o) (xthals_release_major)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--release_minor.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o) (xthals_release_minor)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(int_asm--get_intenable.o)
+                              objs/hikey/cpu_c.o (xthal_get_intenable)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(int_asm--set_intenable.o)
+                              objs/hikey/cpu_c.o (xthal_set_intenable)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(state_asm--restore_extra_nw.o)
+                              objs/hikey/arch_hifi330.o (xthal_restore_extra_nw)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(state_asm--save_extra_nw.o)
+                              objs/hikey/arch_hifi330.o (xthal_save_extra_nw)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(ints-on.o)
+                              objs/hikey/xf-main.o (_xtos_ints_on)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(ints-off.o)
+                              objs/hikey/mutex.o (_xtos_ints_off)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(interrupt-table.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(ints-on.o) (_xtos_intstruct)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memchr.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (memchr)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memcmp.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (memcmp)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memcpy.o)
+                              objs/hikey/xf-io.o (memcpy)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memset.o)
+                              objs/hikey/xf-io.o (memset)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-qsort.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (qsort)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-strncmp.o)
+                              objs/hikey/xa-factory.o (strncmp)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_divsi3.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (__divsi3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_modsi3.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (__modsi3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_addsubdf3.o)
+                              objs/hikey/xf-core.o (__adddf3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_muldf3.o)
+                              objs/hikey/dsp_debug.o (__muldf3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_cmpdf2.o)
+                              objs/hikey/dsp_debug.o (__ltdf2)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_fixunsdfsi.o)
+                              objs/hikey/xf-core.o (__fixunsdfsi)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_fixunsdfdi.o)
+                              objs/hikey/dsp_debug.o (__fixunsdfdi)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_floatsidf.o)
+                              objs/hikey/xf-core.o (__floatunsidf)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_floatdidf.o)
+                              objs/hikey/dsp_debug.o (__floatundidf)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_divdi3.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (__divdi3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_udivdi3.o)
+                              objs/hikey/dsp_debug.o (__udivdi3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_umoddi3.o)
+                              objs/hikey/dsp_debug.o (__umoddi3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(vec_memcpy.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (__vec_memcpy)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(vec_memset.o)
+                              ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o) (__vec_memset)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_div_df.o)
+                              objs/hikey/xf-core.o (__divdf3)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_cmn_df.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_div_df.o) (__propagateFloat64NaN)
+/scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_cmn_div.o)
+                              /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_div_df.o) (__estimateDiv64To32)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+sram0_seg        0xc0000000         0x00408000
+old_vlpd_seg     0xc0408000         0x00010000
+efr_fr_hr_vlpd_seg 0xc0418000         0x00010000
+amr_vlpd_seg     0xc0428000         0x00010000
+amrwb_vlpd_seg   0xc0438000         0x00010000
+evrc_evrcb_vlpt_seg 0xc0448000         0x00048000
+efr_fr_hr_vlpt_seg 0xc0490000         0x00030000
+amr_vlpt_seg     0xc04c0000         0x00020000
+amrwb_vlpt_seg   0xc04e0000         0x00030000
+vlpt_seg         0xc0510000         0x00048000
+vlpd_seg         0xc0558000         0x00020000
+ulpp_seg         0xc0578000         0x00040000
+dtsv3_seg        0xc05b8000         0x00020000
+dtsv4_seg        0xc05d8000         0x00028000
+dram0_0_seg      0xe8058000         0x00028000
+iram0_0_seg      0xe8080000         0x00000300
+iram0_1_seg      0xe8080300         0x00000100
+iram0_2_seg      0xe8080400         0x00000178
+iram0_3_seg      0xe8080578         0x00000008
+iram0_4_seg      0xe8080580         0x00000038
+iram0_5_seg      0xe80805b8         0x00000008
+iram0_6_seg      0xe80805c0         0x00000038
+iram0_7_seg      0xe80805f8         0x00000008
+iram0_8_seg      0xe8080600         0x00000038
+iram0_9_seg      0xe8080638         0x00000008
+iram0_10_seg     0xe8080640         0x00000038
+iram0_11_seg     0xe8080678         0x00000048
+iram0_12_seg     0xe80806c0         0x00000038
+iram0_13_seg     0xe80806f8         0x00000008
+iram0_14_seg     0xe8080700         0x00000038
+iram0_15_seg     0xe8080738         0x00000008
+iram0_16_seg     0xe8080740         0x00000038
+iram0_17_seg     0xe8080778         0x00000048
+iram0_18_seg     0xe80807c0         0x00000040
+iram0_19_seg     0xe8080800         0x0000b800
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+LOAD objs/hikey/cpu_c.o
+LOAD objs/hikey/dsp_debug.o
+LOAD objs/hikey/dsp_comm.o
+LOAD objs/hikey/mutex.o
+LOAD objs/hikey/rbtree.o
+LOAD objs/hikey/xf-core.o
+LOAD objs/hikey/xf-io.o
+LOAD objs/hikey/xf-mem.o
+LOAD objs/hikey/xf-msg.o
+LOAD objs/hikey/xf-sched.o
+LOAD objs/hikey/xa-factory.o
+LOAD objs/hikey/xf-shmem.o
+LOAD objs/hikey/tinyvprintf.o
+LOAD objs/hikey/xf-isr.o
+LOAD objs/hikey/gdbstub.o
+LOAD objs/hikey/xa-class-base.o
+LOAD objs/hikey/xa-class-audio-codec.o
+LOAD objs/hikey/xa-class-mixer.o
+LOAD objs/hikey/xf-main.o
+LOAD objs/hikey/xa-pcm.o
+LOAD objs/hikey/xa-vorbis-decoder.o
+LOAD objs/hikey/xa-mixer.o
+LOAD objs/hikey/reset.o
+LOAD objs/hikey/int_vector.o
+LOAD objs/hikey/arch_hifi330.o
+LOAD objs/hikey/gdbstub-entry.o
+LOAD ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a
+LOAD /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a
+LOAD /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a
+LOAD /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a
+LOAD /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a
+                0xe8080000                _memmap_mem_iram0_start = 0xe8080000
+                0xe808c000                _memmap_mem_iram0_end = 0xe808c000
+                0xe8058000                _memmap_mem_dram0_start = 0xe8058000
+                0xe8080000                _memmap_mem_dram0_end = 0xe8080000
+                0xc0000000                _memmap_mem_sram_start = 0xc0000000
+                0xc0600000                _memmap_mem_sram_end = 0xc0600000
+                0xc0000000                _memmap_seg_sram0_start = 0xc0000000
+                0xc0408000                _memmap_seg_sram0_max = 0xc0408000
+                0xc0408000                _memmap_seg_old_vlpd_start = 0xc0408000
+                0xc0418000                _memmap_seg_old_vlpd_max = 0xc0418000
+                0xc0418000                _memmap_seg_efr_fr_hr_vlpd_start = 0xc0418000
+                0xc0428000                _memmap_seg_efr_fr_hr_vlpd_max = 0xc0428000
+                0xc0428000                _memmap_seg_amr_vlpd_start = 0xc0428000
+                0xc0438000                _memmap_seg_amr_vlpd_max = 0xc0438000
+                0xc0438000                _memmap_seg_amrwb_vlpd_start = 0xc0438000
+                0xc0448000                _memmap_seg_amrwb_vlpd_max = 0xc0448000
+                0xc0448000                _memmap_seg_evrc_evrcb_vlpt_start = 0xc0448000
+                0xc0490000                _memmap_seg_evrc_evrcb_vlpt_max = 0xc0490000
+                0xc0490000                _memmap_seg_efr_fr_hr_vlpt_start = 0xc0490000
+                0xc04c0000                _memmap_seg_efr_fr_hr_vlpt_max = 0xc04c0000
+                0xc04c0000                _memmap_seg_amr_vlpt_start = 0xc04c0000
+                0xc04e0000                _memmap_seg_amr_vlpt_max = 0xc04e0000
+                0xc04e0000                _memmap_seg_amrwb_vlpt_start = 0xc04e0000
+                0xc0510000                _memmap_seg_amrwb_vlpt_max = 0xc0510000
+                0xc0510000                _memmap_seg_vlpt_start = 0xc0510000
+                0xc0558000                _memmap_seg_vlpt_max = 0xc0558000
+                0xc0558000                _memmap_seg_vlpd_start = 0xc0558000
+                0xc0578000                _memmap_seg_vlpd_max = 0xc0578000
+                0xc0578000                _memmap_seg_ulpp_start = 0xc0578000
+                0xc05b8000                _memmap_seg_ulpp_max = 0xc05b8000
+                0xc05b8000                _memmap_seg_dtsv3_start = 0xc05b8000
+                0xc05d8000                _memmap_seg_dtsv3_max = 0xc05d8000
+                0xc05d8000                _memmap_seg_dtsv4_start = 0xc05d8000
+                0xc0600000                _memmap_seg_dtsv4_max = 0xc0600000
+                0xe8058000                _memmap_seg_dram0_0_start = 0xe8058000
+                0xe8080000                _memmap_seg_dram0_0_max = 0xe8080000
+                0xe8080000                _memmap_seg_iram0_0_start = 0xe8080000
+                0xe8080300                _memmap_seg_iram0_0_max = 0xe8080300
+                0xe8080300                _memmap_seg_iram0_1_start = 0xe8080300
+                0xe8080400                _memmap_seg_iram0_1_max = 0xe8080400
+                0xe8080400                _memmap_seg_iram0_2_start = 0xe8080400
+                0xe8080578                _memmap_seg_iram0_2_max = 0xe8080578
+                0xe8080578                _memmap_seg_iram0_3_start = 0xe8080578
+                0xe8080580                _memmap_seg_iram0_3_max = 0xe8080580
+                0xe8080580                _memmap_seg_iram0_4_start = 0xe8080580
+                0xe80805b8                _memmap_seg_iram0_4_max = 0xe80805b8
+                0xe80805b8                _memmap_seg_iram0_5_start = 0xe80805b8
+                0xe80805c0                _memmap_seg_iram0_5_max = 0xe80805c0
+                0xe80805c0                _memmap_seg_iram0_6_start = 0xe80805c0
+                0xe80805f8                _memmap_seg_iram0_6_max = 0xe80805f8
+                0xe80805f8                _memmap_seg_iram0_7_start = 0xe80805f8
+                0xe8080600                _memmap_seg_iram0_7_max = 0xe8080600
+                0xe8080600                _memmap_seg_iram0_8_start = 0xe8080600
+                0xe8080638                _memmap_seg_iram0_8_max = 0xe8080638
+                0xe8080638                _memmap_seg_iram0_9_start = 0xe8080638
+                0xe8080640                _memmap_seg_iram0_9_max = 0xe8080640
+                0xe8080640                _memmap_seg_iram0_10_start = 0xe8080640
+                0xe8080678                _memmap_seg_iram0_10_max = 0xe8080678
+                0xe8080678                _memmap_seg_iram0_11_start = 0xe8080678
+                0xe80806c0                _memmap_seg_iram0_11_max = 0xe80806c0
+                0xe80806c0                _memmap_seg_iram0_12_start = 0xe80806c0
+                0xe80806f8                _memmap_seg_iram0_12_max = 0xe80806f8
+                0xe80806f8                _memmap_seg_iram0_13_start = 0xe80806f8
+                0xe8080700                _memmap_seg_iram0_13_max = 0xe8080700
+                0xe8080700                _memmap_seg_iram0_14_start = 0xe8080700
+                0xe8080738                _memmap_seg_iram0_14_max = 0xe8080738
+                0xe8080738                _memmap_seg_iram0_15_start = 0xe8080738
+                0xe8080740                _memmap_seg_iram0_15_max = 0xe8080740
+                0xe8080740                _memmap_seg_iram0_16_start = 0xe8080740
+                0xe8080778                _memmap_seg_iram0_16_max = 0xe8080778
+                0xe8080778                _memmap_seg_iram0_17_start = 0xe8080778
+                0xe80807c0                _memmap_seg_iram0_17_max = 0xe80807c0
+                0xe80807c0                _memmap_seg_iram0_18_start = 0xe80807c0
+                0xe8080800                _memmap_seg_iram0_18_max = 0xe8080800
+                0xe8080800                _memmap_seg_iram0_19_start = 0xe8080800
+                0xe808c000                _memmap_seg_iram0_19_max = 0xe808c000
+                0x00000000                _rom_store_table = 0x0
+                0xe8080400                PROVIDE (_memmap_vecbase_reset, 0xe8080400)
+                0xe8080000                PROVIDE (_memmap_reset_vector, 0xe8080000)
+                0x44000000                _memmap_cacheattr_wb_base = 0x44000000
+                0x11000000                _memmap_cacheattr_wt_base = 0x11000000
+                0x22000000                _memmap_cacheattr_bp_base = 0x22000000
+                0x00ffffff                _memmap_cacheattr_unused_mask = 0xffffff
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+                0x44222222                _memmap_cacheattr_wb_allvalid = 0x44222222
+                0x11222222                _memmap_cacheattr_wt_allvalid = 0x11222222
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+
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+ *(.vlpd.data)
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+ *(.vlpd.bss)
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+                0xc0408000                _memmap_seg_old_vlpd_end = ALIGN (0x8)
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+
+.efr_fr_hr_vlpd.data
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+ *(.efr_fr_hr_vlpd.data)
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+ *(.efr_fr_hr_vlpd.bss)
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+                0xc0418000                _memmap_seg_efr_fr_hr_vlpd_end = ALIGN (0x8)
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+ *(.amr_vlpd.rodata)
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+ *(.amr_vlpd.data)
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+                0xc0428000                . = ALIGN (0x8)
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+ *(.amr_vlpd.bss)
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+                0xc0428000                _amr_vlpd_bss_end = ABSOLUTE (.)
+                0xc0428000                _memmap_seg_amr_vlpd_end = ALIGN (0x8)
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+ *(.amrwb_vlpd.rodata)
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+
+.amrwb_vlpd.data
+                0xc0438000        0x0
+                0xc0438000                _amrwb_vlpd_data_start = ABSOLUTE (.)
+ *(.amrwb_vlpd.data)
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+.amrwb_vlpd.bss
+                0xc0438000        0x0
+                0xc0438000                . = ALIGN (0x8)
+                0xc0438000                _amrwb_vlpd_bss_start = ABSOLUTE (.)
+ *(.amrwb_vlpd.bss)
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+                0xc0438000                _amrwb_vlpd_bss_end = ABSOLUTE (.)
+                0xc0438000                _memmap_seg_amrwb_vlpd_end = ALIGN (0x8)
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+                0xc0448000        0x0
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+ *(.evrc_evrcb_vlpt.literal .evrc_evrcb_vlpt.text)
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+                0xc0448000                _memmap_seg_evrc_evrcb_vlpt_end = ALIGN (0x8)
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+ *(.efr_fr_hr_vlpt.literal .efr_fr_hr_vlpt.text)
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+                0xc0490000                _memmap_seg_efr_fr_hr_vlpt_end = ALIGN (0x8)
+
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+                0xc04c0000                _amr_vlpt_text_start = ABSOLUTE (.)
+ *(.amr_vlpt.literal .amr_vlpt.text)
+                0xc04c0000                _amr_vlpt_text_end = ABSOLUTE (.)
+                0xc04c0000                _memmap_seg_amr_vlpt_end = ALIGN (0x8)
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+                0xc04e0000        0x0
+                0xc04e0000                _amrwb_vlpt_text_start = ABSOLUTE (.)
+ *(.amrwb_vlpt.literal .amrwb_vlpt.text)
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+                0xc04e0000                _memmap_seg_amrwb_vlpt_end = ALIGN (0x8)
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+                0xc0510000                _vlpt_text_start = ABSOLUTE (.)
+ *(.vlpt.literal .vlpt.text)
+                0xc0510000                _vlpt_text_end = ABSOLUTE (.)
+                0xc0510000                _memmap_seg_vlpt_end = ALIGN (0x8)
+
+.low_power_dyn_alloc
+                0xc0558000        0x0
+                0xc0558000                _low_power_dyn_alloc_start = ABSOLUTE (.)
+ *(.low_power_dyn_alloc)
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+                0xc0558000                _memmap_seg_vlpd_end = ALIGN (0x8)
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+                0xc0578000                _ulpp_rodata_start = ABSOLUTE (.)
+ *(.ulpp.rodata)
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+                0xc0578000                _ulpp_data_start = ABSOLUTE (.)
+ *(.ulpp.data)
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+                0xc0578000                _ulpp_text_start = ABSOLUTE (.)
+ *(.ulpp.literal .ulpp.text)
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+                0xc0578000                . = ALIGN (0x8)
+                0xc0578000                _ulpp_bss_start = ABSOLUTE (.)
+ *(.ulpp.bss)
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+                0xc0578000                _ulpp_bss_end = ABSOLUTE (.)
+                0xc0578000                _memmap_seg_ulpp_end = ALIGN (0x8)
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+                0xc05b8000                _dtsv3_rodata_start = ABSOLUTE (.)
+ *(.dtsv3.rodata)
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+                0xc05b8000                _dtsv3_data_start = ABSOLUTE (.)
+ *(.dtsv3.data)
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+
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+                0xc05b8000                _dtsv3_text_start = ABSOLUTE (.)
+ *(.dtsv3.literal .dtsv3.text)
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+                0xc05b8000                . = ALIGN (0x8)
+                0xc05b8000                _dtsv3_bss_start = ABSOLUTE (.)
+ *(.dtsv3.bss)
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+                0xc05b8000                _dtsv3_bss_end = ABSOLUTE (.)
+                0xc05b8000                _memmap_seg_dtsv3_end = ALIGN (0x8)
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+                0xc05d8000                _dtsv4_rodata_start = ABSOLUTE (.)
+ *(.dtsv4.rodata)
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+
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+                0xc05d8000                _dtsv4_data_start = ABSOLUTE (.)
+ *(.dtsv4.data)
+                0xc05d8000                _dtsv4_data_end = ABSOLUTE (.)
+
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+                0xc05d8000                _dtsv4_text_start = ABSOLUTE (.)
+ *(.dtsv4.literal .dtsv4.text)
+                0xc05d8000                _dtsv4_text_end = ABSOLUTE (.)
+
+.dtsv4.bss      0xc05d8000        0x0
+                0xc05d8000                . = ALIGN (0x8)
+                0xc05d8000                _dtsv4_bss_start = ABSOLUTE (.)
+ *(.dtsv4.bss)
+                0xc05d8000                . = ALIGN (0x8)
+                0xc05d8000                _dtsv4_bss_end = ABSOLUTE (.)
+                0xc05d8000                _memmap_seg_dtsv4_end = ALIGN (0x8)
+
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+                0xe8058000                _dram0_rodata_start = ABSOLUTE (.)
+ *(.dram0.rodata)
+ *(.dram.rodata)
+                0xe8058000                _dram0_rodata_end = ABSOLUTE (.)
+
+.dram0.literal  0xe8058000        0x0
+                0xe8058000                _dram0_literal_start = ABSOLUTE (.)
+ *(.dram0.literal)
+ *(.dram.literal)
+                0xe8058000                _dram0_literal_end = ABSOLUTE (.)
+
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+                0xe8058000                _dram0_data_start = ABSOLUTE (.)
+ *(.dram0.data)
+ .dram0.data    0xe8058000       0x50 objs/hikey/int_vector.o
+                0xe8058030                g_awVosCoprocOwnerSa
+                0xe8058038                g_strVosPanicMessage
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+ *(.dram.data)
+                0xe8058051                _dram0_data_end = ABSOLUTE (.)
+
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+                0xe8058058                . = ALIGN (0x8)
+                0xe8058058                _dram0_bss_start = ABSOLUTE (.)
+ *(.dram0.bss)
+ *(.om.debug.bss)
+ *(.os.stack.bss)
+                0xe8058058                . = ALIGN (0x8)
+                0xe8058058                _dram0_bss_end = ABSOLUTE (.)
+                0xe8058058                _end = ALIGN (0x8)
+                0xe8058058                PROVIDE (end, ALIGN (0x8))
+                0xe8058058                _stack_sentry = ALIGN (0x8)
+                0xe8058058                _memmap_seg_dram0_0_end = ALIGN (0x8)
+                0xe8080000                __stack = 0xe8080000
+                0xe8080000                _heap_sentry = 0xe8080000
+
+.ResetVector.text
+                0xe8080000        0x3
+                0xe8080000                _ResetVector_text_start = ABSOLUTE (.)
+ *(.ResetVector.text)
+ .ResetVector.text
+                0xe8080000        0x3 objs/hikey/reset.o
+                0xe8080000                _ResetVector
+                0xe8080003                _ResetVector_text_end = ABSOLUTE (.)
+                0xe8080008                _memmap_seg_iram0_0_end = ALIGN (0x8)
+
+.Reset.literal  0xe8080300       0x40
+                0xe8080300                _Reset_literal_start = ABSOLUTE (.)
+ *(.Reset.literal)
+ .Reset.literal
+                0xe8080300       0x40 objs/hikey/reset.o
+                0xe8080340                _Reset_literal_end = ABSOLUTE (.)
+                0xe8080340                _memmap_seg_iram0_1_end = ALIGN (0x8)
+
+.WindowVectors.text
+                0xe8080400      0x16a
+                0xe8080400                _WindowVectors_text_start = ABSOLUTE (.)
+ *(.WindowVectors.text)
+ .WindowVectors.text
+                0xe8080400      0x16a objs/hikey/int_vector.o
+                0xe8080400                _WindowOverflow4
+                0xe8080440                _WindowUnderflow4
+                0xe8080450                OS_AllocaException
+                0xe8080480                _WindowOverflow8
+                0xe80804c0                _WindowUnderflow8
+                0xe8080500                _WindowOverflow12
+                0xe8080540                _WindowUnderflow12
+                0xe808056a                _WindowVectors_text_end = ABSOLUTE (.)
+                0xe8080570                _memmap_seg_iram0_2_end = ALIGN (0x8)
+
+.Level2InterruptVector.literal
+                0xe8080578        0x0
+                0xe8080578                _Level2InterruptVector_literal_start = ABSOLUTE (.)
+ *(.Level2InterruptVector.literal)
+ .Level2InterruptVector.literal
+                0xe8080578        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe8080578                _Level2InterruptVector_literal_end = ABSOLUTE (.)
+                0xe8080578                _memmap_seg_iram0_3_end = ALIGN (0x8)
+
+.Level2InterruptVector.text
+                0xe8080580        0x6
+                0xe8080580                _Level2InterruptVector_text_start = ABSOLUTE (.)
+ *(.Level2InterruptVector.text)
+ .Level2InterruptVector.text
+                0xe8080580        0x6 objs/hikey/int_vector.o
+                                  0x9 (size before relaxing)
+                0xe8080580                OS_Level2Vector
+                0xe8080586                _Level2InterruptVector_text_end = ABSOLUTE (.)
+                0xe8080588                _memmap_seg_iram0_4_end = ALIGN (0x8)
+
+.Level3InterruptVector.literal
+                0xe80805b8        0x0
+                0xe80805b8                _Level3InterruptVector_literal_start = ABSOLUTE (.)
+ *(.Level3InterruptVector.literal)
+ .Level3InterruptVector.literal
+                0xe80805b8        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe80805b8                _Level3InterruptVector_literal_end = ABSOLUTE (.)
+                0xe80805b8                _memmap_seg_iram0_5_end = ALIGN (0x8)
+
+.Level3InterruptVector.text
+                0xe80805c0        0x6
+                0xe80805c0                _Level3InterruptVector_text_start = ABSOLUTE (.)
+ *(.Level3InterruptVector.text)
+ .Level3InterruptVector.text
+                0xe80805c0        0x6 objs/hikey/int_vector.o
+                                  0x9 (size before relaxing)
+                0xe80805c0                OS_Level3Vector
+                0xe80805c6                _Level3InterruptVector_text_end = ABSOLUTE (.)
+                0xe80805c8                _memmap_seg_iram0_6_end = ALIGN (0x8)
+
+.Level4InterruptVector.literal
+                0xe80805f8        0x0
+                0xe80805f8                _Level4InterruptVector_literal_start = ABSOLUTE (.)
+ *(.Level4InterruptVector.literal)
+                0xe80805f8                _Level4InterruptVector_literal_end = ABSOLUTE (.)
+                0xe80805f8                _memmap_seg_iram0_7_end = ALIGN (0x8)
+
+.Level4InterruptVector.text
+                0xe8080600        0x0
+                0xe8080600                _Level4InterruptVector_text_start = ABSOLUTE (.)
+ *(.Level4InterruptVector.text)
+                0xe8080600                _Level4InterruptVector_text_end = ABSOLUTE (.)
+                0xe8080600                _memmap_seg_iram0_8_end = ALIGN (0x8)
+
+.DebugExceptionVector.literal
+                0xe8080638        0x0
+                0xe8080638                _DebugExceptionVector_literal_start = ABSOLUTE (.)
+ *(.DebugExceptionVector.literal)
+ .DebugExceptionVector.literal
+                0xe8080638        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe8080638                _DebugExceptionVector_literal_end = ABSOLUTE (.)
+                0xe8080638                _memmap_seg_iram0_9_end = ALIGN (0x8)
+
+.DebugExceptionVector.text
+                0xe8080640       0x16
+                0xe8080640                _DebugExceptionVector_text_start = ABSOLUTE (.)
+ *(.DebugExceptionVector.text)
+ .DebugExceptionVector.text
+                0xe8080640        0x9 objs/hikey/int_vector.o
+                                  0xc (size before relaxing)
+                0xe8080640                OS_DebugExceptionVector
+ *fill*         0xe8080649        0x3 
+ .DebugExceptionVector.text
+                0xe808064c        0xa objs/hikey/gdbstub-entry.o
+                0xe808064c                DebugExceptionVector
+                0xe8080656                _DebugExceptionVector_text_end = ABSOLUTE (.)
+                0xe8080658                _memmap_seg_iram0_10_end = ALIGN (0x8)
+
+.NMIExceptionVector.literal
+                0xe8080678        0x8
+                0xe8080678                _NMIExceptionVector_literal_start = ABSOLUTE (.)
+ *(.NMIExceptionVector.literal)
+ .NMIExceptionVector.literal
+                0xe8080678        0x8 objs/hikey/int_vector.o
+                0xe8080680                _NMIExceptionVector_literal_end = ABSOLUTE (.)
+                0xe8080680                _memmap_seg_iram0_11_end = ALIGN (0x8)
+
+.NMIExceptionVector.text
+                0xe80806c0       0x1b
+                0xe80806c0                _NMIExceptionVector_text_start = ABSOLUTE (.)
+ *(.NMIExceptionVector.text)
+ .NMIExceptionVector.text
+                0xe80806c0       0x1b objs/hikey/int_vector.o
+                0xe80806c0                OS_NMIExceptionVector
+                0xe80806db                _NMIExceptionVector_text_end = ABSOLUTE (.)
+                0xe80806e0                _memmap_seg_iram0_12_end = ALIGN (0x8)
+
+.KernelExceptionVector.literal
+                0xe80806f8        0x0
+                0xe80806f8                _KernelExceptionVector_literal_start = ABSOLUTE (.)
+ *(.KernelExceptionVector.literal)
+ .KernelExceptionVector.literal
+                0xe80806f8        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe80806f8                _KernelExceptionVector_literal_end = ABSOLUTE (.)
+                0xe80806f8                _memmap_seg_iram0_13_end = ALIGN (0x8)
+
+.KernelExceptionVector.text
+                0xe8080700        0x6
+                0xe8080700                _KernelExceptionVector_text_start = ABSOLUTE (.)
+ *(.KernelExceptionVector.text)
+ .KernelExceptionVector.text
+                0xe8080700        0x6 objs/hikey/int_vector.o
+                                  0x9 (size before relaxing)
+                0xe8080700                OS_KernelExceptionVector
+                0xe8080706                _KernelExceptionVector_text_end = ABSOLUTE (.)
+                0xe8080708                _memmap_seg_iram0_14_end = ALIGN (0x8)
+
+.UserExceptionVector.literal
+                0xe8080738        0x0
+                0xe8080738                _UserExceptionVector_literal_start = ABSOLUTE (.)
+ *(.UserExceptionVector.literal)
+ .UserExceptionVector.literal
+                0xe8080738        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe8080738                _UserExceptionVector_literal_end = ABSOLUTE (.)
+                0xe8080738                _memmap_seg_iram0_15_end = ALIGN (0x8)
+
+.UserExceptionVector.text
+                0xe8080740        0x6
+                0xe8080740                _UserExceptionVector_text_start = ABSOLUTE (.)
+ *(.UserExceptionVector.text)
+ .UserExceptionVector.text
+                0xe8080740        0x6 objs/hikey/int_vector.o
+                                  0x9 (size before relaxing)
+                0xe8080740                OS_UserExceptionVector
+                0xe8080746                _UserExceptionVector_text_end = ABSOLUTE (.)
+                0xe8080748                _memmap_seg_iram0_16_end = ALIGN (0x8)
+
+.DoubleExceptionVector.literal
+                0xe8080778        0x0
+                0xe8080778                _DoubleExceptionVector_literal_start = ABSOLUTE (.)
+ *(.DoubleExceptionVector.literal)
+ .DoubleExceptionVector.literal
+                0xe8080778        0x0 objs/hikey/int_vector.o
+                                  0x4 (size before relaxing)
+                0xe8080778                _DoubleExceptionVector_literal_end = ABSOLUTE (.)
+                0xe8080778                _memmap_seg_iram0_17_end = ALIGN (0x8)
+
+.DoubleExceptionVector.text
+                0xe80807c0        0x6
+                0xe80807c0                _DoubleExceptionVector_text_start = ABSOLUTE (.)
+ *(.DoubleExceptionVector.text)
+ .DoubleExceptionVector.text
+                0xe80807c0        0x6 objs/hikey/int_vector.o
+                                  0x9 (size before relaxing)
+                0xe80807c0                OS_DoubleExceptionVector
+                0xe80807c6                _DoubleExceptionVector_text_end = ABSOLUTE (.)
+                0xe80807c8                _memmap_seg_iram0_18_end = ALIGN (0x8)
+
+.Reset.text     0xe8080800      0x23d
+                0xe8080800                _Reset_text_start = ABSOLUTE (.)
+ *(.Reset.text)
+ .Reset.text    0xe8080800      0x23d objs/hikey/reset.o
+                0xe8080800                _Reset
+                0xe8080a3d                _Reset_text_end = ABSOLUTE (.)
+
+.iram0.text     0xe8080a40      0x600
+                0xe8080a40                _iram0_text_start = ABSOLUTE (.)
+ *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+ .iram0.literal
+                0xe8080a40       0x44 objs/hikey/int_vector.o
+                                 0x88 (size before relaxing)
+ .iram0.literal
+                0xe8080a84       0x2c objs/hikey/arch_hifi330.o
+                                 0x58 (size before relaxing)
+ .iram0.text    0xe8080ab0      0x3b4 objs/hikey/int_vector.o
+                                0x3c0 (size before relaxing)
+                0xe8080ab0                OS_Panic
+                0xe8080ad0                OS_UserExc
+                0xe8080b68                OS_UserExit
+                0xe8080dc4                OS_Medint2Exit
+                0xe8080e50                OS_Medint3Exit
+ .iram0.text    0xe8080e64      0x1dc objs/hikey/arch_hifi330.o
+                0xe8080e64                VOSStartHighRdy
+                0xe8080e7c                VOSCtxSw
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+ .xtensa.info   0x00000000        0x0 objs/hikey/xf-sched.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-factory.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xf-shmem.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/tinyvprintf.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xf-isr.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/gdbstub.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-class-base.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-class-audio-codec.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-class-mixer.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xf-main.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-pcm.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-vorbis-decoder.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/xa-mixer.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/reset.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/int_vector.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/arch_hifi330.o
+ .xtensa.info   0x00000000        0x0 objs/hikey/gdbstub-entry.o
+ .xtensa.info   0x00000000        0x0 ../plugins/cadence/vorbis_dec/lib/hifi3/xa_vorbis_dec.a(xa_vorbis_dec.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(windowspill_asm.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_invalidate.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--dcache_region_writeback.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--hw_configid0.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--hw_configid1.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--release_major.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(cache_asm--release_minor.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(int_asm--get_intenable.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(int_asm--set_intenable.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(state_asm--restore_extra_nw.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhal.a(state_asm--save_extra_nw.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(ints-on.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(ints-off.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/arch/lib//libhandlers-board.a(interrupt-table.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memchr.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memcmp.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memcpy.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-memset.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-qsort.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib//libc.a(lib_a-strncmp.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_divsi3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_modsi3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_addsubdf3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_muldf3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_cmpdf2.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_fixunsdfsi.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_fixunsdfdi.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_floatsidf.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_floatdidf.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_divdi3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_udivdi3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(_umoddi3.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(vec_memcpy.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(vec_memset.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_div_df.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_cmn_df.o)
+ .xtensa.info   0x00000000        0x0 /scratch/speacial_projects/sof-sdk/xtensa_tools/tools/XtDevTools/install/builds/RG-2017.5-linux/hifi3_hikey960/xtensa-elf/lib/xcc//libgcc.a(softfloat_cmn_div.o)
+
+.debug.xt.callgraph
+ *(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*)
+OUTPUT(objs/hikey/xa_hikey.o elf32-xtensa-le)
+
+.debug_ranges   0x00000000       0x98
+ .debug_ranges  0x00000000       0x20 objs/hikey/reset.o
+ .debug_ranges  0x00000020       0x58 objs/hikey/int_vector.o
+ .debug_ranges  0x00000078       0x20 objs/hikey/gdbstub-entry.o
diff --git a/hifi/xaf/hifi-dpf/build_hikey/tools/elftobin.sh b/hifi/xaf/hifi-dpf/build_hikey/tools/elftobin.sh
new file mode 100755
index 0000000..cebe6bf
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/tools/elftobin.sh
@@ -0,0 +1,94 @@
+#!/bin/bash
+
+if [ $# != 2 ]
+then
+echo "elftobin.sh <input_elf_file> <output_img_file>"
+exit
+fi
+
+if [ $XTENSA_CORE == "" ]
+then 
+echo "XTENSA_CORE is not set"
+exit
+fi
+
+if [ $XTENSA_SYSTEM == "" ]
+then 
+echo "XTENSA_SYSTEM is not set"
+exit
+fi
+
+export INPUT_ELF_FILE=$1
+export OUTPUT_BIN_FILE=__hikey_temp.bin
+export OUTPUT_IMG_FILE=$2
+export OP_DIR=./
+
+xt-objdump -h $INPUT_ELF_FILE > __elfdump
+less __elfdump | sed -n '/ALLOC/{g;1!p;};h' > __header
+less __header | awk '{print $2 " " $3 " " $4}' > __proc
+
+sections=`less __proc | cut -f1 -d' ' | tr '\n' ',' | sed 's/\,$//g'`
+SECTION_NUM=`awk 'END {print NR}' __proc`
+echo "Total number of sections are $SECTION_NUM"
+#sections=(".dram0.data" ".ResetVector.text" ".Reset.literal" ".WindowVectors.text" ".Level2InterruptVector.literal" ".Level2InterruptVector.text" ".Level3InterruptVector.literal" ".Level3InterruptVector.text" ".DebugExceptionVector.literal" ".DebugExceptionVector.text" ".NMIExceptionVector.literal" ".NMIExceptionVector.text" ".KernelExceptionVector.literal" ".KernelExceptionVector.text" ".UserExceptionVector.literal" ".UserExceptionVector.text" ".DoubleExceptionVector.literal" ".DoubleExceptionVector.text" ".Reset.text" ".iram0.text" ".rodata" ".text" ".data" ".bss")
+#dst_addr=("0xe8058000" "0xe8080000" "0xe8080300" "0xe8080400" "0xe8080578" "0xe8080580" "0xe80805b8" "0xe80805c0" "0xe8080638" "0xe8080640" "0xe8080678" "0xe80806c0" "0xe80806f8" "0xe8080700" "0xe8080738" "0xe8080740" "0xe8080778" "0xe80807c0" "0xe8080800" "0xe8080a44" "0xc0000000" "0xc0000cc8" "0xc00025c0" "0xc0002a20")
+
+ID_Sec=("0x01010000" "0x01000001" "0x01000002" "0x01000003" "0x01000004" "0x01000005" "0x01000006" "0x01000007" "0x01000008" "0x01000009" "0x0100000A" "0x0100000B" "0x0100000C" "0x0100000D" "0x0100000E" "0x0100000F" "0x01000010" "0x01000011" "0x01000012" "0x01000013" "0x00000014" "0x00000015" "0x00010016" "0x00020017")
+
+head -c "4" /dev/zero > __zero.bin
+
+i=0
+for j in `seq 1 $SECTION_NUM`
+do
+	VAR=`less __proc | awk 'FNR == "'"$j"'" {print $1}'`
+	VARBIN=`echo "$VAR" | sed 's/^./__/' | sed "s/\..*//" | sed 's/$/.bin/' `
+	#echo "section: $VAR  $VARBIN"
+	xt-objcopy $INPUT_ELF_FILE -O binary --only-section $VAR $VARBIN
+
+	size_sec[${i}]=$(cat $VARBIN | wc -c)
+	#echo "size : ${size_sec[${i}]}"
+    mod0=`expr ${size_sec[${i}]} % 4`
+    nbytes=`expr 4 - $mod0`
+	if [ "$nbytes" -ne "4" ] ; then
+		tail -c $nbytes __zero.bin >> $VARBIN
+		size_sec[$i]=`expr ${size_sec[${i}]} + $nbytes`
+	fi
+	cat $VARBIN >> $OUTPUT_BIN_FILE		
+	i=`expr $i + 1`;
+done
+cd $OP_DIR
+
+tmp1=$(cat $OUTPUT_BIN_FILE | wc -c)
+total_sections=$SECTION_NUM
+main_header_size=32
+section_header_size=16
+size_total_img=`expr $main_header_size + $tmp1 + $total_sections \* $section_header_size`
+current_date_time=`date "+%Y/%m/%d %H:%M:%S"`
+echo "HIF:$current_date_time" > $OUTPUT_IMG_FILE
+
+printf "0: %.8x" $size_total_img | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+printf "0: %.8x" $total_sections | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+
+cnt1=`expr $main_header_size + $total_sections \* $section_header_size`
+i=0
+for j in `seq 1 $SECTION_NUM`
+do
+	DST_ADDR=`less __proc | awk 'FNR == "'"$j"'" {print $3}'`
+	printf "0: %.8x" ${ID_Sec[${i}]} | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+	printf "0: %.8x" $cnt1 | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+	printf "0: %.8x" 0x$DST_ADDR | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+	printf "0: %.8x" ${size_sec[${i}]} | sed -e 's/0\: \(..\)\(..\)\(..\)\(..\)/0\: \4\3\2\1/' | xxd -r -g0 >> $OUTPUT_IMG_FILE
+	cnt_prev=$cnt1
+	cnt1=`expr ${size_sec[${i}]} + $cnt_prev`
+	i=`expr $i + 1`
+done
+
+cat $OUTPUT_BIN_FILE >> $OUTPUT_IMG_FILE                        
+rm $OUTPUT_BIN_FILE
+rm __*.bin
+rm __proc
+rm __elfdump
+rm __header
+
+echo "elftobin successful!"
+
diff --git a/hifi/xaf/hifi-dpf/build_hikey/xa_hikey.img b/hifi/xaf/hifi-dpf/build_hikey/xa_hikey.img
new file mode 100644
index 0000000..4c16652
--- /dev/null
+++ b/hifi/xaf/hifi-dpf/build_hikey/xa_hikey.img
Binary files differ