AE_ADD32S — 2-way 32-bit signed, saturating addition

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_ADD32S 1000000000010010 1111
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae2_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_ADD32S 1101 1100 0001
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_ADD32S 11101000
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_ADD32S 01000000 0100
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_ADD32S 11101000
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_ADD32S 0010100
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Assembler Syntax

AE_ADD32S aed0..15(ae_arth_v), aed0..15(ae_arth_v0), aed0..15(ae_arth_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_f32x2 AE_ADD32S(ae_f32x2 d0, ae_f32x2 d1);

Description

AE_ADD32S is an element-wise, signed, 32-bit saturating addition of two AE_DR registers d0 and d1. The result placed in d is { sat(d0[63:32] + d1[63:32]) , sat(d0[31:0] + d1[31:0]) }.

In case of saturation, state AE_OVERFLOW is set to 1.

Implementation Pipeline

In Out
AE_OVERFLOW Wstage, ae_arth_v0 Mstage, ae_arth_v1 Mstage AE_OVERFLOW Wstage, ae_arth_v Mstage

Protos that use AE_ADD32S

proto AE_ADD32S { out ae_f32x2 d, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_ADD32S d, d0, d1;
}
proto AE_ADD32S_scalar { out int32 d, in int32 d0, in ae_int32 d1 }{ae_int32 t, ae_int32 t2}{
AE_MOVDA32 t, d0;
AE_ADD32S t2, t, d1;
AE_MOVAD32.L d, t2;
}
proto AE_F32X2_ADDS_F32 { out ae_f32x2 d, in ae_f32x2 d0, in ae_f32 d1 }{}{
AE_ADD32S d, d0, d1;
}
proto AE_F32X2_ADDS_F32X2 { out ae_f32x2 d, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_ADD32S d, d0, d1;
}
proto AE_F32X2_RADD { out int32 a, in ae_f32x2 d0 }{ae_f32 t, ae_f32 t2}{
AE_SEL16I t, d0, d0, 0;
AE_ADD32S t2, t, d0;
AE_MOVAD32.L a, t2;
}
proto AE_F32X4_ADD { out ae_f32x4 d, in ae_f32x4 d0, in ae_f32x4 d1 }{}{
AE_ADD32S d->d0, d0->d0, d1->d0;
AE_ADD32S d->d1, d0->d1, d1->d1;
}
proto AE_F32X4_RADD { out int32 a, in ae_f32x4 d0 }{ae_f32x2 t0, ae_f32x2 t, ae_f32x2 t2}{
AE_ADD32S t0, d0->d1, d0->d0;
AE_SEL16I t, t0, t0, 0;
AE_ADD32S t2, t, t0;
AE_MOVAD32.L a, t2;
}
proto AE_F32_ADDS_F32 { out ae_f32 d, in ae_f32 d0, in ae_f32 d1 }{}{
AE_ADD32S d, d0, d1;
}
proto AE_F32_ADDS_F32X2 { out ae_f32x2 d, in ae_f32 d0, in ae_f32x2 d1 }{}{
AE_ADD32S d, d0, d1;
}
proto AE_INT32X2_ADD32S { out ae_int32x2 p, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_ADD32S p, d0, d1;
}
proto AE_INT32X4_ADD32S { out ae_int32x4 p, in ae_int32x4 d0, in ae_int32x4 d1 }{}{
AE_ADD32S p->d0, d0->d0, d1->d0;
AE_ADD32S p->d1, d0->d1, d1->d1;
}
proto AE_RLadd4_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x4 d0 }{ae_int32x2 t, ae_int32 t2, ae_int32 t3, ae_int32x2 t_1, ae_int32 t4}{
AE_SEL16I t, d0->d1, d0->d1, 0;
AE_ADD32S t2, din, t;
AE_ADD32S t3, t2, d0->d1;
AE_SEL16I t_1, d0->d0, d0->d0, 0;
AE_ADD32S t4, t3, t_1;
AE_ADD32S dout, t4, d0->d0;
}
proto AE_RLadd_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x2 d0 }{ae_int32x2 t, ae_int32 t2}{
AE_SEL16I t, d0, d0, 0;
AE_ADD32S t2, din, t;
AE_ADD32S dout, t2, d0;
}