ADDI.N — Narrow Add Immediate

Instruction Word

Slot
Inst16a
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x16a - 16 bit(s) 10
ADDI.N 1011
r 3210
s 3210
t 3210

Assembler Syntax

ADDI.N ar, as, imm

C Syntax

#include <xtensa/tie/xt_density.h>

extern int XT_ADDI_N(int s, immediate i);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

ADDI.N is similar to ADDI, but has a 16-bit encoding and supports a smaller range of immediate operand values encoded in the instruction word.

ADDI.N calculates the two's complement 32-bit sum of address register as and an operand encoded in the t field. The low 32 bits of the sum are written to address register ar. Arithmetic overflow is not detected.

The operand encoded in the instruction can be -1 or one to 15. If t is zero, then a value of -1 is used, otherwise the value is the zero-extension of t.

Operation

AR[r] ← AR[s] + (if t = 04 then 132 else 028||t)

Exceptions

EveryInstR Group (see EveryInstR Group:)

Implementation Pipeline

In Out
ars Estage arr Estage

Protos that use ADDI.N

proto ADDI.N { out int32 r, in int32 s, in immediate i }{}{
ADDI.N r, s, i + 0;
}