AE_S32X2F24.I — Store two 24-bit fractional values from the AE_DR register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_S32X2F24.I 1000000000011000 0 000
ae_fld_ls_v 3210
s 3210
ae_fld_immls64 321 0

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_S32X2F24.I 110001 01
ae_fld_ls_v 3210
s 3210
ae_fld_immls64 32 1 0

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_S32X2F24.I 11101101 0100
ae_fld_ls_v 3210
s 3210
ae_fld_immls64 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_S32X2F24.I 110001 01
ae_fld_ls_v 3210
s 3210
ae_fld_immls64 32 1 0

Slot
ae_minislot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_mini0 - 64 bit(s)01000000000000000000000 1110
AE_S32X2F24.I 10000
ae_fld_ls_v 3210
s 3210
ae_fld_immls64 3210

Assembler Syntax

AE_S32X2F24.I aed0..15(ae_ls_v), a0..15(ars), -64..56

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_S32X2F24_I(ae_f24x2 d, ae_f24x2 * a, immediate off);

Description

AE_S32X2F24.I stores two 24-bit values to memory from the AE_DR register. It forms a virtual address by adding the contents of the address register and an immediate value within the range {-64,...,56} encoded in the instruction word.

The store instruction writes the least significant 24 bits (3 bytes) of each 32-bit word, padded with zeroes on the right.

The intent is that the values in the AE_DR register are 9.23-bit fractions that are stored to memory as 1.31-bit fractions. The data is taken from the AE_DR register d.

Implementation Pipeline

In Out
ae_ls_v Mstage, ars Estage

Protos that use AE_S32X2F24.I

proto AE_S32X2F24.I { in ae_f24x2 d, in ae_f24x2 * a, in immediate off }{}{
AE_S32X2F24.I d, a, off + 0;
}
proto AE_SP24X2F.I { in ae_p24x2s d, in ae_p24x2f * a, in immediate off }{}{
AE_S32X2F24.I d, a, off + 0;
}
proto AE_SP24X2F.IU { in ae_p24x2s d, inout ae_p24x2f * a, in immediate off }{}{
ADDI a, a, off + 0;
AE_S32X2F24.I d, a, 0;
}
proto AE_SP24X2F.XU { in ae_p24x2s d, inout ae_p24x2f * a, in int32 off }{}{
ADD a, a, off;
AE_S32X2F24.I d, a, 0;
}
proto ae_f24x2_storei { in ae_f24x2 d, in ae_f24x2 * a, in immediate off }{}{
AE_S32X2F24.I d, a, off + 0;
}
proto ae_p24x2f_storei { in ae_p24x2f d, in ae_p24x2f * a, in immediate off }{}{
AE_S32X2F24.I d, a, off + 0;
}
proto ae_p24x2s_rtom_ae_p24x2f { in ae_p24x2s d, in ae_p24x2f * a, in immediate i }{}{
AE_S32X2F24.I d, a, i + 0;
}