- Data Cache size bytes
- 65536
- Data Cache ways
- 4
- Data Cache line size bytes
- 128
- Data Cache line locking
- Selected
- Data Cache memory errors
- Not Selected
- Data Cache write-back
- Selected
- Number of Data Cache Banks
- 1
- Dynamic Way Disable
- Not Selected
- Associativity: - 1 through 4 way associativity is supported.
- Size: Total cache size of all configured ways. Minimum size of a way is 512
bytes; minimum cache size is 1KB.
- Line Size: Size of a cache line in bytes. The critical word first option can
be used to reduce the penalty when a line is being filled from external memory.
- Write-back: The data cache is a write-through cache by default. If this
option is selected, the data cache can be programmatically toggled between
write-back and write-through.
- Line Locking: The data cache allows line locking,
which keeps a line in the cache until it is unlocked. Once locked, the line behaves
similar to local memory. This is useful when working with a small piece of code/data
without incurring an expense of having a local memory. Refer to the Local Memory
Usage and Options chapter in the appropriate Xtensa Microprocessor Data Book for
more information.
-
Banks: If multiple banks are configured, then the data cache is divided
into banks so that successive data memory width sized accesses go to different
banks. At most one load or store can go to any one bank in a cycle.
Restriction: Multiple banks are LX5++ only
The dynamic cache way disable capability gives the ability to disable and re-enable the
use of cache ways in both Instruction- Cache and Data-Cache independently to facilitate
power savings. New and modified instructions enable the user to clean cache ways before
disabling them and to initialize cache ways while enabling them. When a Cache Way is
disabled, it removes that cache memory block from service. Therefore it reduces total
cache capacity by 1/(number of ways in service).
Restriction: LX6/X11++
only.