J — Unconditional Jump

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
J 000110
offset 1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210

Assembler Syntax

J label

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

J performs an unconditional branch to the target address. It uses a signed, 18-bit PC-relative offset to specify the target address. The target address is given by the address of the J instruction plus the sign-extended 18-bit offset field of the instruction plus four, giving a range of -131068 to +131075 bytes.

Operation

nextPC ← PC + (offset1714||offset) + 4

Exceptions

EveryInst Group (see EveryInst Group:)