AE_ROUNDSQ32F48SYM — Round symmetrically and saturate a 17.47-bit fractions to 1.31-bits

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_ROUNDSQ32F48SYM 1000000000011010 1101 0000
ae_fld_arth_v 3210
ae_fld_arth_v1 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_ROUNDSQ32F48SYM 00101011 1001 0100
ae_fld_arth_v 3210
ae_fld_arth_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_ROUNDSQ32F48SYM 1000111 1101
ae_fld_arth_v 3210
ae_fld_arth_v1 3210

Assembler Syntax

AE_ROUNDSQ32F48SYM aed0..15(ae_arth_v), aed0..15(ae_arth_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int64 AE_ROUNDSQ32F48SYM(ae_int64 d0);

Description

AE_ROUNDSQ32F48SYM Round symmetrically (away from 0), saturate the 17.47-bit value from AE_DR register d0 to a 1.31-bit value, sign-extend it and store the result as 17.47-bit value in AE_DR register d. In case of saturation, state AE_OVERFLOW is set to 1.

Implementation Pipeline

In Out
AE_OVERFLOW Wstage, ae_arth_v1 Mstage AE_OVERFLOW Wstage, ae_arth_v Mstage

Protos that use AE_ROUNDSQ32F48SYM

proto AE_ROUNDSQ32F48SYM { out ae_int64 d, in ae_int64 d0 }{}{
AE_ROUNDSQ32F48SYM d, d0;
}
proto AE_ROUNDSQ32SYM { out ae_q56s d, in ae_q56s d0 }{}{
AE_ROUNDSQ32F48SYM d, d0;
}