Early Restart option

Enable Early Restart as soon as the critical word has been filled to a cache-line

Early Restart option
Selected

This option enables early restart on both instruction cache line misses and data cache line misses. For data, the instruction will wait in the M-stage of the pipeline and the data for the cache line miss data will be forwarded to it there. For instruction fetch, the fetch will stall in the I-stage and the cache line miss data will be forward to it there.Refill of the cache lines occurs in the background while the pipeline proceeds. This improves cache miss performance, at the cost of area.

Selecting both Critical Word First and Early Restart will improve the processor miss penalty by approximately 1 + (Cache_line_size/PIF_size) cycles. If only Early Restart is selected, you will get the same benefit if a miss is to the first element of a cache line but as little as one cycle of benefit if the miss is to the last element of the cache line.