SSL — Set Shift Amount for Left Shift

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
SSL 010000000001 00000000
s 3210

Assembler Syntax

SSL as

C Syntax

#include <xtensa/tie/xt_core.h>

extern void XT_SSL(int s);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

SSL sets the shift amount register (SAR) for a left shift (for example, SLL). The left shift amount is the 5 least significant bits of address register as. 32 minus this amount is written to SAR. Using 32 minus the left shift amount causes a right funnel shift, and swapped high and low input operands to perform a left shift.

Operation

sa ← AR[s]4..0
SAR ← 32 − (0||sa)

Exceptions

EveryInstR Group (see EveryInstR Group:)

Implementation Pipeline

In Out
ars Estage SAR Estage

Protos that use SSL

proto SSL { in int32 s }{}{
SSL s;
}
proto SSL_SLL { out int32 dst, in int32 src, in int32 amount }{}{
SSL amount;
SLL dst, src;
}