AE_MULSF32R.HH — 32x32-bit signed fractional (1.31) multiply-subtract with symmetric rounding down to 17.47-bits.

Instruction Word

Slot
ae2_slot1
6
3
6
2
6
1
6
0
5
9
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9
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1
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1
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1
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1
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0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_MULSF32R.HH 1101 1001 0011
ae_fld_mul_q0 3210
ae_fld_mul_d0 3210
ae_fld_mul_d1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
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4
9
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9
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9
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1
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0
9876543210
Format ae_format - 64 bit(s) 1111
AE_MULSF32R.HH 10010010
ae_fld_mul_q0 3210
ae_fld_mul_d0 3210
ae_fld_mul_d1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_MULSF32R.HH 10010010
ae_fld_mul_q0 3210
ae_fld_mul_d0 3210
ae_fld_mul_d1 3210

Assembler Syntax

AE_MULSF32R.HH aed0..15(ae_mul_q0), aed0..15(ae_mul_d0), aed0..15(ae_mul_d1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_MULSF32R_HH(ae_f64 d /*inout*/, ae_f32x2 d0, ae_f32x2 d1);

Description

AE_MULSF32R.HH is a 32x32-bit signed fractional (1.31) multiply-subtract with symmetric rounding down to 17.47-bits and no saturation. The extension HH indicates that the multiplication result is the product of the two AE_DR operands' H elements.

Implementation Pipeline

In Out
ae_mul_q0 Wstage, ae_mul_d0 Mstage, ae_mul_d1 Mstage ae_mul_q0 Wstage

Protos that use AE_MULSF32R.HH

proto AE_MULSF32R.HH { inout ae_f64 d, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_MULSF32R.HH d, d0, d1;
}