AE_LA32X2F24.RIC — Load two 24-bit fractional values into the AE_DR register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_LA32X2F24.RIC 1000000000011010 0001 0 1
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_LA32X2F24.RIC 11010010 0 1
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_LA32X2F24.RIC 11010010 0 1
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Assembler Syntax

AE_LA32X2F24.RIC aed0..15(ae_ls_av), u0..3(ae_ls_uu), a0..15(ars)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_LA32X2F24_RIC(ae_f24x2 d /*out*/, ae_valign uu /*inout*/, const ae_f24x2 * a /*inout*/);

Description

AE_LA32X2F24.RIC loads two 32-bit, potentially uanligned values from memory into the AE_DR register. It forms a virtual address using the address register.

The load instruction reads the most significant 24 bits (3 bytes) of each 32-bit word and sign-extends them into 32-bits.

The intent is that the value in memory represents a 32-bit (1.31) fraction that gets truncated and placed into the AE_DR register as 9.23-bit fractions.

The data is placed in the AE_DR register d, swapping the two 24-bit values.

Note: the .RIC suffix indicates that the operation is using a circular buffer addressing mode. The updated base address is formed by subtracting 8 from the base address with circular wrap-around.

Implementation Pipeline

In Out
AE_CEND0 Estage, AE_CBEGIN0 Estage, ae_ls_uu Wstage, ars Estage ae_ls_av Wstage, ae_ls_uu Wstage, ars Estage

Protos that use AE_LA32X2F24.RIC

proto AE_LA32X2F24.RIC { out ae_f24x2 d, inout ae_valign uu, inout const ae_f24x2 * a }{}{
AE_LA32X2F24.RIC d, uu, a;
}