Slot Inst | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Format x24 - 24 bit(s) | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
ALL4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | ||||||||||||||||||||||||||||||||||||||||||||||||
t | 3 | 2 | 1 | 0 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
s4 | 1 | 0 |
ALL4 bt, bs
extern xtbool XT_ALL4(xtbool4 bs4);
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
ALL4
sets Boolean register bt
to the logical and of the four Boolean registers bs
+
0
, bs
+
1
, bs
+
2
, and bs
+
3
. bs
must be a multiple of four (b0
, b4
, b8
, or b12
); otherwise the operation of this instruction is not defined. ALL4
reduces four test results such that the result is true if all four tests are true.
When the sense of the bs
Booleans is inverted (0 ®
true, 1 ®
false), use ANY4
and an inverted test of the result.
BRt ← BRs+3 and BRs+2 and BRs+1 and BRs+0
In | Out |
---|---|
bs4 Estage
|
bt Estage
|