Slot Inst16b | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Format x16b - 16 bit(s) | 1 | 1 | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MOVI.N | 0 | 1 | 1 | 0 | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
s | 3 | 2 | 1 | 0 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
imm7 | 3 | 2 | 1 | 0 | 6 | 5 | 4 |
MOVI.N as, -32..95
extern int XT_MOVI_N(immediate i);
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
MOVI.N
is similar to MOVI
, but has a 16-bit encoding and supports a smaller range of constant values encoded in the instruction word.
MOVI.N
sets address register as
to a constant in the range -32..95
encoded in the instruction word. The constant is stored in two non-contiguous fields of the instruction word. The range is asymmetric around zero because positive constants are more frequent than negative constants. The processor decodes the constant specification by concatenating the two fields and sign-extending the 7-bit value with the logical and of its two most significant bits.
AR[s] ← (imm76 and imm75)25||imm7
In | Out |
---|---|
ars Estage
|