Slot Inst | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Format x24 - 24 bit(s) | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MUL.DA.LL | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | |||||||||||||||||||||||||||||||||||||||||||||
x | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
t | 3 | 2 | 1 | 0 |
MUL.DA.LL - MUL.DA.HL - MUL.DA.LH - MUL.DA.HH - MUL.DA.* mx, at Where * expands as follows:
for (half=0)
for (half=1)
for (half=2)
for (half=3)
extern void XT_MUL_DA_LL(immediate mx, unsigned art);
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
MUL.DA.*
performs a two's complement multiply of half of MAC16 register mx
and half of address register at
, producing a 32-bit result. The result is sign-extended to 40 bits and written to the MAC16 accumulator. The mx
operand can designate either MAC16 register m0
or m1
.
m1 ← if half0 then MR[0||x]31..16 else MR[0||x]15..0 m2 ← if half1 then AR[t]31..16 else AR[t]15..0 ACC ← (m11524||m1) \* (m21524||m2)