Slot Inst | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Format x24 - 24 bit(s) | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CALL12 | 1 | 1 | 0 | 1 | 0 | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
offset | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CALL12 label
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
CALL12
calls subroutines using the register windows mechanism, requesting the callee rotate the window by 12 registers. The CALL12
instruction does not rotate the window itself, but instead stores the window increment for later use by the ENTRY
instruction. The return address and window increment are placed in the caller's a12
(the callee's a0
), and the processor then branches to the target address. The return address is the address of the next instruction (the address of the CALL12
instruction plus three). The window increment is also stored in the CALLINC
field of the PS
register, where it is accessed by the ENTRY
instruction.
The target instruction address must be a 32-bit aligned ENTRY
instruction. This allows CALL12
to have a larger effective range (−
524284 to 524288 bytes). The target instruction address of the call is given by the address of the CALL12
instruction with the two least significant bits set to zero, plus the sign-extended 18-bit offset
field of the instruction shifted by two, plus four.
See the CALLX12
instruction for calling routines where the target address is given by the contents of a register.
The RETW
and RETW.N
instructions return from a subroutine called by CALL12
.
The window increment stored with the return address register in a12
occupies the two most significant bits of the register, and therefore those bits must be filled in by the subroutine return. The RETW
and RETW.N
instructions fill in these bits from the two most significant bits of their own address. This prevents register-window calls from being used to call a routine in a different 1GB region of the address space.
See the CALL0
instruction for calling routines using the non-windowed subroutine protocol.
The caller's a12
..a15
are the same registers as the callee's a0
..a3
after the callee executes the ENTRY
instruction. You can use these registers for parameter passing. The caller's a0
..a11
are hidden by CALL12
, and therefore you may use them to keep values that are live across the call.
WindowCheck (00, 00, 11) PS.CALLINC ← 11 AR[1100] ← 11||(nextPC)29..0 nextPC ← (PC31..2 + (offset1712||offset) + 1)||00
In | Out |
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PSCALLINC Estage
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