AE_SEL16I — Combine elements from two input registers into the output register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_SEL16I 1000000000001001
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210
ae_fld_selimm 3210

Slot
ae2_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_SEL16I 1100 011 0
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210
ae_fld_selimm 3 210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_SEL16I 1010 0100
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210
ae_fld_selimm 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_SEL16I 000
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210
ae_fld_selimm 3210

Assembler Syntax

AE_SEL16I aed0..15(ae_dr_to_dr_v), aed0..15(ae_dr_to_dr_v0), aed0..15(ae_dr_to_dr_v1), 0..15

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int16x4 AE_SEL16I(ae_int16x4 d0, ae_int16x4 d1, immediate i);

Description

AE_SEL16I combines elements from the two input registers into the output register. The elements selected depend on the value of the immediate. Programmers should not use this instruction directly and should instead use one of the following intriniscs for 32-bit selects.

AE_SEL32.LH : Concatenate the low element of the first input argument with the high element of the second.

AE_SEL32.HL : Concatenate the high element of the first input argument with the low element of the second.

AE_SEL32.HH : Concatenate the high element of the first input argument with the high element of the second.

AE_SEL32.LL : Concatenate the low element of the first input argument with the low element of the second.

For 16-bit selects, specify the four output elements in order from element 3 to element 0 numbering the first input argument from 7 to 4 and the second input argument from 3 to 0. AE_SEL16.5432

AE_SEL16.7520

AE_SEL16.7610

AE_SEL16.4321

AE_SEL16.6543

AE_SEL16.7632

AE_SEL16.5410

AE_SEL16.6420

AE_SEL16.7362

AE_SEL16.5146

The immediate field imm is an encoded value choosing the permutations such as 5146 or 7520 using a 4-bit value. For reference, the list below shows the encoded value versus the permutation.

imm | perm.

0 | 5432

1 | 7632

2 | 7610

3 | 5410

4 | 4321

5 | 6543

6 | 7520

7 | 7531 (Used for AE_TRUNC16X4F32 operation)

8 | 6420

9 | 7362

10 | 5146

11 | 5140

Implementation Pipeline

In Out
ae_dr_to_dr_v0 Mstage, ae_dr_to_dr_v1 Mstage ae_dr_to_dr_v Mstage

Protos that use AE_SEL16I

proto AE_CVT16X4 { out ae_f16x4 d, in ae_f32x2 dl, in ae_f32x2 dh }{}{
AE_SEL16I d, dl, dh, 8;
}
proto AE_CVT16X4_scalar { out ae_int16 p, in ae_int32 d0 }{}{
AE_SEL16I p, d0, d0, 8;
}
proto AE_CVT16X4_vector { out ae_int16x4 p, in ae_int32x4 d0 }{}{
AE_SEL16I p, d0->d1, d0->d0, 8;
}
proto AE_F32X2_RADD { out int32 a, in ae_f32x2 d0 }{ae_f32 t, ae_f32 t2}{
AE_SEL16I t, d0, d0, 0;
AE_ADD32S t2, t, d0;
AE_MOVAD32.L a, t2;
}
proto AE_F32X4_RADD { out int32 a, in ae_f32x4 d0 }{ae_f32x2 t0, ae_f32x2 t, ae_f32x2 t2}{
AE_ADD32S t0, d0->d1, d0->d0;
AE_SEL16I t, t0, t0, 0;
AE_ADD32S t2, t, t0;
AE_MOVAD32.L a, t2;
}
proto AE_INT16X4_MAX { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{ae_int32x4 t0, ae_int32x4 t1, ae_int32x4 r}{
AE_SEXT32X2D16.32 t1->d0, d0;
AE_SEXT32X2D16.10 t1->d1, d0;
AE_SEXT32X2D16.32 t0->d0, d1;
AE_SEXT32X2D16.10 t0->d1, d1;
AE_MAX32 r->d0, t0->d0, t1->d0;
AE_MAX32 r->d1, t0->d1, t1->d1;
AE_SEL16I d, r->d0, r->d1, 8;
}
proto AE_INT16X4_MIN { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{ae_int32x4 t0, ae_int32x4 t1, ae_int32x4 r}{
AE_SEXT32X2D16.32 t1->d0, d0;
AE_SEXT32X2D16.10 t1->d1, d0;
AE_SEXT32X2D16.32 t0->d0, d1;
AE_SEXT32X2D16.10 t0->d1, d1;
AE_MIN32 r->d0, t0->d0, t1->d0;
AE_MIN32 r->d1, t0->d1, t1->d1;
AE_SEL16I d, r->d0, r->d1, 8;
}
proto AE_MULAAR16P16X4S_vector { inout ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{ae_int32x4 t}{
AE_SEXT32X2D16.32 t->d0, d;
AE_SEXT32X2D16.10 t->d1, d;
AE_MULA16X4 t->d0, t->d1, d0, d1;
AE_SEL16I d, t->d0, t->d1, 8;
}
proto AE_MULAF48Q32SP16S.H { inout ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAF48Q32SP16S.L d, d0, tp;
}
proto AE_MULAF48Q32SP16U.H { inout ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAF48Q32SP16U.L d, d0, tp;
}
proto AE_MULAFQ32SP16S.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAF48Q32SP16S.L d, d0, tp;
}
proto AE_MULAFQ32SP16U.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAF48Q32SP16U.L d, d0, tp;
}
proto AE_MULAQ32SP16S.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAQ32SP16S.L d, d0, tp;
}
proto AE_MULAQ32SP16U.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULAQ32SP16U.L d, d0, tp;
}
proto AE_MULF48Q32SP16S.H { out ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULF48Q32SP16S.L d, d0, tp;
}
proto AE_MULF48Q32SP16U.H { out ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULF48Q32SP16U.L d, d0, tp;
}
proto AE_MULFQ32SP16S.H { out ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULF48Q32SP16S.L d, d0, tp;
}
proto AE_MULFQ32SP16U.H { out ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULF48Q32SP16U.L d, d0, tp;
}
proto AE_MULQ32SP16S.H { out ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULQ32SP16S.L d, d0, tp;
}
proto AE_MULQ32SP16U.H { out ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULQ32SP16U.L d, d0, tp;
}
proto AE_MULR16P16X4S_vector { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{ae_int32x4 t}{
AE_MUL16X4 t->d0, t->d1, d0, d1;
AE_SEL16I d, t->d0, t->d1, 8;
}
proto AE_MULSF48Q32SP16S.H { inout ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSF48Q32SP16S.L d, d0, tp;
}
proto AE_MULSF48Q32SP16U.H { inout ae_int64 d, in ae_int64 d0, in ae_int32x2 d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSF48Q32SP16U.L d, d0, tp;
}
proto AE_MULSFQ32SP16S.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSF48Q32SP16S.L d, d0, tp;
}
proto AE_MULSFQ32SP16U.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSF48Q32SP16U.L d, d0, tp;
}
proto AE_MULSQ32SP16S.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSQ32SP16S.L d, d0, tp;
}
proto AE_MULSQ32SP16U.H { inout ae_q56s d, in ae_q56s d0, in ae_p24x2s d1 }{ae_int32x2 tp}{
AE_SEL16I tp, d1, d1, 1;
AE_MULSQ32SP16U.L d, d0, tp;
}
proto AE_MULZAAFQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, td1;
AE_MULAF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, td1;
AE_MULAF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, d1;
AE_MULAF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, d1;
AE_MULAF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, td1;
AE_MULAF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, td1;
AE_MULAF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, d1;
AE_MULAF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZAAFQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, d1;
AE_MULAF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZAAQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, td1;
AE_MULAQ32SP16S.L d, d2, td3;
}
proto AE_MULZAAQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, td1;
AE_MULAQ32SP16S.L d, d2, td3;
}
proto AE_MULZAAQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, d1;
AE_MULAQ32SP16S.L d, d2, td3;
}
proto AE_MULZAAQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, d1;
AE_MULAQ32SP16S.L d, d2, td3;
}
proto AE_MULZAAQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, td1;
AE_MULAQ32SP16U.L d, d2, td3;
}
proto AE_MULZAAQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, td1;
AE_MULAQ32SP16U.L d, d2, td3;
}
proto AE_MULZAAQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, d1;
AE_MULAQ32SP16U.L d, d2, td3;
}
proto AE_MULZAAQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, d1;
AE_MULAQ32SP16U.L d, d2, td3;
}
proto AE_MULZASFQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, td1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZASFQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, td1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZASFQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, d1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZASFQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d0, d1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZASFQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, td1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZASFQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, td1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZASFQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, d1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZASFQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d0, d1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZASQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, td1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZASQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, td1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZASQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, d1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZASQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d0, d1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZASQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, td1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZASQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, td1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZASQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, d1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZASQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d0, d1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZSAFQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d2, td3;
AE_MULSF48Q32SP16S.L d, d0, td1;
}
proto AE_MULZSAFQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d2, td3;
AE_MULSF48Q32SP16S.L d, d0, td1;
}
proto AE_MULZSAFQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d2, td3;
AE_MULSF48Q32SP16S.L d, d0, d1;
}
proto AE_MULZSAFQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16S.L d, d2, td3;
AE_MULSF48Q32SP16S.L d, d0, d1;
}
proto AE_MULZSAFQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d2, td3;
AE_MULSF48Q32SP16U.L d, d0, td1;
}
proto AE_MULZSAFQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d2, td3;
AE_MULSF48Q32SP16U.L d, d0, td1;
}
proto AE_MULZSAFQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d2, td3;
AE_MULSF48Q32SP16U.L d, d0, d1;
}
proto AE_MULZSAFQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULF48Q32SP16U.L d, d2, td3;
AE_MULSF48Q32SP16U.L d, d0, d1;
}
proto AE_MULZSAQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d2, td3;
AE_MULSQ32SP16S.L d, d0, td1;
}
proto AE_MULZSAQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d2, td3;
AE_MULSQ32SP16S.L d, d0, td1;
}
proto AE_MULZSAQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d2, td3;
AE_MULSQ32SP16S.L d, d0, d1;
}
proto AE_MULZSAQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16S.L d, d2, td3;
AE_MULSQ32SP16S.L d, d0, d1;
}
proto AE_MULZSAQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d2, td3;
AE_MULSQ32SP16U.L d, d0, td1;
}
proto AE_MULZSAQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d2, td3;
AE_MULSQ32SP16U.L d, d0, td1;
}
proto AE_MULZSAQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d2, td3;
AE_MULSQ32SP16U.L d, d0, d1;
}
proto AE_MULZSAQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_SEL16I td3, d3, d3, 1;
AE_MULQ32SP16U.L d, d2, td3;
AE_MULSQ32SP16U.L d, d0, d1;
}
proto AE_MULZSSFQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16S.L d, d0, td1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16S.L d, d0, td1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16S.L d, d0, d1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16S.L d, d0, d1;
AE_MULSF48Q32SP16S.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16U.L d, d0, td1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16U.L d, d0, td1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16U.L d, d0, d1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZSSFQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSF48Q32SP16U.L d, d0, d1;
AE_MULSF48Q32SP16U.L d, d2, td3;
}
proto AE_MULZSSQ32SP16S.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16S.L d, d0, td1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZSSQ32SP16S.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16S.L d, d0, td1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZSSQ32SP16S.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16S.L d, d0, d1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZSSQ32SP16S.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16S.L d, d0, d1;
AE_MULSQ32SP16S.L d, d2, td3;
}
proto AE_MULZSSQ32SP16U.HH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16U.L d, d0, td1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZSSQ32SP16U.HH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td1, ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td1, d1, d1, 1;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16U.L d, d0, td1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZSSQ32SP16U.LH { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16U.L d, d0, d1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_MULZSSQ32SP16U.LH_S2 { out ae_q56s d, in ae_q56s d0, in ae_int24x2 d1, in ae_q56s d2, in ae_int24x2 d3 }{ae_int32x2 td3}{
AE_MOVI d, 0;
AE_SEL16I td3, d3, d3, 1;
AE_MULSQ32SP16U.L d, d0, d1;
AE_MULSQ32SP16U.L d, d2, td3;
}
proto AE_RLadd4_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x4 d0 }{ae_int32x2 t, ae_int32 t2, ae_int32 t3, ae_int32x2 t_1, ae_int32 t4}{
AE_SEL16I t, d0->d1, d0->d1, 0;
AE_ADD32S t2, din, t;
AE_ADD32S t3, t2, d0->d1;
AE_SEL16I t_1, d0->d0, d0->d0, 0;
AE_ADD32S t4, t3, t_1;
AE_ADD32S dout, t4, d0->d0;
}
proto AE_RLadd_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x2 d0 }{ae_int32x2 t, ae_int32 t2}{
AE_SEL16I t, d0, d0, 0;
AE_ADD32S t2, din, t;
AE_ADD32S dout, t2, d0;
}
proto AE_RLsub4_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x4 d0 }{ae_int32x2 t, ae_int32 t2, ae_int32 t3, ae_int32x2 t_1, ae_int32 t4}{
AE_SEL16I t, d0->d1, d0->d1, 0;
AE_SUB32S t2, din, t;
AE_SUB32S t3, t2, d0->d1;
AE_SEL16I t_1, d0->d0, d0->d0, 0;
AE_SUB32S t4, t3, t_1;
AE_SUB32S dout, t4, d0->d0;
}
proto AE_RLsub_rvec { out ae_int32 dout, in ae_int32 din, in ae_int32x2 d0 }{ae_int32x2 t, ae_int32 t2}{
AE_SEL16I t, d0, d0, 0;
AE_SUB32S t2, din, t;
AE_SUB32S dout, t2, d0;
}
proto AE_SEL16.4321 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 4;
}
proto AE_SEL16.5146 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 10;
}
proto AE_SEL16.5410 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 3;
}
proto AE_SEL16.5432 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 0;
}
proto AE_SEL16.6420 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 8;
}
proto AE_SEL16.6543 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 5;
}
proto AE_SEL16.7362 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 9;
}
proto AE_SEL16.7520 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 6;
}
proto AE_SEL16.7610 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 2;
}
proto AE_SEL16.7632 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_SEL16I d, d0, d1, 1;
}
proto AE_SEL16I { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1, in immediate i }{}{
AE_SEL16I d, d0, d1, i + 0;
}
proto AE_SEL16X4IR { out ae_int16x4 v, in ae_int16x4 v0, in ae_int16x4 v1, in immediate i }{}{
AE_SEL16I v, v1, v0, i + 0;
}
proto AE_SEL24.HH { out ae_int24x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 1;
}
proto AE_SEL24.HL { out ae_int24x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 2;
}
proto AE_SEL24.LH { out ae_int24x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 0;
}
proto AE_SEL24.LL { out ae_int24x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 3;
}
proto AE_SEL32.HH { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 1;
}
proto AE_SEL32.HL { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 2;
}
proto AE_SEL32.LH { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 0;
}
proto AE_SEL32.LL { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_SEL16I d, d0, d1, 3;
}
proto AE_SEL32I { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1, in immediate i }{}{
AE_SEL16I d, d0, d1, i + 0;
}
proto AE_SEL32X2IR { out ae_int32x2 v, in ae_int32x2 v0, in ae_int32x2 v1, in immediate i }{}{
AE_SEL16I v, v1, v0, i + 0;
}
proto AE_SELF32X2IR { out ae_f32x2 v, in ae_f32x2 v0, in ae_f32x2 v1, in immediate i }{}{
AE_SEL16I v, v1, v0, i + 0;
}
proto AE_SELP24.HH { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_SEL16I d, d0, d1, 1;
}
proto AE_SELP24.HL { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_SEL16I d, d0, d1, 2;
}
proto AE_SELP24.LH { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_SEL16I d, d0, d1, 0;
}
proto AE_SELP24.LL { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_SEL16I d, d0, d1, 3;
}
proto AE_TRUNC16X4F32 { out ae_f16x4 d, in ae_f32x2 dl, in ae_f32x2 dh }{}{
AE_SEL16I d, dl, dh, 7;
}
proto AE_TRUNC16X4F32_scalar { out ae_int16 p, in ae_int32 d0 }{}{
AE_SEL16I p, d0, d0, 7;
}
proto AE_TRUNC16X4F32_vector { out ae_int16x4 p, in ae_int32x4 d0 }{}{
AE_SEL16I p, d0->d1, d0->d0, 7;
}
proto ae_f24_rtor_ae_f16 { out ae_f16 a, in ae_f24 b }{ae_int32x2 t}{
AE_SLAI32 t, b, 8;
AE_SEL16I a, t, t, 7;
}
proto ae_f24x2_rtor_ae_f24 { out ae_f24 d, in ae_f24x2 d01 }{}{
AE_SEL16I d, d01, d01, 3;
}
proto ae_f24x2_rtor_ae_int24 { out ae_int24 a, in ae_f24x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_f24x2_rtor_ae_int32 { out ae_int32 a, in ae_f24x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_f32_rtor_ae_f16 { out ae_f16 a, in ae_f32 b }{}{
AE_SEL16I a, b, b, 7;
}
proto ae_f32x2_rtor_ae_f32 { out ae_f32 d, in ae_f32x2 d01 }{}{
AE_SEL16I d, d01, d01, 3;
}
proto ae_f32x2_rtor_ae_int32 { out ae_int32 a, in ae_f32x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_int24_rtor_ae_int16 { out ae_int16 a, in ae_int24 b }{}{
AE_SEL16I a, b, b, 8;
}
proto ae_int24x2_rtor_ae_f24 { out ae_f24 a, in ae_int24x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_int24x2_rtor_ae_f32 { out ae_f32 a, in ae_int24x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_int24x2_rtor_ae_int24 { out ae_int24 d, in ae_int24x2 d01 }{}{
AE_SEL16I d, d01, d01, 3;
}
proto ae_int32_rtor_ae_int16 { out ae_int16 a, in ae_int32 b }{}{
AE_SEL16I a, b, b, 8;
}
proto ae_int32x2_rtor_ae_f32 { out ae_f32 a, in ae_int32x2 b }{}{
AE_SEL16I a, b, b, 3;
}
proto ae_int32x2_rtor_ae_int32 { out ae_int32 d, in ae_int32x2 d01 }{}{
AE_SEL16I d, d01, d01, 3;
}
proto ae_int32x2_rtor_ae_int32u { out ae_int32u d, in ae_int32x2 d01 }{}{
AE_SEL16I d, d01, d01, 3;
}
proto ae_int32x4_rtor_ae_int16x4 { out ae_int16x4 a, in ae_int32x4 b }{}{
AE_SEL16I a, b->d1, b->d0, 8;
}