AE_EQ16 — 4-way 16-bit equality comparison

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_EQ16 1000000000010101 1111 01
r4 10
ae_fld_cmpp_v0 3210
ae_fld_cmpp_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_EQ16 1000011 01
r4 10
ae_fld_cmpp_v0 3210
ae_fld_cmpp_v1 3210

Assembler Syntax

AE_EQ16 b0..15(br4), aed0..15(ae_cmpp_v0), aed0..15(ae_cmpp_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern xtbool4 AE_EQ16(ae_int16x4 d0, ae_int16x4 d1);

Description

AE_EQ16 is an element-wise equality on two AE_DR registers d0 and d1; results go to a pair bhl of adjacent Boolean registers. bhl[0] is set if and only if the low element of d0 is equal to the low element of d1. Bhl[1], bhl[2] and bhl[3] are set similarly.

Implementation Pipeline

In Out
ae_cmpp_v0 Mstage, ae_cmpp_v1 Mstage br4 Mstage

Protos that use AE_EQ16

proto AE_EQ16 { out xtbool4 bhl, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_EQ16 bhl, d0, d1;
}
proto AE_F16X4_EQ_F16X4 { out xtbool4 b, in ae_f16x4 d0, in ae_f16x4 d1 }{}{
AE_EQ16 b, d0, d1;
}
proto AE_INT16X4_EQ_INT16X4 { out xtbool4 b, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_EQ16 b, d0, d1;
}