S8I — Store 8-bit

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
S8I 0100 0010
t 3210
s 3210
imm8 76543210

Assembler Syntax

S8I at, as, 0..255

C Syntax

#include <xtensa/tie/xt_core.h>

extern void XT_S8I(signed char r, signed char * p, immediate i);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

S8I is an 8-bit store from address register at to memory. It forms a virtual address by adding the contents of address register as and an 8-bit zero-extended constant value encoded in the instruction word. Therefore, the offset has a range from 0 to 255. Eight bits (1 byte) from the least significant quarter of address register at are written to memory at the physical address.

If the Region Translation Option or the MMU Option is enabled, the virtual address is translated to the physical address. If not, the physical address is identical to the virtual address. If the translation or memory reference encounters an error (for example, protection violation or non-existent memory), the processor raises one of several exceptions .

Operation

vAddr  AR[s] + (024||imm8)
Store8 (vAddr, AR[t]7..0)

Exceptions

Memory Group (see Memory Group:)GenExcep(StoreProhibitedCause) if Region Protection Option or MMU OptionDebugExcep(DBREAK) if Debug Option

Implementation Pipeline

In Out
art Mstage, ars Estage

Protos that use S8I

proto S8I { in int8 r, in int8 * p, in immediate i }{}{
S8I r, p, i + 0;
}