AE_TRUNCP24A32X2 — 2-way truncate of 1.31-bit fraction in AR registers to 1.23-bits

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_TRUNCP24A32X2 1000000000001110 0110
ae_fld_ar_to_dr_v 3210
s 3210
t 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_TRUNCP24A32X2 01100001
ae_fld_ar_to_dr_v 3210
s 3210
t 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_TRUNCP24A32X2 01100001
ae_fld_ar_to_dr_v 3210
s 3210
t 3210

Assembler Syntax

AE_TRUNCP24A32X2 aed0..15(ae_ar_to_dr_v), a0..15(ars), a0..15(art)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int24x2 AE_TRUNCP24A32X2(unsigned ah, unsigned al);

Description

AE_TRUNCP24A32X2 Truncate and sign-extend two 1.31-bit fixed-point fractions (1.31) from AR registers ah and al to two 9.23-bit fixed-point fraction elements in AE_DR register d.

Implementation Pipeline

In Out
ars Mstage, art Mstage ae_ar_to_dr_v Mstage

Protos that use AE_TRUNCP24A32X2

proto AE_TRUNCP24A32X2 { out ae_int24x2 d, in uint32 ah, in uint32 al }{}{
AE_TRUNCP24A32X2 d, ah, al;
}