ESYNC — Execute Synchronize

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
ESYNC 000000000010000000100000

Assembler Syntax

ESYNC

C Syntax

#include <xtensa/tie/xt_core.h>

extern void XT_ESYNC(void);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

ESYNC waits for all previously fetched WSR.*, and XSR.* instructions to be performed before the next instruction uses any register values. This operation is also performed as part of ISYNC and RSYNC. DSYNC is performed as part of this instruction.

This instruction is appropriate after WSR.EPC* instructions. See the Special Register Tables in Special Registers for a complete description of the uses of the ESYNC instruction.

Because the instruction execution pipeline is implementation-specific, the operation section below specifies only a call to the implementation's esync function.

Operation

esync

Exceptions

EveryInst Group (see EveryInst Group:)

Implementation Pipeline

In Out

Protos that use ESYNC

proto ESYNC { }{}{
ESYNC;
}