AE_L32M.IU — Load a 32-bit fractional values and place into the middle of an AE_DR register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_L32M.IU 1000000000010110 1 010
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 321 0

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_L32M.IU 10101101
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_L32M.IU 11001001 0100
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_L32M.IU 10101101
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Assembler Syntax

AE_L32M.IU aed0..15(ae_ls_v), a0..15(ars), -32..28

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_L32M_IU(ae_int64 d /*out*/, const ae_q32s * a /*inout*/, immediate off);

Description

AE_L32M.IU is a 32-bit load from memory into the AE_DR register. It forms a virtual address by adding the contents of the address register and an immediate value within the range {-32,...,28} encoded in the instruction word.

The load instruction reads a 32-bit value from this address, padding it with 16 zeros at the end and then sign-extending it into 64-bits and placing the result into the AE_DR register. p.

This instruction also updates the address register to the virtual address value that was just computed.

Note that this load operation is provided mainly to maintain compatibility with HiFi 2/EP.

Implementation Pipeline

In Out
ars Estage ae_ls_v Mstage, ars Estage

Protos that use AE_L32M.IU

proto AE_L32M.IU { out ae_int64 d, inout const ae_q32s * a, in immediate off }{}{
AE_L32M.IU d, a, off + 0;
}
proto AE_LQ32F.IU { out ae_q56s d, inout const ae_q32s * a, in immediate off }{}{
AE_L32M.IU d, a, off + 0;
}
proto ae_q32s_loadiu { out ae_q32s d, inout const ae_q32s * a, in immediate off }{}{
AE_L32M.IU d, a, off + 0;
}