AE_ADD32 — 2-way 32-bit addition

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_ADD32 1000000000010010 1110
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae2_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_ADD32 1101 0100 0001
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_ADD32 11100111
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_ADD32 00110000 0100
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_ADD32 11100111
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_ADD32 0010011
ae_fld_arth_v 3210
ae_fld_arth_v0 3210
ae_fld_arth_v1 3210

Assembler Syntax

AE_ADD32 aed0..15(ae_arth_v), aed0..15(ae_arth_v0), aed0..15(ae_arth_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int32x2 AE_ADD32(ae_int32x2 d0, ae_int32x2 d1);

Description

AE_ADD32 is an element-wise 32-bit addition of two AE_DR registers d0 and d1. The result placed in d is { d0[63:32] + d1[63:32] , d0[31:0] + d1[31:0] }.

Implementation Pipeline

In Out
ae_arth_v0 Mstage, ae_arth_v1 Mstage ae_arth_v Mstage

Protos that use AE_ADD32

proto AE_ADD32 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_ADDI_32 { out ae_int32 a, in ae_int32 b, in immediate c }{int32 ta, ae_int32 tb}{
MOVI ta, c + 0;
AE_MOVDA32 tb, ta;
AE_ADD32 a, b, tb;
}
proto AE_ADDMI_32 { out ae_int32 a, in ae_int32 b, in immediate c }{int32 ta, ae_int32 tb}{
MOVI ta, c + 0;
AE_MOVDA32 tb, ta;
AE_ADD32 a, b, tb;
}
proto AE_ADDP24 { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_ADDX2_32 { out ae_int32 a, in ae_int32 b, in ae_int32 c }{ae_int32 t}{
AE_SLAI32 t, b, 1;
AE_ADD32 a, t, c;
}
proto AE_ADDX4_32 { out ae_int32 a, in ae_int32 b, in ae_int32 c }{ae_int32 t}{
AE_SLAI32 t, b, 2;
AE_ADD32 a, t, c;
}
proto AE_ADDX8_32 { out ae_int32 a, in ae_int32 b, in ae_int32 c }{ae_int32 t}{
AE_SLAI32 t, b, 3;
AE_ADD32 a, t, c;
}
proto AE_ADD_32 { out ae_int32 a, in ae_int32 b, in ae_int32 c }{}{
AE_ADD32 a, b, c;
}
proto AE_INT16X4_RADD { out int16 a, in ae_int16x4 d0 }{ae_int32x4 t, ae_int32x2 t0, ae_int32x2 t1}{
AE_SEXT32X2D16.32 t->d1, d0;
AE_SEXT32X2D16.10 t->d0, d0;
AE_ADD32 t0, t->d0, t->d1;
AE_ADD32_HL_LH t1, t0, t0;
AE_MOVAD16.0 a, t1;
}
proto AE_INT24X2_ADD_INT24 { out ae_int24x2 d, in ae_int24x2 d0, in ae_int24 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT24X2_ADD_INT24X2 { out ae_int24x2 d, in ae_int24x2 d0, in ae_int24x2 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT24_ADD_INT24 { out ae_int24 d, in ae_int24 d0, in ae_int24 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT24_ADD_INT24X2 { out ae_int24x2 d, in ae_int24 d0, in ae_int24x2 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT32X2_ADD_INT32 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT32X2_ADD_INT32X2 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT32X4_ADD { out ae_int32x4 d, in ae_int32x4 d0, in ae_int32x4 d1 }{}{
AE_ADD32 d->d0, d0->d0, d1->d0;
AE_ADD32 d->d1, d0->d1, d1->d1;
}
proto AE_INT32X4_RADD { out int32 a, in ae_int32x4 d0 }{ae_int32x2 t0, ae_int32x2 t1}{
AE_ADD32 t0, d0->d1, d0->d0;
AE_ADD32_HL_LH t1, t0, t0;
AE_MOVAD32.L a, t1;
}
proto AE_INT32_ADD_INT32 { out ae_int32 d, in ae_int32 d0, in ae_int32 d1 }{}{
AE_ADD32 d, d0, d1;
}
proto AE_INT32_ADD_INT32X2 { out ae_int32x2 d, in ae_int32 d0, in ae_int32x2 d1 }{}{
AE_ADD32 d, d0, d1;
}