AE_CVTA32F24S.L — Convert a 9.23-bit fraction to 1.31-bits

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_CVTA32F24S.L 1000000000011010 0100 0001
r 3210
ae_fld_dr_to_ar_v0 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_CVTA32F24S.L 11001000 0110
r 3210
ae_fld_dr_to_ar_v0 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_CVTA32F24S.L 11001000 0110
r 3210
ae_fld_dr_to_ar_v0 3210

Assembler Syntax

AE_CVTA32F24S.L a0..15(arr), aed0..15(ae_dr_to_ar_v0)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern int AE_CVTA32F24S_L(ae_int24x2 d0);

Description

AE_CVTA32F24S.L convert a 9.23-bit value in d0.L to a 1.31-bit value in AR register a. The 8 MSBs of the input value are discarded.

Implementation Pipeline

In Out
ae_dr_to_ar_v0 Mstage arr Mstage

Protos that use AE_CVTA32F24S.L

proto AE_CVTA32F24S.L { out int32 a, in ae_int24x2 d0 }{}{
AE_CVTA32F24S.L a, d0;
}
proto AE_CVTA32P24.L { out int32 a, in ae_p24x2s d0 }{}{
AE_CVTA32F24S.L a, d0;
}