AE_L32.IP — Load a 32-bit value and replicate into the AE_DR register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_L32.IP 1000000000010110 1 011
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 321 0

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_L32.IP 10101111
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_L32.IP 10111110 0100
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_L32.IP 10101111
ae_fld_ls_v 3210
s 3210
ae_fld_immls32 3210

Assembler Syntax

AE_L32.IP aed0..15(ae_ls_v), a0..15(ars), -32..28

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_L32_IP(ae_int32x2 d /*out*/, const ae_int32 * a /*inout*/, immediate off);

Description

AE_L32.IP is a 32-bit load from memory. into the AE_DR register. It forms a virtual address using the address register.

The load instruction reads 32 bits (4 bytes) from memory and replicates the data into each of the two halves of the AE_DR register d.

This instruction also post-increments the address register by the immediate value.

Implementation Pipeline

In Out
ars Estage ae_ls_v Mstage, ars Estage

Protos that use AE_L32.IP

proto AE_L32.IP { out ae_int32x2 d, inout const ae_int32 * a, in immediate off }{}{
AE_L32.IP d, a, off + 0;
}
proto ae_f32_loadip { out ae_f32 d, inout const ae_f32 * a, in immediate off }{}{
AE_L32.IP d, a, off + 0;
}
proto ae_int24_loadip { out ae_int24 d, inout const ae_int24 * a, in immediate off }{}{
AE_L32.IP d, a, off + 0;
}
proto ae_int32_loadip { out ae_int32 d, inout const ae_int32 * a, in immediate off }{}{
AE_L32.IP d, a, off + 0;
}
proto ae_p24s_loadip { out ae_p24s d, inout const ae_p24s * a, in immediate off }{}{
AE_L32.IP d, a, off + 0;
}