DIU — Data Cache Index Unlock

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
DIU 00110111 10000010
s 3210
op2 3210

Assembler Syntax

DIU as, 0..240

C Syntax

#include <xtensa/tie/xt_datacache.h>

extern void XT_DIU(const int * s, immediate i);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

DIU uses the virtual address to choose a location in the data cache and unlocks the chosen line. The purpose of DIU is to remove the lock created by a DPFL instruction. The method for mapping the virtual address to a data cache location is implementation-specific. This instruction is primarily useful for unlocking the entire data cache. Xtensa ISA implementations that do not implement cache locking must raise an illegal instruction exception when this opcode is executed.

To unlock a specific cache line if it is in the cache, use the DHU instruction.

DIU forms a virtual address by adding the contents of address register as and a 4-bit zero-extended constant value encoded in the instruction word shifted left by four. Therefore, the offset can specify multiples of 16 from zero to 240. The virtual address chooses a cache line without translation and without raising the associated exceptions.

Because the organization of caches is implementation-specific, the operation section below specifies only a call to the implementation's dindexunlock function.

DIU is a privileged instruction.

Operation

if CRING != 0 then
	Exception (PrivilegedCause)
else
	vAddr ← AR[s] + (024||imm4||04)
	dindexunlock(vAddr)
endif

Exceptions

EveryInstR Group (see EveryInstR Group:)GenExcep(PrivilegedCause) if Exception OptionMemoryErrorException if Memory ECC/Parity Option

Protos that use DIU

proto DIU { in const int32 * s, in immediate i }{}{
DIU s, i + 0;
}