AE_LE32 — 2-way 32-bit signed less-than-or-equal comparison

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_LE32 1000000000010101 1110 1
r2 210
ae_fld_cmpp_v0 3210
ae_fld_cmpp_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_LE32 1000010 1
r2 210
ae_fld_cmpp_v0 3210
ae_fld_cmpp_v1 3210

Assembler Syntax

AE_LE32 b0..15(br2), aed0..15(ae_cmpp_v0), aed0..15(ae_cmpp_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern xtbool2 AE_LE32(ae_int32x2 d0, ae_int32x2 d1);

Description

AE_LE32 is an element-wise signed less-than-or-equal comparison on two AE_DR registers d0 and d1. Results go to a pair bhl of adjacent Boolean registers; clear or set Boolean register pair bhl. bhl[0] is set if and only if the low element of d0 is less than or equal to the low element of d1. Similarly, bhl[1] is set if and only if the high element of the first input AE_DR register is less than or equal to the high element of the second input AE_DR register.

Implementation Pipeline

In Out
ae_cmpp_v0 Mstage, ae_cmpp_v1 Mstage br2 Mstage

Protos that use AE_LE32

proto AE_F24X2_GE_F24X2 { out xtbool2 b, in ae_f24x2 d0, in ae_f24x2 d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_F24X2_LE_F24X2 { out xtbool2 b, in ae_f24x2 d0, in ae_f24x2 d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_F32X2_GE_F32X2 { out xtbool2 b, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_F32X2_LE_F32X2 { out xtbool2 b, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_INT24X2_GE_INT24X2 { out xtbool2 b, in ae_int24x2 d0, in ae_int24x2 d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_INT24X2_LE_INT24X2 { out xtbool2 b, in ae_int24x2 d0, in ae_int24x2 d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_INT32X2_GE_INT32X2 { out xtbool2 b, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_INT32X2_LE_INT32X2 { out xtbool2 b, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_LE32 { out xtbool2 bhl, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_LE32 bhl, d0, d1;
}
proto AE_LEP24S { out xtbool2 bhl, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_LE32 bhl, d0, d1;
}
proto AE_P24X2F_GE_P24X2F { out xtbool2 b, in ae_p24x2f d0, in ae_p24x2f d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_P24X2F_GE_P24X2S { out xtbool2 b, in ae_p24x2f d0, in ae_p24x2s d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_P24X2F_LE_P24X2F { out xtbool2 b, in ae_p24x2f d0, in ae_p24x2f d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_P24X2F_LE_P24X2S { out xtbool2 b, in ae_p24x2f d0, in ae_p24x2s d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_P24X2S_GE_P24X2F { out xtbool2 b, in ae_p24x2s d0, in ae_p24x2f d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_P24X2S_GE_P24X2S { out xtbool2 b, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_LE32 b, d1, d0;
}
proto AE_P24X2S_LE_P24X2F { out xtbool2 b, in ae_p24x2s d0, in ae_p24x2f d1 }{}{
AE_LE32 b, d0, d1;
}
proto AE_P24X2S_LE_P24X2S { out xtbool2 b, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_LE32 b, d0, d1;
}