| Slot Inst | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Format x24 - 24 bit(s) | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| RFI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | ||||||||||||||||||||||||||||||||||||||||||||
| s | 3 | 2 | 1 | 0 |
RFI 0..15
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
RFI returns from a high-priority interrupt. It restores the PS from EPS[level] and jumps to the address in EPC[level]. Level is given as a constant 2..(NLEVEL+NNMI) in the instruction word. The operation of this opcode when level is 0 or 1 or greater than (NLEVEL+NNMI) is undefined.
RFI is a privileged instruction.
if CRING != 0 then Exception (PrivilegedCause) else nextPC ← EPC[level] PS ← EPS[level] endif
| In | Out |
|---|---|
EPC1 Estage, EPC2 Estage, EPC3 Estage,
EPC4 Estage, EPC5 Estage, EPC6 Estage,
EPS2 Estage, EPS3 Estage, EPS4 Estage,
EPS5 Estage, EPS6 Estage
|
PSWOE Estage, PSCALLINC Estage,
PSOWB Mstage, PSUM Mstage, PSEXCM Estage,
PSINTLEVEL Mstage, InOCDMode Wstage
|