AE_AND — bitwise AND on two AE_DR register inputs

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_AND 1000000000010101 0110
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_AND 01000001 0100
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210

Slot
ae_slot2_1
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_AND 0111011
ae_fld_dr_to_dr_v 3210
ae_fld_dr_to_dr_v0 3210
ae_fld_dr_to_dr_v1 3210

Assembler Syntax

AE_AND aed0..15(ae_dr_to_dr_v), aed0..15(ae_dr_to_dr_v0), aed0..15(ae_dr_to_dr_v1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int64 AE_AND(ae_int64 d0, ae_int64 d1);

Description

AE_AND performs a bitwise AND on d0 and d1, with results to d.

Implementation Pipeline

In Out
ae_dr_to_dr_v0 Mstage, ae_dr_to_dr_v1 Mstage ae_dr_to_dr_v Mstage

Protos that use AE_AND

proto AE_AND { out ae_int64 d, in ae_int64 d0, in ae_int64 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_AND16 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_AND24 { out ae_int24x2 d, in ae_int24x2 d0, in ae_int24x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_AND32 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_AND64 { out ae_int64 d, in ae_int64 d0, in ae_int64 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_ANDP48 { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_ANDQ56 { out ae_q56s d, in ae_q56s d0, in ae_q56s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_AND_32 { out ae_int32 a, in ae_int32 b, in ae_int32 c }{}{
AE_AND a, b, c;
}
proto AE_F16X4_AND_F16 { out ae_f16x4 d, in ae_f16x4 d0, in ae_f16 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F16X4_AND_F16X4 { out ae_f16x4 d, in ae_f16x4 d0, in ae_f16x4 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F16_AND_F16 { out ae_f16 d, in ae_f16 d0, in ae_f16 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F16_AND_F16X4 { out ae_f16x4 d, in ae_f16 d0, in ae_f16x4 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F24X2_AND_F24 { out ae_f24x2 d, in ae_f24x2 d0, in ae_f24 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F24X2_AND_F24X2 { out ae_f24x2 d, in ae_f24x2 d0, in ae_f24x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F24_AND_F24 { out ae_f24 d, in ae_f24 d0, in ae_f24 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F24_AND_F24X2 { out ae_f24x2 d, in ae_f24 d0, in ae_f24x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F32X2_AND_F32 { out ae_f32x2 d, in ae_f32x2 d0, in ae_f32 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F32X2_AND_F32X2 { out ae_f32x2 d, in ae_f32x2 d0, in ae_f32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F32X4_AND { out ae_f32x4 d, in ae_f32x4 d0, in ae_f32x4 d1 }{}{
AE_AND d->d0, d0->d0, d1->d0;
AE_AND d->d1, d0->d1, d1->d1;
}
proto AE_F32_AND_F32 { out ae_f32 d, in ae_f32 d0, in ae_f32 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F32_AND_F32X2 { out ae_f32x2 d, in ae_f32 d0, in ae_f32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_F64_AND { out ae_f64 d, in ae_f64 d0, in ae_f64 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT16X4_AND_INT16 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT16X4_AND_INT16X4 { out ae_int16x4 d, in ae_int16x4 d0, in ae_int16x4 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT16_AND_INT16 { out ae_int16 d, in ae_int16 d0, in ae_int16 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT16_AND_INT16X4 { out ae_int16x4 d, in ae_int16 d0, in ae_int16x4 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT24X2_AND_INT24 { out ae_int24x2 d, in ae_int24x2 d0, in ae_int24 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT24X2_AND_INT24X2 { out ae_int24x2 d, in ae_int24x2 d0, in ae_int24x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT24_AND_INT24 { out ae_int24 d, in ae_int24 d0, in ae_int24 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT24_AND_INT24X2 { out ae_int24x2 d, in ae_int24 d0, in ae_int24x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT32X2_AND_INT32 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT32X2_AND_INT32X2 { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT32X2_AND_rvec { out ae_int32x2 d, in ae_int32x2 d0, in ae_int32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT32X4_AND { out ae_int32x4 d, in ae_int32x4 d0, in ae_int32x4 d1 }{}{
AE_AND d->d0, d0->d0, d1->d0;
AE_AND d->d1, d0->d1, d1->d1;
}
proto AE_INT32_AND_INT32 { out ae_int32 d, in ae_int32 d0, in ae_int32 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT32_AND_INT32X2 { out ae_int32x2 d, in ae_int32 d0, in ae_int32x2 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_INT64_AND { out ae_int64 d, in ae_int64 d0, in ae_int64 d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24F_AND_P24F { out ae_p24f d, in ae_p24f d0, in ae_p24f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24F_AND_P24S { out ae_p24s d, in ae_p24f d0, in ae_p24s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24F_AND_P24X2F { out ae_p24x2f d, in ae_p24f d0, in ae_p24x2f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24F_AND_P24X2S { out ae_p24x2s d, in ae_p24f d0, in ae_p24x2s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24S_AND_P24F { out ae_p24s d, in ae_p24s d0, in ae_p24f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24S_AND_P24S { out ae_p24s d, in ae_p24s d0, in ae_p24s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24S_AND_P24X2F { out ae_p24x2f d, in ae_p24s d0, in ae_p24x2f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24S_AND_P24X2S { out ae_p24x2s d, in ae_p24s d0, in ae_p24x2s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2F_AND_P24F { out ae_p24x2f d, in ae_p24x2f d0, in ae_p24f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2F_AND_P24S { out ae_p24x2f d, in ae_p24x2f d0, in ae_p24s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2F_AND_P24X2F { out ae_p24x2f d, in ae_p24x2f d0, in ae_p24x2f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2F_AND_P24X2S { out ae_p24x2s d, in ae_p24x2f d0, in ae_p24x2s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2S_AND_P24F { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2S_AND_P24S { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2S_AND_P24X2F { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2f d1 }{}{
AE_AND d, d0, d1;
}
proto AE_P24X2S_AND_P24X2S { out ae_p24x2s d, in ae_p24x2s d0, in ae_p24x2s d1 }{}{
AE_AND d, d0, d1;
}
proto AE_Q56S_AND { out ae_q56s d, in ae_q56s d0, in ae_q56s d1 }{}{
AE_AND d, d0, d1;
}