AE_MULSFP32X16X2RS.L_S2 — Two-way SIMD 32x16-bit signed fractional multiply-subtract with symmetric rounding down to 1.31-bits: slot 2 version.

Instruction Word

Slot
ae_slot2_0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_MULSFP32X16X2RS.L_S210101000
ae_fld_mul_x2_S2_q0 3210
ae_fld_mul_x2_S2_d0 3210
ae_fld_mul_x2_S2_d1 3210

Assembler Syntax

AE_MULSFP32X16X2RS.L_S2 aed0..15(ae_mul_S2_q0), aed0..15(ae_mul_S2_d0), aed0..15(ae_mul_S2_d1)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_MULSFP32X16X2RS_L_S2(ae_f32x2 d /*inout*/, ae_f32x2 d0, ae_f16x4 d1);

Description

AE_MULSFP32X16X2RS.L is a two-way SIMD, 32x16-bit fractional multiply-subtract rounded down symmetrically to 1.31-bits with saturation. The two 16-bit low elements of AE_DR operand d0 are multiplied against the two elements of the 32-bit AE_DR operand d1. This is equivalent to AE_MULSFP32X16X2RS.L and will be automatically used by the compiler as needed.

Implementation Pipeline

In Out
AE_OVERFLOW Wstage, ae_mul_S2_q0 Wstage, ae_mul_S2_d0 Mstage, ae_mul_S2_d1 Mstage AE_OVERFLOW Wstage, ae_mul_S2_q0 Wstage

Protos that use AE_MULSFP32X16X2RS.L_S2

proto AE_MULSFP32X16X2RS.L_S2 { inout ae_f32x2 d, in ae_f32x2 d0, in ae_f16x4 d1 }{}{
AE_MULSFP32X16X2RS.L_S2 d, d0, d1;
}