Slot Inst | 6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Format x24 - 24 bit(s) | 0 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
RETW | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | ||||||||||||||||||||||||||||||||||||||||||||
s | 3 | 2 | 1 | 0 |
RETW
(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)
RETW
returns from a subroutine called by CALL4
, CALL8
, CALL12
, CALLX4
, CALLX8
, or CALLX12
, and that had ENTRY
as its first instruction.
RETW
uses bits 29..0
of address register a0
as the low 30 bits of the return address and bits 31..30
of the address of the RETW
as the high two bits of the return address. Bits 31..30
of a0
are used as the caller's window increment.
RETW
subtracts the window increment from WindowBase
to return to the caller's registers. It then checks the WindowStart
bit for this WindowBase
. If it is set, then the caller's registers still reside in the register file, and RETW
completes by clearing its own WindowStart
bit, jumping to the return address, and, in some implementations, setting PS.CALLINC
to bits 31
..
30
of a0
. If the WindowStart
bit is clear, then the caller's registers have been stored into the stack, so RETW
signals one of window underflow's 4, 8, or 12, based on the size of the caller's window increment. The underflow handler is invoked with Wi
ndowBase
decremented, a minor exception to the rule that instructions aborted by an exception have no side effects to the operating state of the processor. The processor stores the previous value of WindowBase
in PS.OWB
so that it can be restored by RFWU
.
The window underflow handler is expected to restore the caller's registers, set the caller's WindowStart
bit, and then return
(see RFWU
) to re-execute the RETW
, which will then complete.
The operation of this instruction is undefined if AR[0]31..30 is 02
, if PS.WOE is 0
, if PS.EXCM
is 1
, or if the first set bit among [WindowStartWindowBase-1, WindowStartWindowBase-2, WindowStartWindowBase-3] is anything other than WindowStartWindowBase-n, where n
is AR[0]
31..30. (If none of the three bits is set, an underflow exception will be raised as described above, but if the wrong first one is set, the state is not legal.) Some implementations raise an illegal instruction exception in these cases as a debugging aid.
n ← AR[0]31..30 nextPC ← PC31..30||AR[0]29..0 owb ← WindowBase m ← if WindowStartWindowBase-4'b0001 then 2'b01 elsif WindowStartWindowBase-4'b0010 then 2'b10 elsif WindowStartWindowBase-4'b0011 then 2'b11 else 2'b00 if n=2'b00 | (m!=2'b00 & m!=n) | PS.WOE=0 | PS.EXCM=1 then -- undefined operation -- may raise illegal instruction exception else WindowBase ← WindowBase − (02||n) if WindowStartWindowBase != 0 then WindowStartowb ← 0 else -- Underflow exception PS.EXCM ← 1 EPC[1] ← PC PS.OWB ← owb nextPC ← if n = 2'b01 then WindowUnderflow4 else if n = 2'b10 then WindowUnderflow8 else WindowUnderflow12 endif PS.CALLINC ← n -- in some implementations endif
In | Out |
---|---|
WindowBase Rstage , WindowStart Rstage ,
PSEXCM Rstage , PSWOE Rstage , ars Estage
|
WindowBase Estage , WindowStart Estage ,
PSCALLINC Estage
|