AE_LA16X4.IP — Load four 16-bit values into the AE_DR register

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_LA16X4.IP 1000000000011010 0000 1 1
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_LA16X4.IP 11001111 1 0
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_LA16X4.IP 00110111 11 0100
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Slot
ae_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format1 - 64 bit(s)1 1110
AE_LA16X4.IP 11001111 1 0
ae_fld_ls_av 3210
ae_fld_ls_uu 10
s 3210

Assembler Syntax

AE_LA16X4.IP aed0..15(ae_ls_av), u0..3(ae_ls_uu), a0..15(ars)

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern void AE_LA16X4_IP(ae_int16x4 d /*out*/, ae_valign uu /*inout*/, const ae_int16x4 * a /*inout*/);

Description

AE_LA16X4.IP loads four 16-bit, potentially uanligned values from memory into the AE_DR register. It forms a virtual address using the address register.

The load instruction reads four, 16-bit values from memory. The data is placed in the AE_DR register d.

The base address is post-incremented by 8.

Implementation Pipeline

In Out
ae_ls_uu Wstage, ars Estage ae_ls_av Wstage, ae_ls_uu Wstage, ars Estage

Protos that use AE_LA16X4.IP

proto AE_LA16X4.IP { out ae_int16x4 d, inout ae_valign uu, inout const ae_int16x4 * a }{}{
AE_LA16X4.IP d, uu, a;
}
proto ae_int16x4_aligning_load_post_update_positive { out ae_int16x4 v, inout ae_valign u, inout const ae_int16x4 * a }{}{
AE_LA16X4.IP v, u, a;
}