AE_SRAI64 — 64-bit arithmetic shift right by immediate

Instruction Word

Slot
ae2_slot0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format2 - 64 bit(s)0000 1110
AE_SRAI64 1000000000001010 1 1
ae_fld_shift_d 3210
ae_fld_shift_d0 3210
ae_fld_osa64 543210

Slot
ae_slot2_0
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format ae_format - 64 bit(s) 1111
AE_SRAI64000011
ae_fld_shift_d 3210
ae_fld_shift_d0 3210
ae_fld_osa64 54 3210

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
AE_SRAI64 100011 0100
ae_fld_shift_d 3210
ae_fld_shift_d0 3210
ae_fld_osa64 54 3210

Assembler Syntax

AE_SRAI64 aed0..15(ae_shift_d), aed0..15(ae_shift_d0), 0..63

C Syntax

#include <xtensa/tie/xt_hifi2.h>

extern ae_int64 AE_SRAI64(ae_int64 d0, immediate sa);

Description

AE_SRAI64 is a 64-bit arithmetic (sign-extending) right shift of AE_DR register d0 by immediate, with result placed in d.

Implementation Pipeline

In Out
ae_shift_d0 Mstage ae_shift_d Mstage

Protos that use AE_SRAI64

proto AE_F64_SRAI { out ae_f64 d, in ae_f64 d0, in immediate sa }{}{
AE_SRAI64 d, d0, sa + 0;
}
proto AE_INT64_SRAI { out ae_int64 d, in ae_int64 d0, in immediate sa }{}{
AE_SRAI64 d, d0, sa + 0;
}
proto AE_Q56S_SRAI { out ae_q56s d, in ae_q56s d0, in immediate sa }{}{
AE_SRAI64 d, d0, sa + 0;
}
proto AE_SRAI64 { out ae_int64 d, in ae_int64 d0, in immediate sa }{}{
AE_SRAI64 d, d0, sa + 0;
}
proto AE_SRAI64X2_vector { out ae_int64x2 d, in ae_int64x2 d0, in immediate sa }{}{
AE_SRAI64 d->d1, d0->d1, sa + 0;
AE_SRAI64 d->d0, d0->d0, sa + 0;
}
proto AE_SRAIQ56 { out ae_q56s d, in ae_q56s d0, in immediate sa }{}{
AE_SRAI64 d, d0, sa + 0;
}
proto ae_int16_rtor_ae_int64 { out ae_int64 d, in ae_int16 a }{}{
AE_SRAI64 d, a, 48;
}
proto ae_int32_rtor_ae_int64 { out ae_int64 d, in ae_int32 a }{}{
AE_SRAI64 d, a, 32;
}
proto ae_int32x2_rtor_ae_int64x2 { out ae_int64x2 a, in ae_int32x2 b }{ae_int64 t1}{
AE_SLAI64 t1, b, 32;
AE_SRAI64 a->d0, t1, 32;
AE_SRAI64 a->d1, b, 32;
}