REMU — Remainder Unsigned

Instruction Word

Slot
Inst
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Format x24 - 24 bit(s) 0
REMU 11100010 0000
r 3210
s 3210
t 3210

Assembler Syntax

REMU ar, as, at

C Syntax

#include <xtensa/tie/xt_integerdivide.h>

extern unsigned XT_REMU(unsigned ars, unsigned art);

Description

(please consult the Xtensa ® Instruction Set Architecture Reference Manual for any cross references and additional information)

REMU performs a 32-bit unsigned division of the contents of address register as by the contents of address register at and writes the remainder to address register ar. If the contents of address register at are zero, REMU raises an Integer Divide by Zero exception instead of writing a result.

Operation

if AR[t] = 032 then
	Exception (IntegerDivideByZero)
else
	tr ← (0||AR[s]) rem (0||AR[t])
	AR[r] ← tr31..0
endif

Exceptions

EveryInstR Group (see EveryInstR Group:)

GenExcep(IntegerDivideByZeroCause) if 32-bit Integer Divide Option

Implementation Pipeline

In Out
ars Estage, art Estage arr Estage

Protos that use REMU

proto REMU { out uint32 arr, in uint32 ars, in uint32 art }{}{
REMU arr, ars, art;
}