reset: Add generic reset driver

This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 88d3be1..58ba0c6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,4 +148,9 @@
 	help
 	  Support for reset controller on i.MX7/8 SoCs.
 
+config RESET_SYSCON
+	bool "Enable generic syscon reset driver support"
+	depends on DM_RESET
+	help
+	  Support generic syscon mapped register reset devices.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0a044d5..433f1ec 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,3 +23,4 @@
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c
new file mode 100644
index 0000000..8520227
--- /dev/null
+++ b/drivers/reset/reset-syscon.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Sean Anderson
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <regmap.h>
+#include <reset.h>
+#include <reset-uclass.h>
+#include <syscon.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+
+struct syscon_reset_priv {
+	struct regmap *regmap;
+	uint offset;
+	uint mask;
+	bool assert_high;
+};
+
+static int syscon_reset_request(struct reset_ctl *rst)
+{
+	struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
+
+	if (BIT(rst->id) & priv->mask)
+		return 0;
+	else
+		return -EINVAL;
+}
+
+static int syscon_reset_assert(struct reset_ctl *rst)
+{
+	struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
+
+	return regmap_update_bits(priv->regmap, priv->offset, BIT(rst->id),
+				  priv->assert_high ? BIT(rst->id) : 0);
+}
+
+static int syscon_reset_deassert(struct reset_ctl *rst)
+{
+	struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
+
+	return regmap_update_bits(priv->regmap, priv->offset, BIT(rst->id),
+				  priv->assert_high ? 0 : BIT(rst->id));
+}
+
+static const struct reset_ops syscon_reset_ops = {
+	.request = syscon_reset_request,
+	.rst_assert = syscon_reset_assert,
+	.rst_deassert = syscon_reset_deassert,
+};
+
+int syscon_reset_probe(struct udevice *dev)
+{
+	struct syscon_reset_priv *priv = dev_get_priv(dev);
+
+	priv->regmap = syscon_regmap_lookup_by_phandle(dev, "regmap");
+	if (IS_ERR(priv->regmap))
+		return -ENODEV;
+
+	priv->offset = dev_read_u32_default(dev, "offset", 0);
+	priv->mask = dev_read_u32_default(dev, "mask", 0);
+	priv->assert_high = dev_read_u32_default(dev, "assert-high", true);
+
+	return 0;
+}
+
+static const struct udevice_id syscon_reset_ids[] = {
+	{ .compatible = "syscon-reset" },
+	{ },
+};
+
+U_BOOT_DRIVER(syscon_reset) = {
+	.name = "syscon_reset",
+	.id = UCLASS_RESET,
+	.of_match = syscon_reset_ids,
+	.probe = syscon_reset_probe,
+	.priv_auto_alloc_size = sizeof(struct syscon_reset_priv),
+	.ops = &syscon_reset_ops,
+};