commit 06b53010436bd7d4d0da6bdb2f505131a094abc6
author Prabhakar Kushwaha <prabhakar@freescale.com> Mon Nov 09 16:42:20 2015 +0530
committer York Sun <yorksun@freescale.com> Mon Nov 30 09:10:47 2015 -0800
tree 3ffbb7aa4110e3b1970d9b9a35ce52056785626e
parent 449372148f6d9b5b8bded88ed8eee5c581a4bf81

armv8: ls2085a: Add support of LS2085A SoC

Freescale's LS2085A is a another personality of LS2080A SoC with
support of AIOP and DP-DDR.
This Patch adds support of LS2085A Personality.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Updated MAINTAINERS files
           Dropped #ifdef in cpu.h
           Add CONFIG_SYS_NS16550=y in defconfig]
Reviewed-by: York Sun <yorksun@freescale.com>

include/configs/ls2080a_common.h

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index d15a225..0e07f8c 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -11,7 +11,6 @@
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_FSL_LSCH3
-#define CONFIG_LS2080A
 #define CONFIG_MP
 #define CONFIG_GICV3
 #define CONFIG_FSL_TZPC_BP147
@@ -184,7 +183,7 @@
 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET    0x00F00000
 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET    0x00F20000
-#ifndef CONFIG_LS2080A
+#ifdef CONFIG_LS2085A
 #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH	0x200000
 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET	0x07000000
 #endif
@@ -208,7 +207,13 @@
 #define CONFIG_PCIE3		/* PCIE controler 3 */
 #define CONFIG_PCIE4		/* PCIE controler 4 */
 #define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
+#ifdef CONFIG_LS2080A
 #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"
+#endif
+
+#ifdef CONFIG_LS2085A
+#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"
+#endif
 
 #define CONFIG_SYS_PCI_64BIT